深圳市华瑞科电子有限公司 ０７５５－８３０１９２４１ H731xx Very High PSRR Ultra-Low Noise 300mA LDO General Description The H731xx family of low-dropout (LDO), low-power linear regulators offers very high power supply rejection ratio (PSRR) while maintaining very low 35μA ground current. The family uses an advanced CMOS process and a PMOSFET pass device to achieve fast start-up, very low noise, excellent transient response, and excellent PSRR performance. The H731xx is stable with a 1.0 μF ceramic output capacitor, and uses a precision voltage reference and feedback loop to achieve a worst-case accuracy of 3% over all load, line, process, and temperature variations. It is fully specified from TJ = –40°C to +125°C and is offered in a small TSOT23-5 package, a tiny SC70-5 package, and a ultra-small 2mm × 2mm DFN package with a thermal pad, which are ideal for small form factor portable equipment such as wireless handsets and PDAs. • • • • Thermal Shutdown Protection 5kV HBM ESD Protection Ambient Temperature Range: -40ºc To 85°C TSOT23-5, SC70-5, and DFN package Applications • • • • • Smart Phones and Cellular Phones PDAs MP3/MP4 Player Digital Still Cameras Portable instruments Pin Configuration TSOT23-5 (Top View) The H731xx is available in standard fixed output voltages of 1.2V (H73112), 1.5V (H73115), 1.8V (H73118), 2.5V (H73125), 2.8 (H73128), 3.0V (H73130), 3.3V (H73133), and custom voltage options (50mV step options between 0.8V and 5.0V are available upon request). • • • Features • Wide Input Voltage Range: 2.5V to 6.0V Up to 300mA Load Current Standard Fixed Output Voltage Options: 1.2V, 1.5V, 1.8V, 2.5V, 2.8V, 3.0V, and 3.3V Other Output Voltage Options Available on Request Very Low IQ: 35µA Ultra Low Dropout: 190mV at 300mA Load Very High PSRR: 80db at 100Hz Ultra Low Noise: 45uVrms at 1.2V output Ultra-Fast Start-Up Time: 25µs Excellent Load/Line Transient Response Line Regulation: 0.03% typical Load Regulation: 0.1% typical Stable With 1µF Output Capacitor and Full Load Range (0 to 300mA) Short Circuit and Overcurrent Protection Typical Application Diagram • • • • • • • • • • 1 SC70-5 (Top View) DFN2x2-6 (Top View) Rev. 1.0 H731xx Very High PSRR Ultra-Low Noise 300mA LDO VIN VOUT IN OUT H731xx 1µF Enable 1µF EN GND Ordering Information PART NUMBER H731xxEJV TEMPERATURE RANGE OUTPUT VOLTAGE -40°C to 85°C xx/10 V * -40°C to 85°C H731xxESL xx/10 V * -40°C to 85°C H731xxEFG xx/10 V * * xx is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V). PACKAGE TSOT23-5 TAPE&REEL -T SC70-5 DFN2x2-6 -T -T Block Diagram IN OUT Gate Driver EN Current Limit and Thermal Shutdown 0.8V GND Pin Description Pin No. TSOT23-5 DFN2x2-6 SC70-5 Pin Name Pin Function 1 3 IN 2 2 GND Supply input pin. Must be closely decoupled to GND with a 1μF or greater ceramic capacitor. Ground 3 1 EN Enable control input, active high. Do not leave EN floating. 4 5, 6 NC 5 4 OUT No connection Output pin. Bypass a 1μF ceramic capacitor from this pin to ground. Rev. 1.0 2 H731xx Very High PSRR Ultra-Low Noise 300mA LDO Absolute Maximum Rating Parameter IN Voltage Other Pin Voltage Maximum Load Current Junction to Ambient Thermal Resistance (θJA), TSOT23-5 Junction to Ambient Thermal Resistance (θJA), DFN2x2-6 Operating Junction Temperature Storage Temperature Lead Temperature (Soldering, 10 sec) MSL Level (Note 2) HBM (Human Body Model) ESD Susceptibility MM (Machine Model) Rating -0.3 to 6.5 -0.3 to VIN+0.3 500 230 130 -40 to 125 -65 to 150 300 Refer to shipping label 5 400 Unit V V mA °C/W °C/W °C °C °C kV V Electrical Characteristics (VIN= VEN =3.6V, TA = 25°C unless otherwise noted) PARAMETER Input Voltage Operation Range SYMBOL TEST CONDITIONS VIN DC Supply Quiescent Current IQ_ON VOUT ≥ 2.8V, IOUT = 300mA Active mode: VEN=VIN DC Supply Shutdown Current IQ VEN=0V Regulated Output Voltage VOUT Dropout Voltage Line Regulation Load Regulation OFF IOUT=1mA, -40°CTA85°C From Enable to Power On RLOAD=1Ω Power Supply Rejection Ratio PSRR TYP MAX UNIT 6.0 V 190 35 280 mV 49 µA 0.01 1 µA 2 % 0.03 0.2 % 0.1 0.3 % -2 ΔVOUT_Line VIN = VOUT +1V to 5.5V, IOUT = 10mA /VOUT ΔVOUT_Load IOUT from 0mA to 300mA /VOUT Soft-start Time Current Limit Output Noise MIN 2.5 25 500 µs mA f=100Hz, COUT=1µF, IOUT=20mA f=1kHz, COUT=1µF, IOUT=20mA 80 70 dB dB f=10kHz, COUT=1µF, IOUT=20mA 10Hz to 100kHz, IOUT = 200mA, VOUT=2.8V, COUT = 1µF 10Hz to 100kHz, IOUT = 200mA,VOUT=1.2V, COUT = 1µF 52 dB 70 µVRMS 45 µVRMS EN Low Threshold EN High Threshold 350 0.4 1.4 V V EN Pin Input Current IEN 0 0.1 µA Over-temperature Shutdown °C Threshold 155 Over-temperature Shutdown °C Hysteresis 20 Note: Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization. Note 2: Level and body temperature defined by IPC/JEDEC J-STD-020 3 Rev. 1.0 H731xx Very High PSRR Ultra-Low Noise 300mA LDO Typical Performance Characteristics Quiescent Current vs. Temperature Quiescent Current vs. Input Voltage Output Voltage Change vs. Temperature Dropout Voltage Line Regulation Load Regulation 4 Rev. 1.0 H731xx Very High PSRR Ultra-Low Noise 300mA LDO Power Supply Ripple Rejection vs. Frequency Output Noise Voltage Soft Start LDO Enable/Disable Line Transient Response (1mA Load) Line Transient Response (100mA Load) 5 Rev. 1.0 H731xx Very High PSRR Ultra-Low Noise 300mA LDO Load Transient Response (1mA to 250mA) Load Transient Response (1mA to 60mA) 6 Rev. 1.0 H731xx Very High PSRR Ultra-Low Noise 300mA LDO Input Capacitor A1μF ceramic capacitor is recommended to connect between VIN and GND pins to decouple input power supply glitch and noise. The amount of the capacitance may be increased without limit. This input capacitor must be located as close as possible to the device to assure input stability and less noise. For PCB layout, a wide copper trace is required for both VIN and GND. Output Capacitor An output capacitor is required for the stability of the LDO. The recommended output capacitance is from 1μF to 2.2μF, Equivalent Series Resistance (ESR) is from 5mΩ to 100mΩ, and temperature characteristics is X7R or X5R. Higher capacitance values help to improve load/line transient response. Place output capacitor as close as possible to OUT and GND pins. ON/OFF Input Operation The H731XX is turned on by pulling up the EN pin to logic high, and is turned off by pulling it low. If this feature is not used, the EN pin should be tied to IN pin to keep the regulator output on at all time. High PSRR and Low Noise RF circuits such as LNA (low-noise amplifier), up/down-converter, mixer, PLL, VCO, and IF stage, require low noise and high PSRR LDOs. The temperature-compensated crystal oscillator circuit requires very high PSRR at RF power amplifier burst frequency. For instance, minimum 65dB PSRR at 217Hz is recommended for the GSM handsets. In order to provide good audio quality, the audio power supply for hand-free, game, MP3, and multimedia applications in cellular phones, require low-noise and high PSRR at audio frequency range (20Hz-20kHz). The H731XX, with PSRR of 80dB at 100Hz, is suitable for low noise. most of these applications that require high PSRR and Ultra Fast Start-up After enabled, the H731XX is able to provide full power in as little as tens of microseconds, typically 25µs. This feature will help load circuitry move in and out of standby mode in real time, eventually extend battery life for mobile phones and other portable devices. Fast Transient Response Fast transient response LDOs can also extend battery life. TDMA-based cell phone protocols such as Global System for Mobile Communications (GSM) have a transmit/receive duty factor of only 12.5 percent, enabling power savings by putting much of the baseband circuitry into standby mode in between transmit cycles. In baseband circuits, the load often transitions virtually instantaneously from 100µA to 100mA. To meet this load requirement, the LDO must react very quickly without a large voltage drop or overshoot — a requirement that cannot be met with conventional, general-purpose LDOs. The H731XX’s fast transient response from 0 to 300mA provides stable voltage supply for fast DSP and GSM chipset with fast changing load. Low Quiescent Current Cellular phone baseband internal digital circuits typically operate all the time. That requires LDO stays on at all times. However, in the standby mode, the microprocessor consumes only around 100~300µA. Since the phone stays in standby for the longest percentage of time, using a 40µA quiescent current LDO, instead of 100µA, saves 60µA and can substantially extends the battery standby time. The 731XX, consuming only around 35µA for all input range and output loading, provides great power saving in portable and low power applications. 7 Rev. 1.0 H731xx Very High PSRR Ultra-Low Noise 300mA LDO Current Limit Protection When output current at the OUT pin is higher than current limit threshold or the OUT pin is short-circuit to GND, the current limit protection will be triggered and clamp the output current to approximately 500mA to prevent over-current and to protect the regulator from damage due to overheating. Thermal Shutdown Protection Thermal protection disables the output when the junction temperature rises to approximately +155°C, allowing the device to cool down. When the junction temperature reduces to approximately +135°C the output circuitry is enabled again. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the heat dissipation of the regulator, protecting it from damage due to overheating. 8 Rev. 1.0 H731xx Very High PSRR Ultra-Low Noise 300mA LDO Marking Information DI Y M X X:Extra code M:Month(1-9,O,N,D) Y:Year(9=2009,0=2010,1=2011) Package Information TSOT23-5 D e1 2 e 3 A1 1 A 4 E 5 E1 Part Number: DG:H73112 DH:H73115 DI:H73118 DJ:H73125 DK:H73128 DL:H73130 DM:H73133 b C θ L L1 Symbol A A1 b C D E E1 L L1 e e1 θ Dimensions In Millimeters Min 0.9 0.01 0.3 0.09 2.8 2.5 1.5 0.2 0.35 Max 1.1 0.13 0.5 0.2 3 3.1 1.7 0.55 0.8 0.95 Bsc. 1.90 Bsc. 0ο 10ο 9 Dimensions In Inches Min 0.036 0.0004 0.012 0.0036 0.112 0.1 0.06 0.008 0.014 0.038 Bsc. 0.076 Bsc. 0ο Max 0.044 0.0052 0.02 0.008 0.12 0.124 0.068 0.022 0.032 10ο Rev. 1.0 H731xx Very High PSRR Ultra-Low Noise 300mA LDO DFN2X2-6 Note: The configuration of the Pin#1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Min Max Dimensions In Inches Min Max A 0.7 0.8 0.028 0.031 A1 0 0.05 0 0.002 A3 0.175 0.25 0.007 0.01 b 0.2 0.35 0.008 0.014 D 1.95 2.05 0.077 0.081 D2 1 1.45 0.039 0.057 E 1.95 2.05 0.077 0.081 E2 0.5 0.85 0.02 e L 0.65 0.033 0.026 0.3 0.4 10 0.012 0.016 Rev. 1.0 H731xx Very High PSRR Ultra-Low Noise 300mA LDO SC70-5 COMMON DIMENSIONS (UNITS OF MEASURE=MILLIMETER) SYBOL MIN NOM MAX A 0.85 1.05 A1 0.00 0.10 A2 0.80 0.90 1.00 A3 0.47 0.52 0.57 b 0.22 0.29 b1 0.22 0.25 0.28 c 0.115 0.15 c1 0.115 0.13 0.14 D 2.02 2.07 2.12 E 2.20 2.30 2.40 E1 1.25 1.30 1.35 e 0.65BSC e1 1.30BSC L 0.28 0.33 0.38 L1 0.50REF L2 1.30BSC R 0.10 R1 0.10 0.25 0° 8° θ θ1 6° 9° 12° θ2 6° 9° 12° 11 Rev. 1.0 H731xx Very High PSRR Ultra-Low Noise 300mA LDO Packing Information W P D Package Type Carrier Width (W) Pitch (P) Reel Size(D) Packing Minimum SOT23-5L 8.0±0.1 mm 4.0±0.1 mm 180±1 mm 3000pcs Note: Carrier Tape Dimension, Reel Size and Packing Minimum Note: PowerSilicon Technology Corporation assumes no responsibility for any errors which may appear in this document. PowerSilicon Technology Corporation reserves the right to change devices or specifications detailed herein at any time without notice. 12 Rev. 1.0