LINER LTC4449EDCB

LTC4449
High Speed Synchronous
N-Channel MOSFET Driver
FEATURES
DESCRIPTION
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The LTC®4449 is a high frequency gate driver that
is designed to drive two N-Channel MOSFETs in a
synchronous DC/DC converter. The powerful rail-to-rail
driver capability reduces switching losses in MOSFETs
with high gate capacitance.
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4V to 6.5V VCC Operating Voltage
38V Maximum Input Supply Voltage
Adaptive Shoot-Through Protection
Rail-to-Rail Output Drivers
3.2A Peak Pull-Up Current
4.5A Peak Pull-Down Current
8ns TG Risetime Driving 3000pF Load
7ns TG Falltime Driving 3000pF Load
Separate Supply to Match PWM Controller
Drives Dual N-Channel MOSFETs
Undervoltage Lockout
Low Profile (0.75mm) 2mm × 3mm DFN Package
APPLICATIONS
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Distributed Power Architectures
High Density Power Modules
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
The LTC4449 features a separate supply for the input logic
to match the signal swing of the controller IC. If the input
signal is not being driven, the LTC4449 activates a shutdown
mode that turns off both external MOSFETs. The input logic
signal is internally level-shifted to the bootstrapped supply,
which functions at up to 42V above ground.
The LTC4449 contains undervoltage lockout circuits on
both the driver and logic supplies that turn off the external
MOSFETs when an undervoltage condition is present. An
adaptive shoot-through protection feature is also built-in
to prevent the power loss resulting from MOSFET crossconduction current.
The LTC4449 is available in the 2mm × 3mm DFN
package.
TYPICAL APPLICATION
Synchronous Buck Converter Driver
LTC4449 Driving 3000pF Capacitive Loads
VCC
4V TO 6.5V
VCC
BOOST
VLOGIC
LTC4449
TG
TS
PWM
IN
GND
INPUT (IN)
5V/DIV
VIN
TO 38V
VOUT
BG
TOP GATE
(TG - TS)
5V/DIV
BOTTOM GATE
(BG) 5V/DIV
4449 TA01a
10ns/DIV
4449 TA01b
4449f
1
LTC4449
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
Supply Voltage
VLOGIC ...................................................... –0.3V to 7V
VCC........................................................... –0.3V to 7V
BOOST – TS ............................................. –0.3V to 7V
BOOST Voltage .......................................... –0.3V to 42V
TS ................................................................. –5V to 38V
IN Voltage .................................................... –0.3V to 7V
Driver Output TG (with Respect to TS)......... –0.3V to 7V
Driver Output BG.......................................... –0.3V to 7V
Operating Junction Temperature Range
(Notes 2, 3) ............................................–40°C to 125°C
Storage Temperature Range...................–65°C to 150°C
TOP VIEW
8 BOOST
TG 1
TS 2
7 VCC
9
6 VLOGIC
BG 3
5 IN
GND 4
DCB PACKAGE
8-LEAD (2mm s 3mm) PLASTIC DFN
θJA = 64°C/W, θJC = 10.6°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4449EDCB#PBF
LTC4449EDCB#TRPBF
LFKC
8-Lead (2mm × 3mm) Plastic DFN
–40°C to 85°C
LTC4449IDCB#PBF
LTC4449IDCB#TRPBF
LFKC
8-Lead (2mm × 3mm) Plastic DFN
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at TA = 25°C. VCC = VLOGIC = VBOOST = 5V, VTS = GND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
6.5
V
730
900
μA
2.75
2.65
100
3
2.9
V
V
mV
6.5
V
300
400
μA
3.20
3.04
160
3.65
3.50
V
V
mV
300
400
μA
Logic Supply (VLOGIC)
VLOGIC
Operating Range
IVLOGIC
DC Supply Current
IN = Floating
3
UVLO
Undervoltage Lockout Threshold
VLOGIC Rising
VLOGIC Falling
Hysteresis
l
l
2.5
2.4
Gate Driver Supply (VCC)
VCC
Operating Range
IVCC
DC Supply Current
IN = Floating
4
UVLO
Undervoltage Lockout Threshold
VCC Rising
VCC Falling
Hysteresis
IBOOST
DC Supply Current
IN = Floating
l
l
2.75
2.60
4449f
2
LTC4449
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at TA = 25°C. VCC = VLOGIC = VBOOST = 5V, VTS = GND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
VIH(TG)
TG Turn-On Input Threshold
VLOGIC ≥ 5V, IN Rising
VLOGIC = 3.3V, IN Rising
VIL(TG)
TG Turn-Off Input Threshold
VIH(BG)
UNITS
l
l
3
1.9
3.5
2.2
4
2.6
V
V
VLOGIC ≥ 5V, IN Falling
VLOGIC = 3.3V, IN Falling
l
l
2.75
1.8
3.25
2.09
3.75
2.5
V
V
BG Turn-On Input Threshold
VLOGIC ≥ 5V, IN Falling
VLOGIC = 3.3V, IN Falling
l
l
0.8
0.8
1.25
1.1
1.6
1.4
V
V
VIL(BG)
BG Turn-Off Input Theshold
VLOGIC ≥ 5V, IN Rising
VLOGIC = 3.3V, IN Rising
l
l
1.05
0.9
1.5
1.21
1.85
1.5
V
V
IIN(SD)
Maximum Current Into or Out of IN in
Shutdown Mode
VLOGIC ≥ 5V, IN Floating
VLOGIC = 3.3V, IN Floating
150
75
300
150
Input Signal (IN)
μA
μA
High Side Gate Driver Output (TG)
VOH(TG)
TG High Output Voltage
ITG = –100mA, VOH(TG) = VBOOST – VTG
140
mV
VOL(TG)
TG Low Output Voltage
ITG = 100mA, VOL(TG) = VTG – VTS
80
mV
IPU(TG)
TG Peak Pull-Up Current
l
2
3.2
A
IPD(TG)
TG Peak Pull-Down Current
l
1.5
2.4
A
Low Side Gate Driver Output (BG)
VOH(BG)
BG High Output Voltage
IBG = –100mA, VOH(BG) = VCC – VBG
100
mV
VOL(BG)
BG Low Output Voltage
IBG = 100mA
100
mV
IPU(BG)
BG Peak Pull-Up Current
l
2
3.2
A
IPD(BG)
BG Peak Pull-Down Current
l
3
4.5
A
Switching Time
tPLH(TG)
BG Low to TG High Propagation Delay
14
ns
tPHL(TG)
IN Low to TG Low Propagation Delay
13
ns
tPLH(BG)
TG Low to BG High Propagation Delay
13
ns
tPHL(BG)
IN High to BG Low Propagation Delay
11
ns
tr(TG)
TG Output Risetime
10% to 90%, CL = 3nF
8
ns
tf(TG)
TG Output Falltime
10% to 90%, CL = 3nF
7
ns
tr(BG)
BG Output Risetime
10% to 90%, CL = 3nF
7
ns
tf(BG)
BG Output Falltime
10% to 90%, CL = 3nF
4
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC4449I is guaranteed to meet specifications over the full
–40°C to 125°C operating junction temperature range. The LTC4449E is
guaranteed to meet specifications from 0°C to 85°C with specifications
over the –40°C to 85°C operating junction temperature range assured by
design, characterization and correlation with statistical process controls.
The junction temperature TJ is calculated from the ambient temperature TA
and power dissipation PD according to the following formula:
TJ = TA + (PD • 64°C/W)
Note 3: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
4449f
3
LTC4449
TYPICAL PERFORMANCE CHARACTERISTICS
Input Thresholds
vs VLOGIC Supply Voltage
Input Thresholds for VLOGIC ≥ 5V
vs Temperature
Input Thresholds for VLOGIC = 3.3V
vs Temperature
4.0
3.0
VIH(TG)
5
VLOGIC = 3.3V
VLOGIC ≥ 5V
2.5
2.0
VIL(BG)
1.5
VIH(BG)
1.0
2.0
VIL(TG)
1.5
VIL(BG)
1.0
3.5
4.0 4.5 5.0
5.5
VLOGIC SUPPLY (V)
6.0
0.5
–40
6.5
–10
20
50
80
TEMPERATURE (°C)
0.25
0.20
0.15
0.10
0.05
0
3.0
3.5
4.0 4.5 5.0
5.5
VLOGIC SUPPLY (V)
6.0
6.5
0.8
0.30
VLOGIC = 5V
0.25
0.20
0.15
VLOGIC = 3.3V
0.10
VCC UVLO THRESHOLD (V)
VLOGIC UVLO THRESHOLD (V)
2.5
–40
–10
20
80
50
TEMPERATURE (°C)
0.6
0.5
0.4
110
4449 G08
IBOOST
0.3
IVCC
0.2
0.05
0.1
0
–40
–10
20
50
80
TEMPERATURE (°C)
0
110
3.0 3.5
4.0 4.5 5.0 5.5 6.0
SUPPLY VOLTAGE (V)
7.0
Undervoltage Lockout Threshold
Hysteresis vs Temperature
250
3.2
RISING THRESHOLD
3.1
FALLING THRESHOLD
3.0
2.9
–40
6.5
4449 G06
3.3
2.6
110
IVLOGIC
0.7
4449 G05
2.9
FALLING THRESHOLD
20
80
50
TEMPERATURE (°C)
IN FLOATING
0.9 TS = GND
VCC Undervoltage Lockout
Thresholds vs Temperature
2.7
–10
1.0
0.35
VLOGIC Undervoltage Lockout
Thresholds vs Temperature
RISING THRESHOLD
VIH(BG)
Quiescent Supply Current
vs Supply Voltage
0.40
4449 G04
2.8
VIL(BG)
4449 G03
BG or TG Input Threshold Hysteresis
vs Temperature
BG OR TG INPUT THRESHOLD HYSTERESIS (V)
BG OR TG INPUT THRESHOLD HYSTERESIS (V)
BG or TG Input Threshold Hysteresis
vs VLOGIC Supply Voltage
0.30
2
4449 G02
4449 G01
0.35
VIL(TG)
3
0
–40
110
UVLO THRESHOLD HYSTERESIS (V)
3.0
VIH(TG)
1
VIH(BG)
0.5
0
INPUT THRESHOLD (V)
2.5
4
VIH(TG)
SUPPLY CURRENT (mA)
VIL(TG)
3.0
INPUT THRESHOLD (V)
INPUT THRESHOLD (V)
3.5
–10
20
80
50
TEMPERATURE (°C)
110
4449 G09a
200
VCC UVLO
150
100
VLOGIC UVLO
50
0
–40
–10
20
80
50
TEMPERATURE (°C)
110
4449 G09b
4449f
4
LTC4449
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current
vs Input Frequency
Switching Supply Current
vs Load Capacitance
100
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
NO LOAD
VLOGIC = VCC = 5V
5 TS = GND
4
IVCC
3
2
15
VLOGIC = VCC = 5V
TS = GND
CLOAD = 3.3nF
TS = GND
ICC
fIN = 500kHz
10
RISE/FALL TIME (ns)
6
ICC
fIN = 100kHz
ILOGIC
fIN = 500kHz
1
10
0
0
200k
400k
600k
tr(BG)
5
tf(BG)
0.1
1M
800k
3
10
LOAD CAPACITANCE (nF)
1
FREQUENCY (Hz)
Rise and Fall Time
vs Load Capacitance
20
tr(BG)
tf(BG)
1
20
tpLH(TG)
tpLH(BG)
15
tpHL(TG)
10
tpHL(BG)
5
3.0
30
3.5
5.0 5.5 6.0
4.5
VLOGIC SUPPLY VOLTAGE (V)
4.0
4449 G15
6.5
4449 G16
15
tpLH(TG)
tpLH(BG)
tpHL(TG)
10
5
4.0
tpHL(BG)
5.5
5.0
6.0
4.5
VCC (BOOST) SUPPLY VOLTAGE (V)
6.5
4449 G17
Propagation Delay
vs Temperature
25
PROPAGATION DELAY (ns)
10
3
LOAD CAPACITANCE (nF)
PROPAGATION DLEAY (ns)
PROPAGATION DLEAY (ns)
10
NO LOAD
VLOGIC = 5V
TS = GND
NO LOAD
VCC = BOOST = 5V
TS = GND
tr(TG)
6.5
Propagation Delay
vs VCC (Boost) Supply Voltage
25
tf(TG)
5.5
5.0
6.0
4.0
4.5
VCC (BOOST) SUPPLY VOLTAGE (V)
4449 G14
Propagation Delay
vs VLOGIC Supply Voltage
VCC = 5V
TS = GND
1
0
3.5
30
4449 G13
4449 G12
100
tf(TG)
tr(TG)
IVLOGIC
1
RISE/FALL TIME (ns)
Rise and Fall Time
vs VCC (Boost) Supply Voltage
20
15
NO LOAD
VCC = VLOGIC = 5V
TS = GND
tpHL(TG)
tpLH(TG)
10
tpHL(BG)
tpLH(BG)
5
0
–40
–10
20
50
80
TEMPERATURE (°C)
110
4449 G18
4449f
5
LTC4449
PIN FUNCTIONS
TG (Pin 1): High Side Gate Driver Output (Top Gate). This
pin swings between TS and BOOST.
TS (Pin 2): High Side MOSFET Source Connection (Top
Source).
BG (Pin 3): Low Side Gate Driver Output (Bottom Gate).
This pin swings between VCC and GND.
GND (Pin 4, Exposed Pad Pin 9): Chip Ground. The
exposed pad must be soldered to PCB ground for optimal
electrical and thermal performance.
IN (Pin 5): Input Signal. Input referenced to an internal
supply baised off of VLOGIC (Pin 8) and GND (Pin 6). If
this pin is floating, an internal resistive divider triggers a
shutdown mode in which both BG (Pin 5) and TG (Pin 3)
are pulled low. Trace capacitance on this pin should be
minimized to keep the shutdown time low.
VLOGIC (Pin 6): Logic Supply. This pin powers the input
buffer and logic. Connect this pin to the power supply
of the controller that is driving IN (Pin 7) to match input
thresholds or to VCC (Pin 9) to simplify PCB routing.
VCC (Pin 7): Output Driver Supply. This pin powers the low
side gate driver output directly and the high side gate driver
output through an external Schottky diode connected between
this pin and BOOST. A low ESR ceramic bypass capacitor
should be tied between this pin and GND (Pin 6).
BOOST (Pin 8): High Side Bootstrapped Supply. An
external capacitor should be tied between this pin and TS
(Pin 4). Normally an external Schottky diode is connected
between VCC (Pin 9) and this pin. Voltage swing at this
pin is from VCC – VD to VIN + VCC – VD, where VD is the
forward voltage drop of the Schottky diode.
BLOCK DIAGRAM
7
VCC
UNDERVOLTAGE
LOCKOUT
BOOST
8
6
VLOGIC
UNDERVOLTAGE
LOCKOUT
TG
LEVEL
SHIFTER
TS
INTERNAL
SUPPLY
VCC
THREE-STATE
INPUT
BUFFER
IN
2
SHOOTTHROUGH
PROTECTION
7k
5
1
BG
3
7k
4
GND
9 GND
4449 BD
4449f
6
LTC4449
TIMING DIAGRAM
IN
TG
VIL(TG)
VIL(BG)
VIL(BG)
90%
10%
tr(TG)
tf(TG)
90%
BG
10%
tr(BG)
tpLH(BG)
tpLH(TG)
tf(BG)
tpHL(BG)
4449 TD
tpHL(TG)
OPERATION
Overview
The LTC4449 receives a ground-referenced, low voltage
digital input signal to drive two N-channel power MOSFETs
in a synchronous power supply configuration. The gate
of the low side MOSFET is driven either to VCC or GND,
depending on the state of the input. Similarly, the gate of
the high side MOSFET is driven to either BOOST or TS by
a supply bootstrapped off of the switch node (TS).
VIH(TG)
TG HIGH
TG LOW
TG HIGH
TG LOW
VIL(TG)
IN
VIL(BG)
BG LOW
BG HIGH
BG LOW
BG HIGH
VIH(BG)
4449 F01
Input Stage
The LTC4449 employs a unique three-state input stage with
transition thresholds that are proportional to the VLOGIC
supply. The VLOGIC supply can be tied to the controller
IC’s power supply so that the input thresholds will match
those of the controller’s output signal. Alternatively, VLOGIC
can be tied to VCC to simplify routing. An internal voltage
regulator in the LTC4449 limits the input threshold values
for VLOGIC supply voltages greater than 5V.
The relationship between the transition thresholds and
the three input states of the LTC4449 is illustrated in
Figure 1. When the voltage on IN is greater than the
threshold VIH(TG), TG is pulled up to BOOST, turning the
high side MOSFET on. This MOSFET will stay on until IN
falls below VIL(TG). Similarly, when IN is less than VIH(BG),
BG is pulled up to VCC, turning the low side (synchronous)
MOSFET on. BG will stay high until IN increases above
the threshold VIL(BG).
Figure 1. Three-State Input Operation
The thresholds are positioned to allow for a region in which
both BG and TG are low. An internal resistive divider will
pull IN into this region if the signal driving the IN pin goes
into a high impedance state.
One application of this three-state input is to keep both of
the power MOSFETs off while an undervoltage condition
exists on the controller IC power supply. This can be
accomplished by driving the IN pin with a logic buffer
that has an enable pin. With the enable pin of the buffer
tied to the power good pin of the controller IC, the logic
buffer output will remain in a high impedance state until the
controller confirms that its supply is not in an undervoltage
state. The three-state input of the LTC4449 will therefore
pull IN into the region where TG and BG are low until the
controller has enough voltage to operate predictably.
4449f
7
LTC4449
OPERATION
The hysteresis between the corresponding VIH and VIL
voltage levels eliminates false triggering due to noise
during switch transitions; however, care should be taken
to keep noise from coupling into the IN pin, particularly
in high frequency, high voltage applications.
VIN
LTC4449
Q1
BOOST
CGD
P1
HIGH SIDE
POWER
MOSFET
TG
CGS
N1
TS
Undervoltage Lockout
The LTC4449 contains undervoltage lockout detectors that
monitor both the VCC and VLOGIC supplies. When VCC falls
below 3.04V or VLOGIC falls below 2.65V, the output pins
BG and TG are pulled to GND and TS, respectively. This
turns off both of the external MOSFETs. When VCC and
VLOGIC have adequate supply voltage for the LTC4449 to
operate reliably, normal operation will resume.
LOAD
INDUCTOR
VCC
Q2
CGD
P2
LOW SIDE
POWER
MOSFET
BG
Q3
CGS
N2
GND
4449 F02
Figure 2. Capacitance Seen by BG and TG During Switching
Adaptive Shoot-Through Protection
Internal adaptive shoot-through protection circuitry
monitors the voltages on the external MOSFETs to ensure
that they do not conduct simultaneously. The LTC4449
does not allow the bottom MOSFET to turn on until the
gate-source voltage on the top MOSFET is sufficiently
low, and vice-versa. This feature improves efficiency by
eliminating cross-conduction current from flowing from
the VIN supply through the MOSFETs to ground during a
switch transition.
Output Stage
A simplified version of the LTC4449’s output stage is
shown in Figure 2. The pull-up device on both the BG and
TG outputs is an NPN bipolar junction transistor (Q1 and
Q2) in parallel with a low resistance P-channel MOSFET
(P1 and P2). This powerful combination rapidly pulls the
BG and TG outputs to their positive rails (VCC and BOOST,
respectively). Both BG and TG have N-channel MOSFET
pull-down devices (N1 and N2) which pull BG and TG
down to their negative rails, GND and TS. An additional
NPN bipolar junction transistor (Q3) is present on BG
to increase its pull-down drive current capacity. The
rail-to-rail voltage swing of the BG and TG output pins
is important in driving external power MOSFETs, whose
RDS(ON) is inversely proportional to its gate overdrive
voltage (VGS – VTH).
Rise/Fall Time
Since the power MOSFETs generally account for the
majority of power loss in a converter, it is important to
quickly turn them on and off, thereby minimizing the
transition time and power loss. The LTC4449’s peak pullup current of 3.2A for both BG and TG produces a rapid
turn-on transition for the MOSFETs. This high current is
capable of driving a 3nF load with an 8ns risetime.
It is also important to turn the power MOSFETs off quickly
to minimize power loss due to transition time; however,
an additional benefit of a strong pull-down on the driver
outputs is the prevention of cross-conduction current. For
example, when BG turns the low side power MOSFET off and
TG turns the high side power MOSFET on, the voltage on
the TS pin will rise to VIN very rapidly. This high frequency
positive voltage transient will couple through the CGD
capacitance of the low side power MOSFET to the BG pin.
If the BG pin is not held down sufficiently, the voltage on
the BG pin will rise above the threshold voltage of the low
side power MOSFET, momentarily turning it back on. As
a result, both the high side and low side MOSFETs will be
conducting, which will cause significant cross-conduction
current to flow through the MOSFETs from VIN to ground,
thereby introducing substantial power loss. A similar effect
occurs on TG due to the CGS and CGD capacitances of the
high side MOSFET.
4449f
8
LTC4449
OPERATION
The LTC4449’s powerful parallel combination of the
N-channel MOSFET (N2) and NPN (Q3) on the BG
pull-down generates a phenomenal 4ns fall time on BG
while driving a 3nF load. Similarly, the 0.8Ω pull-down
MOSFET (N1) on TG results in a rapid 7ns fall time with
a 3nF load. These powerful pull-down devices minimize
the power loss associated with MOSFET turn-off time and
cross-conduction current.
APPLICATIONS INFORMATION
Power Dissipation
To ensure proper operation and long-term reliability,
the LTC4449 must not operate beyond its maximum
temperature rating. Package junction temperature can
be calculated by:
TJ = TA + (PD)(θJA)
where:
TJ = junction temperature
TA = ambient temperature
PD = power dissipation
θJA = junction-to-ambient thermal resistance
Power dissipation consists of standby, switching and
capacitive load power losses:
PD = PDC + PAC + PQG
where:
PDC = quiescent power loss
PAC = internal switching loss at input frequency fIN
PQG = loss due turning on and off the external
MOSFET with gate charge QG at frequency fIN
The LTC4449 consumes very little quiescent current. The
DC power loss at VLOGIC = 5V and VCC = 5V is only (730μA
+ 600μA)(5V) = 6.65mW.
At a particular switching frequency, the internal power loss
increases due to both AC currents required to charge and
discharge internal nodal capacitances and cross-conduction currents in the internal logic gates. The sum of the
quiescent current and internal switching current with no
load are shown in the Typical Performance Characteristics
plot of Switching Supply Current vs Input Frequency.
The gate charge losses are primarily due to the large AC
currents required to charge and discharge the capacitance
of the external MOSFETs during switching. For identical
pure capacitive loads CLOAD on TG and BG at switching
frequency fin, the load losses would be:
PCLOAD = (CLOAD)(fIN)[(VBOOST – TS)2 + (VCC)2]
In a typical synchronous buck configuration, VBOOST – TS
is equal to VCC – VD, where VD is the forward voltage drop
of the external Schottky diode between VCC and BOOST.
If this drop is small relative to VCC , the load losses can
be approximated as:
PCLOAD ≈ 2(CLOAD)(fIN)(VCC)2
Unlike a pure capacitive load, a power MOSFET’s gate
capacitance seen by the driver output varies with its VGS
voltage level during switching. A MOSFET’s capacitive load
power dissipation can be calculated using its gate charge,
QG. The QG value corresponding to the MOSFET’s VGS
value (VCC in this case) can be readily obtained from the
manufacturer’s QG vs VGS curves. For identical MOSFETs
on TG and BG:
PQG ≈ 2(VCC)(QG)(fIN)
To avoid damaging junction temperatures due to power
dissipation, the LTC4449 includes a temperature monitor
that will pull BG and TG low if the junction temperature
exceeds 160°C. Normal operation will resume when the
junction temperature cools to less than 135°C.
4449f
9
LTC4449
APPLICATIONS INFORMATION
Bypassing and Grounding
The LTC4449 requires proper bypassing on the VLOGIC, VCC
and VBOOST – TS supplies due to its high speed switching
(nanoseconds) and large AC currents (amperes). Careless
component placement and PCB trace routing may cause
excessive ringing and under/overshoot.
To obtain the optimum performance from the LTC4449:
• Mount the bypass capacitors as close as possible
between the VLOGIC and GND pins, the VCC and GND
pins, and the BOOST and TS pins. The leads should
be shortened as much as possible to reduce lead
inductance.
• Use a low inductance, low impedance ground plane
to reduce any ground drop and stray capacitance.
Remember that the LTC4449 switches greater than
5A peak currents and any significant ground drop will
degrade signal integrity.
• Plan the power/ground routing carefully. Know where
the large load switching current is coming from and
going to. Maintain separate ground return paths for
the input pin and the output power stage.
• Keep the copper trace between the driver output pin
and the load short and wide.
• Be sure to solder the Exposed Pad on the back side of
the LTC4449 packages to the board. Correctly soldered
to a double-sided copper board, the LTC4449 has a
thermal resistance of approximately 64°C/W. Failure
to make good thermal contact between the exposed
back side and the copper board will result in thermal
resistances far greater.
4449f
10
1.33k
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation
that the interconnection of its circuits as described herein will not infringe on existing patent rights.
RUN2
CLKOUT
20k
20k
VDIFF1
1.5nF
RUN1
VCC
5V
VIN
7V TO 14V
45k
SS1
FREQ SET FOR 600kHz
VCC
VDIFF1
VOS1N
VOS1P
FB1
COMP1
VSNSOUT
VSNSN
VSNSP
COMP2
FB2
0.1μF
TRACK/SS1
100k
VCC
LTC3860
7V TO 14V IN AND 1.2V OUT AT 50A
fSW = 600kHz, DCR SENSING
220pF
12.7k
33pF
1μF
470μF
50k
ILIM1
ISNS1P
ISNS1N
ISNS2N
ISNS2P
ILIM2
RUN2
PWM1
100pF
VCC
TRACK/SS1
VINSNS
IAVG
PGOOD1
PWM1
RUN1
PWM2
TRACK/SS2
FREQ
CLKIN
CLKOUT
PHSMD
PGOOD2
PWM2
VCC
4.7μF
1μF
4.7μF
1μF
VCC
2.2Ω
0.22μF
0.22μF
VCC
2.2Ω
SW2
SW1
0.22μF
6
7
8
5
LTC4449
4
IN
GND
3
VLOGIC
BG
2
VCC
TS
1
BOOST
TG
0.22μF
6
7
8
5
LTC4449
4
IN
GND
3
VLOGIC
BG
2
VCC
TS
1
BOOST
TG
VIN
VIN
2-Phase 1.2V/50A Step-Down Converter
22μF
s2
22μF
s2
HAT2160H
s2
SW2
HAT2167H
s2
HAT2160H
s2
0.3μH
2.74k
2.74k
SW1 0.3μH
HAT2167H
s2
47μF
s3
VOUT1
1.2V
50A
4449 TA02
330μF
s3
330μF
s3
47Ω
VOS1N
47μF
s3
47Ω
VOS1P
LTC4449
TYPICAL APPLICATION
4449f
11
LTC4449
PACKAGE DESCRIPTION
DCB Package
8-Lead Plastic DFN (2mm × 3mm)
(Reference LTC DWG # 05-08-1718 Rev A)
R = 0.115
TYP
R = 0.05
5
TYP
2.00 p0.10
(2 SIDES)
0.40 p 0.10
8
0.70 p0.05
1.35 p0.10
3.50 p0.05
1.65 p 0.10
3.00 p0.10
(2 SIDES)
2.10 p0.05
1.35 p0.05
1.65 p 0.05
PIN 1 NOTCH
R = 0.20 OR 0.25
s 45o CHAMFER
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
PACKAGE
OUTLINE
(DCB8) DFN 0106 REV A
4
1
0.23 p 0.05
0.45 BSC
0.75 p0.05
0.200 REF
0.25 p 0.05
0.45 BSC
1.35 REF
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
1.35 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC4442/LTC4442-1
High Speed Synchronous N-Channel MOSFET Driver
5A Peak Output Current, Three-State Input, 38V Maximum Input
Supply Voltage, 6V ≤ VCC ≤ 9.5V, MS8E Package
LTC4444/LTC4444-5
High Voltage/High Speed Synchronous N-Channel MOSFET
Driver
3A Peak Output Current, 100V Maximum Input Supply Voltage,
4.5V ≤ VCC ≤ 13.5V, with Adaptive Shoot Through Protection
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High Voltage High Side/Low Side N-Channel MOSFET Driver
3A Output Current, 100V Input Supply Voltage, 7.2V ≤ VCC ≤ 13.5V,
without Adaptive Shoot Through Protection
LTC1693-1/-2/-3/-5
High Speed Single/Dual N-Channel MOSFET Drivers
1.5A Peak Output Current, 4.5V ≤ VIN ≤ 13.2V
LTC4440
High Speed, High Voltage High Side Gate Driver
High Side Source Up to 100V, 8V ≤ VCC ≤ 15V
LTC4440-5
High Speed, High Voltage High Side Gate Driver
High Side Source Up to 80V, 4V ≤ VCC ≤ 15V
LTC4441
6A MOSFET Driver
6A Peak Output Current, Adjustable Gate Drive from 5V to 8V,
5V ≤ VIN ≤ 25V
LTC3900
Synchronous Rectifier Driver for Forward Converters
Pulse Drive Transformer Synchronous Input
LTC3901
Secondary Side Synchronous Driver for Push-Pull and
Full-Bridge Converters
Gate Drive Transformer Synchronous Input
LTC1154
High Side Micropower MOSFET Driver
Internal Charge Pump 4.5V to 18V Supply Range
LTC1155
Dual Micropower High/Low Side Driver
Internal Charge Pump 4.5V to 18V Supply Range
®
LT 1161
Quad Protected High Side MOSFET Driver
8V to 48V Supply Range, tON = 200μs, tOFF = 28μs
LTC1163
Triple 1.8V to 6V High Side MOSFET Driver
1.8V to 6V Supply Range, tON = 95μs, tOFF = 45μs
LTC3860
Dual Phase/Dual Channel Step-Down Voltage Mode Controller
Optimized for High Current Outputs, 3V ≤ VIN ≤ 20V
4449f
12 Linear Technology Corporation
LT 0110 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2010