LINER LTC1693

LTC1693-5
High Speed Single
P-Channel MOSFET Driver
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FEATURES
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DESCRIPTIO
The LTC®1693-5 drives power P-channel MOSFETs at
high speed. The 1.5A peak output current reduces switching losses in MOSFETs with high gate capacitance.
Single MOSFET Driver in MSOP Package
1.5A Peak Output Current
16ns Rise/Fall Times at VCC = 12V, CL = 1nF
Wide VCC Range: 4.5V to 13.2V
CMOS Compatible Input with Hysteresis
Input Threshold Is Independent of VCC
Driver Input Can Be Driven Above VCC
Undervoltage Lockout
Thermal Shutdown
The LTC1693-5 is a single driver with an output polarity
select pin. The MOSFET driver offers VCC independent
CMOS input thresholds with 1.2V of typical hysteresis. It
can level-shift the input logic signal up or down to the railto-rail VCC drive for the external MOSFET.
The LTC1693-5 contains an undervoltage lockout circuit
and a thermal shutdown circuit that disables the external
P-channel MOSFET gate drive if activated.
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APPLICATIO S
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Power Supplies
High Side Drivers
Motor/Relay Control
Line Drivers
Battery Chargers
The LTC1693-5 comes in an 8-lead MSOP package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATIO
High Efficiency 1.5A Li-Ion Battery Charger
VIN
5V TO 6V
MBRS130LT3
POSITION CAPACITOR CLOSE TO LTC1732
332Ω
1µF
332Ω
0.47µF
0.082Ω
0.25W
8
VCC
SENSE
4.7Ω
9
LTC1732
3
10
4
CHRG
8
DRV
BAT
ACPR
TIMER
PROG
0.1µF
AVX 0603ZC104KAT1A
2
1
LTC1693-5CMS8
1
37
POSITION CAPACITOR
CLOSE TO SENSE RESISTOR
Si2305DS
4
MBRS130LT3
6
18.2k
GND SEL
5
7
22µF
CERAMIC
22µF
CDRH6D38-220NC
VCC
SEL
USE LOW TEMPERATURE
COEFFICIENT CAPACITOR
CHARGE RATE ≈1.5A (DEPENDING ON VIN AND BATTERY VOLTAGE)
1-CELL
Li-Ion BATTERY
+
–
+
100µF
1693-5 TA01
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LTC1693-5
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
Supply Voltage (VCC) .............................................. 14V
Inputs (IN, PHASE) ................................... – 0.3V to 14V
Driver Output ................................. – 0.3V to VCC + 0.3V
Junction Temperature .......................................... 150°C
Operating Temperature Range ..................... 0°C to 70°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
TOP VIEW
IN
NC
PHASE
GND
1
2
3
4
8
7
6
5
VCC
OUT
NC
NC
LTC1693-5CMS8
MS8 PACKAGE
8-LEAD PLASTIC MSOP
MS8 PART
MARKING
TJMAX = 150°C, θJA = 200°C/ W
LTSG
Consult factory for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
VCC
Supply Voltage Range
ICC
Quiescent Current
PHASE = 12V, IN = 0V
●
ICC(SW)
Switching Supply Current
COUT = 4.7nF, fIN = 100kHz
●
TYP
MAX
UNITS
13.2
V
360
550
µA
7.2
10
mA
2.6
3.1
V
4.5
200
Input
VIH
High Input Threshold
●
2.2
VIL
Low Input Threshold
●
1.1
IIN
Input Pin Bias Current
●
VPH
PHASE Pin High Input Threshold
●
IPH
PHASE Pin Pull-Up Current
PHASE = 0V
VOH
High Output Voltage
VOL
Low Output Voltage
RONL
Output Pull-Down Resistance
2.85
Ω
RONH
Output Pull-Up Resistance
3.00
Ω
IPKL
Output Low Peak Current
1.70
A
IPKH
Output High Peak Current
1.40
A
1.4
1.7
V
±0.01
±10
µA
4.5
5.5
6.5
V
●
10
20
45
µA
IOUT = –10mA
●
11.92
11.97
IOUT = 10mA
●
Output
30
V
75
mV
Switching Timing (Note 2)
tRISE
Output Rise Time
COUT = 1nF
COUT = 4.7nF
●
●
17.5
48.0
35
85
ns
ns
tFALL
Output Fall Time
COUT = 1nF
COUT = 4.7nF
●
●
16.5
42.0
35
75
ns
ns
tPLH
Output Low-High Propagation Delay
COUT = 1nF
COUT = 4.7nF
●
●
38.0
40.0
70
75
ns
ns
tPHL
Output High-Low Propagation Delay
COUT = 1nF
COUT = 4.7nF
●
●
32
35
70
75
ns
ns
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All AC timing specificatons are guaranteed by design and are not
production tested.
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LTC1693-5
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TYPICAL PERFOR A CE CHARACTERISTICS
IN Threshold Voltage
vs Ambient Temperature
2.75
3.00
2.50
INPUT THRESHOLD VOLTAGE (V)
INPUT THRESHOLD VOLTAGE (V)
TA = 25°C
VIH
2.25
2.00
1.75
1.50
VIL
1.25
1.00
5
6
7
9
8
VCC (V)
11
10
1.4
VCC = 12V
2.75
VIH
2.50
2.25
2.00
1.75
1.50
VIL
1.25
1.00
– 50 –25
12
IN Threshold Hysteresis
vs Ambient Temperature
0
50
75 100
25
AMBIENT TEMPERATURE (°C)
1693-5 G01
VIH-VIL
1.1
1.0
0.9
0.8
– 50
125
5
VPH(H)
2
125
Rise/Fall Time vs Ambient
Temperature
19
18
VCC = 12V
COUT = 1nF
fIN = 100kHz
tRISE
17
20
tRISE
TIME (ns)
4
3
25
75 100
– 25
0
50
AMBIENT TEMPERATURE (°C)
1693-5 G03
TA = 25°C
COUT = 1nF
fIN = 100kHz
22
TIME (ns)
PHASE THRESHOLD VOLTAGE (V)
1.2
20
24
TA = 25°C
18
tFALL
16
tFALL
16
15
14
13
14
12
1
12
0
10
5
6
7
9
8
VCC (V)
10
11
12
11
5
6
7
9
8
VCC (V)
10
1693-5 G04
11
12
55
TA = 25°C
VCC = 12V
100 fIN = 100kHz
Propagation Delay vs Ambient
Temperature
45
TIME (ns)
40
60
40
45
40
tPHL
35
30
25
1000
30
15
0
100
COUT (pF)
tPHL
25
tFALL
10
tPLH
35
20
tRISE
1
VCC = 12V
COUT = 1nF
fIN = 100kHz
tPLH
TIME (ns)
80
50
TA = 25°C
COUT = 1nF
fIN = 100kHz
50
125
1693-5 G06
Propagation Delay vs VCC
120
20
10
50
25
0
75 100
–50 –25
AMBIENT TEMPERATURE (°C)
1693-5 G05
Rise/Fall Time vs COUT
TIME (ns)
1.3
Rise/Fall Time vs VCC
VPH(L)
VCC = 12V
1693-5 G02
PHASE Threshold Voltage vs VCC
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INPUT THRESHOLD HYSTERESIS (V)
IN Threshold Voltage vs VCC
10000
1693-5 G07
10
5
6
7
8
9
VCC (V)
10
11
12
1693-5 G08
20
– 50 – 25
50
100
25
75
0
AMBIENT TEMPERATURE (°C)
125
1693-5 G09
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LTC1693-5
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TYPICAL PERFOR A CE CHARACTERISTICS
Output Saturation Voltage
vs Temperature
Propagation Delay vs COUT
200
OUTPUT SATURATION VOLTAGE (mV)
TA = 25°C
VCC = 12V
fIN = 100kHz
TIME (ns)
40
tPLH
30
tPHL
Quiescent Current vs VCC
350
VCC = 12V
TA = 25°C
VIN = 0V
VOH (50mA) wrt VCC
QUIESCENT CURRENT (µA)
50
150
VOL (50mA)
100
50
VOH (10mA) wrt VCC
300
250
200
150
VOL (10mA)
20
1
100
COUT (pF)
10
1000
10000
0
– 55 – 35 –15
1693-5 G10
100
200
60
VOL (mV)
SWITCHING SUPPLY CURRENT (mA)
TA = 25°C
VCC = 12V
250
70
50
40
30
750kHz
20
10
200kHz
100kHz
25kHz
VOL
150
100
50
500kHz
0
0
1
10
100
COUT (pF)
1000
0
10000
10 20 30 40 50 60 70 80 90 100
OUTPUT CURRENT (mA)
1693-5 G13
1693-5 G14
Thermal Derating Curve
VOH vs Output Current
1400
TA = 25°C
VCC = 12V
TJ = 125°C
1200
POWER DISSIPATION (mW)
300
VOH (mV)
250
VOH
200
150
100
50
1000
800
600
400
200
0
0 10 20 30 40 50 60 70 80 90 100
OUTPUT CURRENT (mA)
1693-5 G15
4
10
VOL vs Output Current
80
350
9
8
VCC (V)
11
12
1693-5 G12
300
TA = 25°C
VCC = 12V
90
7
6
1693-5 G11
Switching Supply Current vs COUT
100
5
5 25 45 65 85 105 125
TEMPERATURE (°C)
0
– 55 – 35 –15 5 25 45 65 85 105 125
AMBIENT TEMPERATURE (°C)
1693-5 G16
LTC1693-5
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PIN FUNCTIONS
IN (Pin 1): Driver Input. The input has VCC independent
thresholds with hysteresis to improve noise immunity.
GND (Pin 4): Driver Ground. Connect to a low impedance
ground. The VCC bypass capacitor should connect directly
to this pin.
NC (Pins 2, 5, 6): No Connect.
OUT (Pin 7): Driver Output.
PHASE (Pin 3): Output Polarity Select. Connect this pin to
VCC or leave it floating for noninverting operation. Ground
this pin for inverting operation. The typical PHASE pin
input current when pulled low is 20µA.
VCC (Pin 8): Power Supply Input. The source of the external P-MOSFET should also connect directly to this pin.
This minimizes the AC current path and improves signal
integrity.
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TI I G DIAGRA
INPUT RISE/FALL TIME < 10ns
INPUT
VIH
VIL
NONINVERTING
OUTPUT OPERATION
90%
10%
tr
tPLH
INVERTING
OUTPUT OPERATION
tf
tPHL
90%
10%
tf
tPHL
tr
tPLH
1693-5 TD
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LTC1693-5
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APPLICATIONS INFORMATION
Overview
The LTC1693-5 single driver allows 3V- or 5V-based digital circuits to drive power P-channel MOSFETs at high
speeds. A power MOSFET’s gate-charge loss increases with
switching frequency and transition time. The LTC1693-5
is capable of driving a 1nF load with 16ns rise and fall times
using a VCC of 12V. This eliminates the need for higher
voltage supplies, such as 18V, to reduce the gate charge
losses.
The LTC1693-5’s 360µA quiescent current is an order of
magnitude lower than most other drivers/buffers. This
improves system efficiency in both standby and switching
operation. Since a power MOSFET generally accounts for
the majority of power loss in a converter, addition of the
LT1693-5 to a high power converter design greatly improves efficiency, using very little board space.
Input Stage
The LTC1693-5 employs 3V CMOS compatible input thresholds that allow a low voltage digital signal to drive standard
power P-channel MOSFETs. The LTC1693-5 incorporates
a 4V internal regulator to bias the input buffer. This allows
the 3V CMOS compatible input thresholds (VIH = 2.6V, VIL
= 1.4V) to be independent of variations in VCC. The 1.2V
hysteresis between VIH and VIL eliminates false triggering
due to ground noise during switching transitions. The
LTC1693-5’s input buffer has a high input impedance and
draws less than 10µA during standby.
Output Stage
The LTC1693-5’s output stage is essentially a CMOS
inverter, as shown by the P- and N-channel MOSFETs in
Figure 1 (P1 and N1). The CMOS inverter swings rail-torail, giving maximum voltage drive to the load. This large
voltage swing is important in driving external power
P-channel MOSFETs, whose RDS(ON) is inversely proportional to its gate overdrive voltage (VGS – VT).
The LTC1693-5’s peak output currents are 1.4A (P1) and
1.7A (N1) respectively. The N-channel MOSFET (N1) has
higher current drive capability so it can charge the power
MOSFET’s gate capacitance during high-to-low signal
transitions. When the power MOSFET’s gate is pulled high
by the LTC1693-5, its drain voltage is pulled low by its load
(e.g., a resistor or inductor). The slew rate of the drain
voltage causes current to flow back to the MOSFETs gate
through its gate-to-drain capacitance. If the MOSFET
driver does not have sufficient source current capability
(low output impedance), the current through the power
MOSFET’s Miller capacitance (CGD) can momentarily pull
the gate low, turning the MOSFET back on.
Rise/Fall Time
Since the power MOSFET generally accounts for the majority of power lost in a converter, it’s important to quickly
turn it either fully “on” or “off” thereby minimizing the transition time in its linear region. The LTC1693-5 has rise and
fall times on the order of 16ns, delivering about 1.4A to 1.7A
of peak current to a 1nF load with a VCC of only 12V.
The LTC1693-5 rise and fall times are determined by the
peak current capabilities of P1 and N1. The predriver,
shown in Figure 1 driving P1 and N1, uses an adaptive
method to minimize cross-conduction currents. This is
done with a 6ns nonoverlapping transition time. N1 is fully
turned off before P1 is turned-on and vice-versa using this
6ns buffer time. This minimizes any cross-conduction
currents while N1 and P1 are switching on and off yet is
short enough to not prolong their rise and fall times.
VCC
LTC1693-5
P1
CGS
OUT
POWER
MOSFET
N1
CGD
GND
LOAD
1693-5 F01
Figure 1. Capacitance Seen by OUT During Switching
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LTC1693-5
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APPLICATIONS INFORMATION
UVLO and Thermal Shutdown
Bypassing and Grounding
The LTC1693-5’s UVLO detector disables the input buffer
and pulls the output pin to VCC if VCC < 4V. The output
remains off from VCC = 1V to VCC = 4V. This ensures that
during start-up or improper supply voltage values, the
LTC1693-5 will keep the output power P-channel MOSFET
off.
LTC1693-5 requires proper VCC bypassing and grounding
due to its high speed switching (ns) and large AC currents
(A). Careless component placement and PCB trace routing
may cause excessive ringing and under/overshoot.
The LTC1693-5 also has a thermal detector that similarly
disables the input buffer and pulls the output pin to VCC if
junction temperature exceeds 145°C. The thermal shutdown circuit has 20°C of hysteresis. This thermal limit
helps to shut down the system should a fault condition
occur.
Input Voltage Range
LTC1693-5’s input pin is a high impedance node and
essentially draws neligible input current. This simplifies
the input drive circuitry required for the input.
The LTC1693-5 typically has 1.2V of hysteresis between
its low and high input thresholds. This increases the
driver’s robustness against any ground bounce noises.
However, care should still be taken to keep this pin from
any noise pickup, especially in high frequency switching
applications.
In applications where the input signal swings below the
GND pin potential, the input pin voltage must be clamped
to prevent the LTC1693-5’s parastic substrate diode from
turning on. This can be accomplished by connecting a
series current limiting resistor R1 and a shunting Schottky
diode D1 to the input pin (Figure 2). R1 ranges from 100Ω
to 470Ω while D1 can be a BAT54 or 1N5818/9.
To obtain the optimum performance from the LTC1693-5:
A. Mount the bypass capacitors as close as possible to the
VCC and GND pins. The leads should be shortened as
much as possible to reduce lead inductance. It is
recommended to have a 0.1µF ceramic in parallel with
a low ESR 4.7µF bypass capacitor.
For high voltage switching in an inductive environment,
ensure that the bypass capacitors’ VMAX ratings are
high enough to prevent breakdown. This is especially
important for floating driver applications.
B. Use a low inductance, low impedance ground plane to
reduce any ground drop and stray capacitance. Remember that the LTC1693-5 switches 1.5A peak currents and any significant ground drop will degrade
signal integrity.
C. Plan the ground routing carefully. Know where the large
load switching current is coming from and going to.
Maintain separate ground return paths for the input pin
and output pin. Terminate these two ground traces only
at the GND pin of the driver (STAR network).
D. Keep the copper trace between the driver output pin and
the load short and wide.
VCC
LTC1693-5
INPUT SIGNAL
GOING BEL0W
GND PIN
POTENTIAL
R1
D1
IN
PARASITIC
SUBSTRATE
DIODE
1693-5 F02
GND
Figure 2. Input Protection Against Negative Input Signals
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LTC1693-5
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PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 ± 0.004*
(3.00 ± 0.102)
8
7 6
5
0.118 ± 0.004**
(3.00 ± 0.102)
0.193 ± 0.006
(4.90 ± 0.15)
1
2 3
4
0.043
(1.10)
MAX
0.007
(0.18)
0.034
(0.86)
REF
0° – 6° TYP
0.021 ± 0.006
(0.53 ± 0.015)
SEATING
PLANE
0.009 – 0.015
(0.22 – 0.38)
0.0256
(0.65)
BSC
0.005 ± 0.002
(0.13 ± 0.05)
MSOP (MS8) 1100
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
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®
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Linear Technology Corporation
16935f LT/TP 0101 4K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 2001