Power Supply Works with FET Drivers, DrMOS and Power Blocks for Flexible Placement Near Microprocessors Theo Phillips As microprocessors demand progressively more current at lower voltages, it becomes important to minimize conduction losses by placing the power supply as close to the load as possible. This increases the value of every square millimeter of board space near the load—particularly when multiple power stages are used. It is also important to locate the DC/DC controller away from high current paths, which can be difficult when the MOSFET gate drivers are in the controller package, because the gate traces must also be kept short. Sometimes the best solution is to use external power train devices or discrete N-channel MOSFETs and associated gate drivers. The LTC3860 is a dual output step-down DC/DC controller designed to work in conjunction with drivers or power train devices such as DrMOS and power blocks, enabling flexible design configurations with PolyPhase® operation. Up to 12 stages can be paralleled to increase output current and clocked out of phase to minimize input and output filtering (Figure 1). In PolyPhase configurations, both output voltage (VOUT) and ground terminals are monitored using a single differential amplifier, enabling tight regulation even where IR losses occur through vias, trace runs and interconnects. Regulation is further enhanced by the accuracy of the 600mV reference, which is ±0.75% with junction temperatures from 0°C to 85°C. VSNSOUT1 VCC 0°, 180° CLKIN CLKOUT PHSMD FB1 FB2 ILIM2 COMP1 ILIM1 COMP2 IAVG TRACK/SS1,2 +60° VCC 60°, 240° CLKIN CLKOUT PHSMD FB1 FB2 ILIM2 COMP1 ILIM1 COMP2 IAVG TRACK/SS1,2 +60° VCC 120°, 300° CLKIN CLKOUT PHSMD FB1 FB2 ILIM2 COMP1 ILIM1 COMP2 IAVG TRACK/SS1,2 +90° Voltage mode operation ensures that per-phase currents up to 30A can be achieved while a stable switching waveform is maintained. In a current mode converter, the voltage on the output of the error amplifier controls the peak or valley switch current, such that the switch current must always be monitored. With typical sense voltages of less than 100mV and current sense elements having resistance of less than 1mΩ, the introduction of noise is always a concern. In contrast, the LTC3860 compares the differentially sensed error voltage on VOUT to a sawtooth ramp, which is on the order of 1V. The ramp controls duty cycle—the larger the error voltage, the longer each phase’s top switch stays on. A 2-PHASE, SINGLE OUTPUT REGULATOR USING INTEGRATED DRIVER-MOSFETs (DrMOS) VCC 210°, 30° CLKIN CLKOUT PHSMD FB1 FB2 ILIM2 COMP1 ILIM1 COMP2 IAVG TRACK/SS1,2 +60° VCC 270°, 90° CLKIN CLKOUT PHSMD FB1 FB2 ILIM2 COMP1 ILIM1 COMP2 IAVG TRACK/SS1,2 +60° VCC 330°, 150° CLKIN CLKOUT PHSMD FB1 FB2 ILIM2 COMP1 ILIM1 COMP2 IAVG TRACK/SS1,2 Figure 1. Pin interconnections for a 12-phase buck converter using the LTC3860 26 | July 2011 : LT Journal of Analog Innovation Citing needs for high power density, increased efficiency at high switching frequencies, and interoperability between controllers and power devices, Intel has issued a set of technical specifications for integrated driver-MOSFETs (DrMOS) used in step-down DC/DC converters powering its microprocessors. The compact layout reduces efficiency losses due to stray design features Because the LTC3860 has a PWM output instead of onboard MOSFET drivers, it can occupy board space away from critical high current paths. Its applications include high current power distribution and industrial systems, and telecom, DSP and ASIC supplies. VIN 9V + 470µF 100pF CMDSH-3 DRMBIAS 5V VCC 0.1µF 100k PGOOD RUN VCC 5V 30.1k VCC TRACK/SS1 VINSNS IAVG PGOOD1 RUN1 PWMEN1 PWM1 100pF 49.9Ω 3.16k 6.8nF VDIFF VOS VOS VCC SGND PWMEN1,2 FB1 COMP1 VSNSOUT VSNSN VSNSP COMP2 FB2 LTC3860 ILIM1 ISNS1P ISNS1N ISNS2N ISNS2P ILIM2 RUN2 TRACK/SS2 FREQ CLKIN CLKOUT PHSMD PGOOD2 PWMEN2 PWM2 1000pF VDIFF1 20k VCIN DISB PWM PWM1 1µF FREQ SET FOR 600kHz HSEN BOOT FDMF8704 VSWH PGND VIN 0.22µF SW1 0.19µH** VOSP 100µF 6.3V ×10* 1.74k 51.1k VOSN 0.22µF 0.22µF VCC CGND PWM DISB VCC VCIN 4.99k RUN * MURATA GRM32ERG0J107M ** WÜRTH 744355019 VIN CGND 4.99k PWM2 TRACK/SS 22µF 4.7µF DRMBIAS 5V PGND FDMF8704 VIN VSWH HSEN BOOT 1.74k SW2 0.19µH** 0.22µF 22µF 4.7µF VIN CMDSH-3 Figure 2. A 2-phase, single output converter using the FDMF8704 in each power stage to produce a 1V, 50A converter with all ceramic output capacitors inductance. Several manufacturers have produced compliant devices. They are expected to operate at >500kHz (preferably 1MHz), deliver 25A per phase at ~1V from a 5V–16V input, and occupy 8mm × 8mm or 6mm × 6mm packages with defined pinouts. They must accept a PWM input, which is used to alternately turn the top and bottom MOSFETs on and off when the input is high or low. It must be possible to turn both MOSFETs off (three-state), by leaving the PWM pin floating or by pulling the DISB pin of the DrMOS low. An external inductor is required. The LTC3860 provides a PWM signal compatible with DrMOS-compliant devices. For example, the Fairchild FDMF8704 DrMOS is specified for operation up to 1MHz at 25A per phase, and the LTC3860 can be programmed for a switching frequency from 200kHz –1.2MHz. The LTC3860’s high and low commands are interpreted by the FDMF8704 as top MOSFET on and bottom MOSFET on, respectively. This DrMOS does not recognize three-state signals on the PWM pin, but both of its MOSFETs turn off when its DISB pin is pulled low. The LTC3860’s PWMEN pulls high through an open drain whenever PWM is high or low. When PWM is three-state, an external resistor pulls the PWMEN pin low. Thus, three-state operation of the power stage is accomplished here by tying the PWMEN pin of the LTC3860 to the DISB pin of the DrMOS. Figure 2 is the schematic for a 2-phase, single output converter using the FDMF8704 in each power stage to produce a 1V, 50A converter. A switching frequency of 600kHz is selected by tying CLKIN low and FREQ high. The effective frequency is 1.2MHz, because the two channels operate 180° out of phase. By reducing the latency between clock cycles, the high switching frequency July 2011 : LT Journal of Analog Innovation | 27 The LTC3860 has internal current sharing, and only requires simple pin configurations and one external capacitor at the IAVG pin to run phases together. The IAVG pin stores a charge corresponding to the instantaneous average current of all phases. ILOAD 20A/DIV IL 5A/DIV IL 5A/DIV VOUT 100mV/DIV (AC-COUPLED) VOUT 50mV/DIV (AC-COUPLED) VOUT 50mV/DIV (AC-COUPLED) 20µs/DIV LOAD STEP = 10A TO 30A 4µs/DIV LOAD STEP = 10A TO 20A a Figure 3. Load transient response for the converter of Figure 2 improves transient response. Stable operation is possible with all ceramic output capacitors, which minimize the output ripple because of their low ESR. Figure 3 shows the converter’s transient response to a large load step. A common drawback of voltage mode converters is that they do not play well together when they are combined to increase power capability. They typically use the outputs of onboard op amps as their loop compensation nodes. Because these outputs are low impedance, they cannot just be tied together to balance the current from each power stage. An external circuit would be needed for each phase. The LTC3860 has internal current sharing, and only requires simple pin configurations and one external capacitor at the IAVG pin to run phases together. The IAVG pin stores a charge corresponding to the instantaneous average current of all phases. The slave channel’s FB pin is 28 | July 2011 : LT Journal of Analog Innovation 4µs/DIV LOAD STEP = 20A TO 10A b Figure 4. The converter of Figure 2 demonstrates stable current sharing at both edges of a load transient: (a) rising edge; (b) falling edge. connected to INTVCC , a single differential amplifier is placed ahead of the master’s FB pin, and each TRACK/SS, COMP, and output is tied to the other. The power stages are now actively balanced. One power good indicator, PGOOD1, reports undervoltage and overvoltage events. The maximum current sense mismatch between phases is ±2mV between channels on the same IC or on different ICs. This translates to tight current sharing between channels in PolyPhase applications, particularly when the current sense elements are well matched. Here, the Würth 744355019 inductors’ DC resistance is specified to have a tolerance of ±10% at 20°C. Figures 4a and 4b show that the inductor current levels follow each other closely during a load transient. A differential amplifier provides remote sensing of the output voltage. VSNSP and VSNSN are tied to VOUT and PGND at the point of load. The potential between these pins is translated, with unity gain, to a potential between VSNSOUT and SGND. VSNSOUT is tied to the feedback string leading to FB of the master channel. This arrangement overcomes error due to board interconnection losses, which often result in voltage offsets between power ground and SGND. For this 1V output, the difference between no load and full load VOUT is typically just 1mV. WHEN EFFICIENCY IS THE PRIORITY When efficiency is a higher priority than minimizing board space, operating the LTC3860 at a relatively low switching frequency reduces switching losses, while adding a synchronous MOSFET reduces conduction losses, particularly if the converter operates at low duty cycle. Since DrMOS packages contain just one main and one synchronous MOSFET, it becomes beneficial to use discrete FETs and drivers. The powerful LTC4449 driver is ideally suited to the task. The LTC4449 is designed to drive top and bottom MOSFETs in a synchronous design features When efficiency is a higher priority than minimizing board space, operating the LTC3860 at a relatively low switching frequency reduces switching losses, while adding a synchronous MOSFET reduces conduction losses, particularly if the converter operates at low duty cycle. Since DrMOS packages contain just one main and one synchronous MOSFET, it is beneficial to use discrete FETs and drivers. VIN VIN 7V TO 18V + 150µF DRMBIAS 5V PWM1 1µF VCC IN 0.1µF 100k VCC TRACK/SS1 VINSNS IAVG PGOOD1 RUN1 PWM1 1nF VDIFF1 20k 1% 220Ω 20k 1% 47pF 470pF 1.74k BG TS TG VOS1P M1 BG1 TG1 SW1 M2 VDIFF1 VOS1N VOS1P VCC SGND PWMEN1,2 FB1 COMP1 VSNSOUT VSNSN VSNSP COMP2 FB2 LTC3860 ILIM1 ISNS1P ISNS1N ISNS2N ISNS2P ILIM2 RUN2 49.9k 0.3µH + M3 VCC 1µF TRACK/SS2 FREQ CLKIN CLKOUT PHSMD PGOOD2 PWM2 RUN VCC 5V LTC4449 GND VLOGIC VCC BOOST 2.2Ω 4.7µF 22µF ×2 330µF ×3 VOUT 1.2V 25A 2.74k 0.22µF VOS1N SW1 47µF ×3 0.22µF M1,M2, M3: RJK0305DPB COUT: 330µF ×3 SANYO 2R5TPE330M9 L: 0.3µH PULSE PA0515.321NL PWM2 FREQ SET FOR 400kHz 0Ω Figure 5. The LTC3860 can use the LTC4449 to drive discrete MOSFETs. A synchronous MOSFET is added to improve efficiency. DC/DC converter. It accepts high, low and three-state inputs, with thresholds proportional to the LTC3860 power supply because the LTC4449 VLOGIC is at the same potential as the LTC3860 VCC . The VCC of the LTC3860 can range from 3V to 5.5V, and if it drops below the undervoltage lockout (UVLO) threshold (2.9V falling, 3.0V rising), both channels of the LTC3860 are disabled. UVLO ensures that the driver operates only when VCC is at safe levels. For maximum efficiency, the LTC4449’s top gate has pull-up and pull-down times of 8ns and 7ns; the bottom gate, 7ns and 4ns, while looking into 3000pF loads. Adaptive shoot-through protection ensures that the dead times are short enough to avoid power loss, but not so short that cross-conduction can occur. The driver is available in a low profile 2mm × 3mm DFN package. Figure 5 shows a schematic for a single channel, 400kHz, single phase converter using the LTC4449 and discrete MOSFETs. Figure 6 shows the improvement in efficiency compared to a DrMOS solution operating at the same frequency with the same passive components. Discrete MOSFETs also provide an input voltage capability higher than the DrMOS requirement (16V). The VINSNS pin of the LTC3860, which connects to the supply at the drain of the main MOSFET, can handle up to 24V. This allows LTC3860 applications to benefit from the large number of 30V MOSFETs available from various manufacturers. 400kHz operation is set by tying the FREQ and CLKIN pins low. Other switching frequencies, from 250kHz to 1.25MHz, can be programmed with a single resistor from FREQ to ground, or synchronized with an external signal source, with a smooth transition to and from the resistor-set frequency if an interruption in the sync signal occurs. No external PLL filter components are required for synchronization. The VINSNS pin monitors the input voltage and immediately adjusts the duty cycle in a manner inversely proportional to VIN, bypassing the feedback loop. This feature brings two benefits: a set of compensation values works across the entire VIN range, and during a line transient deviation in VOUT is minimal, as Figure 7 shows. July 2011 : LT Journal of Analog Innovation | 29 Instead of selecting power stage components, designers have the option of specifying an entire power stage on a small PC board. Known as a power block, it includes MOSFETs, a MOSFET driver, an inductor, and minimal input and output capacitors. 100 LTC4449 + MOSFETs 90 EFFICIENCY (%) 80 PIP212-12M 70 60 SW 5V/DIV 50 IL 10A/DIV 40 VOUT 100mV/DIV (AC-COUPLED) 30 20 VOUT 1V/DIV SHORT CIRCUIT 10 0 0 10 1 5µs/DIV 100 VIN = 12V VOUT = 1.2V ILOAD (A) 20ms/DIV L = PA0515.321NL RLIM = 61.9k Figure 6. The circuit of Figure 5 shows improved efficiency compared with a typical DrMOS solution. The compromise is in board space—a DrMOS occupies 36mm2 or 64mm2, and the driver and three MOSFETs occupy 101mm2, excluding the traces connecting the components. Figure 7. Through its VINSNS pin, the LTC3860 provides line feedforward compensation, preventing steady state and dynamic variations in VOUT when VIN is not constant. Figure 8. Short circuit behavior of the LTC3860 The ILIM pin provides a handle for setting current limit. It sources 20µ A through an external resistor, providing a voltage proportional to the current limit. When current limit is reached, the LTC3860 three-states the PWM output, resets the soft-start timer, and waits 32768 switching cycles before restarting (Figure 8). WHEN SIMPLICITY IS REQUIRED Connections are also provided for temperature sensing and inductor DCR sensing. They typically operate at 12V input, switching at 400kHz –500kHz and source 20A–40A. Unlike DrMOS, power blocks do not occupy a standard footprint. The LTC3860 has the ability to start up into a prebiased output. When the TRACK/SS voltage is below the voltage at FB, the LTC3860 will not switch (except for refresh pulses, which keep the boost capacitor charged). When TRACK/SS exceeds FB, switching commences, but inductor current is not allowed to reverse until the output reaches regulation, when continuous conduction mode begins. Thus, the output is allowed to rise gently (Figure 9). Instead of selecting power stage components, designers have the option of specifying an entire power stage on a small PC board. Known as a power block, it includes MOSFETs, a MOSFET driver, an inductor and minimal input and output capacitors. Electrical and mechanical connection is made through standoffs which surface mount onto the main board. Figure 9. Start-up into a prebiased output for discrete MOSFET application VOUT 500mV/DIV 1.2V 0.9V TRACK/SS 500mV/DIV IL 5A/DIV 2ms/DIV 30 | July 2011 : LT Journal of Analog Innovation The LTC3860 is shown in Figure 10 coupled with a Delta power block. This high current, 400kHz, 2-phase application can source 45A at its output. Since each channel operates 180° out of phase with respect to the other, the effective switching frequency is doubled, minimizing stress on the input and output capacitors. The power block’s physical dimensions are approximately 1.0"L × 0.5"W × 0.5"H, yielding a small solution size. Topside heat sinks are provided for the onboard MOSFETs, and 200LFM airflow at <55°C is required. design features The LTC3860 is a dual output step-down DC/DC controller designed to work in conjunction with drivers or power train devices such as DrMOS and power blocks, enabling flexible design configurations with PolyPhase operation. Up to 12 stages can be paralleled. SOME OPTIONS WITH THIS VERSATILE CONTROLLER The applications presented here use the drop across the inductor to sense current sharing and current limit. If a small increase in power loss is acceptable, greater accuracy may be achieved by using a discrete sense resistor in series with the inductor. The applications here also have output voltages in the 1.x range. Outputs as low as 0.6V (the reference voltage) or as high as 4V (the maximum output voltage of the differential amplifier) are also possible, with ±1% reference CONCLUSION voltage accuracy over an operating temperature range of –40°C to 125°C. The LTC3860 is a voltage mode buck controller that supports up to 12 phases in parallel with onboard current sharing. It may be used with DrMOS, power blocks or discrete MOSFETs and the LTC4449 driver. Because the LTC3860 has a PWM output instead of onboard MOSFET drivers, it can occupy board space away from critical high current paths. Its applications include high current power distribution and industrial systems, and telecom, DSP and ASIC supplies. The LTC3860 is available in a 32-lead 5mm × 5mm QFN package. n Instead of the default 2ms soft-start used by the applications here, adjustable softstart (>2ms) and tracking are also possible for each output. Longer soft-start times are achieved by adding >10nF from TRACK/SS to ground. Tracking is achieved by driving the pin with a DC voltage of less than 0.6V. The output regulates to the lowest of the internal 600mV reference, the voltage on the TRACK/SS pin, or the internal soft-start ramp for that channel. Figure 10. A 2-phase, single output converter using a 45A Delta power block for the power stage VIN 10V TO 14V + 180µF VCC 5V VCC 100pF 100k 1µF VOS1P 7V BIAS 4.7µF PGOOD PWM1 VCC VDIFF1 20k 1% 30.1k 1% 562Ω 100pF 4.64k 1.5nF VDIFF1 VOS1N VOS1P VCC LTC3860 VCC RUN 0.1µF FREQUENCY SET FOR 400kHz 34.8k 1% 53.6k ILIM1 0.22µF ISNS1P ISNS1N ISNS2N ISNS2P TRACK/SS1 TRACK/SS2 FREQ CLKIN CLKOUT PHSMD PGOOD2 PWM2 1500pF GND PWMEN1,2 FB1 COMP1 VSNSOUT VSNSN VSNSP COMP2 FB2 VINSNS IAVG PGOOD1 RUN1 RUN2 PWM1 RUN ILIM2 PWM2 0.22µF VCC +7V TEMP1 VOUT1 PWM1 POWER BLOCK DELTA D12S1R845A +CS1 –CS1 –CS2 51Ω + 100µF ×6 330µF ×6 GND VOUT1 1V 45A 4.7µF ×2 51Ω VOS1N +CS2 VIN1 VIN2 TEMP2 VOUT2 PWM2 GND 22µF 16V ×4 VIN 100k VCC July 2011 : LT Journal of Analog Innovation | 31