LINER LTC6101HVBIS5

LTC6101/LTC6101HV
High Voltage,
High-Side Current Sense
Amplifier in SOT-23
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FEATURES
DESCRIPTIO
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The LTC®6101/LTC6101HV are versatile, high voltage, high
side current sense amplifiers. Design flexibility is provided
by the excellent device characteristics; 300µV Max offset
and only 375µA (typical at 60V) of current consumption.
The LTC6101 operates on supplies from 4V to 60V and
LTC6101HV operates on supplies from 5V to 100V.
■
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■
■
■
Supply Range:
5V to 100V, 105V Absolute Maximum (LTC6101HV)
4V to 60V, 70V Absolute Maximum (LTC6101)
µV Max
Low Offset Voltage: 300µ
µs Response Time (0V to 2.5V on
Fast Response: 1µ
a 5V Output Step)
Gain Configurable with 2 Resistors
Low Input Bias Current: 170nA Max
PSRR: 110dB Min
4V to 60V (LTC6101)
5V to 100V (LTC6101HV)
Output Current: 1mA Max
Low Supply Current: 250µA, VS = 14V
Low Profile (1mm) SOT-23 (ThinSOTTM) Package
The wide operating supply range and high accuracy make
the LTC6101 ideal for a large array of applications from
automotive to industrial and power management. A maximum input sense voltage of 500mV allows a wide range of
currents to be monitored. The fast response makes the
LTC6101 the perfect choice for load current warnings and
shutoff protection control. With very low supply current,
the LTC6101 is suitable for power sensitive applications.
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APPLICATIO S
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The LTC6101 monitors current via the voltage across an
external sense resistor (shunt resistor). Internal circuitry
converts input voltage to output current, allowing for a small
sense signal on a high common mode voltage to be translated into a ground referenced signal. Low DC offset allows
the use of a small shunt resistor and large gain-setting
resistors. As a result, power loss in the shunt is reduced.
Current Shunt Measurement
Battery Monitoring
Remote Sensing
Power Management
, LTC and LT are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
The LTC6101 is available in 5-lead SOT-23 and 8-lead
MSOP packages.
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TYPICAL APPLICATIO
16-Bit Resolution Unidirectional Output into LTC2433 ADC
ILOAD
VSENSE
–
RIN
100Ω
4
L
O
A
D
Step Response
+
VSENSE–
5V TO 105V
∆VSENSE– = 100mV
3
+ –
2
5.5V
5V
5
5V
1
VOUT
VOUT
LTC6101HV
ROUT
4.99k
TA = 25°C
V+ = 12V
RIN = 100
ROUT = 5k
VSENSE+ = V+
1µF
IOUT = 100µA
TO µP
LTC2433-1
0.5V
0V
IOUT = 0
500ns/DIV
6101 TA01
VOUT =
ROUT
• VSENSE = 49.9VSENSE
RIN
6101 TA01b
6101fa
1
LTC6101/LTC6101HV
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ABSOLUTE
AXI U RATI GS
(Note 1)
Total Supply Voltage (V+ to V–)
LTC6101 ............................................................. 70V
LTC6101HV ...................................................... 105V
Minimum Input Voltage (–IN Pin) ................... (V+ – 4V)
Maximum Output Voltage (Out Pin) ........................... 9V
Input Current ..................................................... ±10mA
Output Short-Circuit Duration (to V–) ............. Indefinite
Operating Temperature Range
LTC6101C/LTC6101HVC .................... – 40°C to 85°C
LTC6101I/LTC6101HVI ...................... – 40°C to 85°C
LTC6101H/LTC6101HVH ................. – 40°C to 125°C
Specified Temperature Range (Note 2)
LTC6101C/LTC6101HVC ......................... 0°C to 70°C
LTC6101I/LTC6101HVI ...................... – 40°C to 85°C
LTC6101H/LTC6101HVH ................. – 40°C to 125°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
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PACKAGE/ORDER I FOR ATIO
TOP VIEW
TOP VIEW
–IN
NC
NC
OUT
1
2
3
4
8
7
6
5
OUT 1
+IN
V+
NC
V–
5 V+
V– 2
–IN 3
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 300°C/ W
4 +IN
S5 PACKAGE
5-LEAD PLASTIC TSOT-23
TJMAX = 150°C, θJA = 250°C/ W
ORDER PART NUMBER
MS8 PART MARKING*
ORDER PART NUMBER
S5 PART MARKING*
LTC6101ACMS8
LTC6101AIMS8
LTC6101AHMS8
LTC6101HVACMS8
LTC6101HVAIMS8
LTC6101HVAHMS8
LTBSB
LTBSB
LTBSB
LTBSX
LTBSX
LTBSX
LTC6101BCS5
LTC6101CCS5
LTC6101BIS5
LTC6101CIS5
LTC6101BHS5
LTC6101CHS5
LTC6101HVBCS5
LTC6101HVCCS5
LTC6101HVBIS5
LTC6101HVCIS5
LTC6101HVBHS5
LTC6101HVCHS5
LTBND
LTBND
LTBND
LTBND
LTBND
LTBND
LTBSZ
LTBSZ
LTBSZ
LTBSZ
LTBSZ
LTBSZ
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marketing: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grades and parametric grades are identified by a label on the shipping container.
6101fa
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LTC6101/LTC6101HV
ELECTRICAL CHARACTERISTICS
(LTC6101) The ● denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at TA = 25°C, RIN = 100Ω, ROUT = 10k, VSENSE+ = V+ (see Figure 1 for
details), 4V ≤ VS ≤ 60V unless otherwise noted.
SYMBOL
PARAMETER
VS
Supply Voltage Range
VOS
Input Offset Voltage
CONDITIONS
MIN
●
VSENSE = 5mV, Gain = 100, LTC6101A
VSENSE = 5mV, Gain = 100, LTC6101AC, LTC6101AI
VSENSE = 5mV, Gain = 100, LTC6101AH
TYP
4
V
±85
±300
±450
±535
µV
µV
µV
±150
±450
±810
µV
µV
±400
±1500
±2500
µV
µV
●
VSENSE = 5mV, Gain = 100, LTC6101C
●
∆VOS/∆T
Input Offset Voltage Drift
VSENSE = 5mV, LTC6101A
VSENSE = 5mV, LTC6101B
VSENSE = 5mV, LTC6101C
IB
Input Bias Current
RIN = 1M
±1
±3
±10
●
●
●
UNITS
60
●
●
VSENSE = 5mV, Gain = 100, LTC6101B
MAX
µV/°C
µV/°C
µV/°C
100
170
245
nA
nA
±2
±15
nA
●
RIN = 1M
●
VSENSE(MAX) Input Sense Voltage Full Scale
VOS within Specification, RIN = 1k
●
500
PSRR
VS = 6V to 60V, VSENSE = 5mV, Gain = 100
118
115
140
●
dB
dB
110
105
133
●
dB
dB
8
3
1
IOS
Input Offset Current
Power Supply Rejection Ratio
VS = 4V to 60V, VSENSE = 5mV, Gain = 100
VOUT
Maximum Output Voltage
12V ≤ VS ≤ 60V, VSENSE = 88mV
VS = 6V, VSENSE = 330mV, RIN = 1k, ROUT = 10k
VS = 4V, VSENSE = 550mV, RIN = 1k, ROUT = 2k
●
●
●
VOUT (0)
Minimum Output Voltage
VSENSE = 0V, Gain = 100, LTC6101A
VSENSE = 0V, Gain = 100, LTC6101AC, LTC6101AI
VSENSE = 0V, Gain = 100, LTC6101AH
●
●
VSENSE = 0V, Gain = 100, LTC6101B
mV
V
V
V
0
30
45
53.5
mV
mV
mV
0
45
81
mV
mV
0
150
250
mV
mV
●
VSENSE = 0V, Gain = 100, LTC6101C
●
IOUT
Maximum Output Current
6V ≤ VS ≤ 60V, ROUT = 2k, VSENSE = 110mV, Gain = 20
VS = 4V, VSENSE = 550mV, Gain = 2, ROUT = 2k
tr
Input Step Response
(to 2.5V on a 5V Output Step)
∆VSENSE = 100mV Transient, 6V ≤ VS ≤ 60V, Gain = 50
VS = 4V
1
1.5
µs
µs
BW
Signal Bandwidth
IOUT = 200µA, RIN = 100, ROUT = 5k
IOUT = 1mA, RIN = 100, ROUT = 5k
140
200
kHz
kHz
IS
Supply Current
VS = 4V, IOUT = 0, RIN = 1M
●
●
1
0.5
mA
mA
220
450
475
µA
µA
240
475
525
µA
µA
250
500
590
µA
µA
375
640
690
720
µA
µA
µA
●
VS = 6V, IOUT = 0, RIN = 1M
●
VS = 12V, IOUT = 0, RIN = 1M
●
VS = 60V, IOUT = 0, RIN = 1M
LTC6101I, LTC6101C
LTC6101H
●
●
6101fa
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LTC6101/LTC6101HV
ELECTRICAL CHARACTERISTICS
(LTC6101HV) The ● denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at TA = 25°C, RIN = 100Ω, ROUT = 10k, VSENSE+ = V+ (see Figure 1 for
details), 5V ≤ VS ≤ 100V unless otherwise noted.
SYMBOL
PARAMETER
VS
Supply Voltage Range
VOS
Input Offset Voltage
CONDITIONS
MIN
TYP
MAX
100
V
VSENSE = 5mV, Gain = 100, LTC6101HVA
VSENSE = 5mV, Gain = 100, LTC6101HVAC, LTC6101HVAI ●
●
VSENSE = 5mV, Gain = 100, LTC6101HVAH
±85
±300
±450
±535
µV
µV
µV
VSENSE = 5mV, Gain = 100, LTC6101HVB
±150
±450
±810
µV
µV
±400
±1500
±2500
µV
µV
●
5
●
VSENSE = 5mV, Gain = 100, LTC6101HVC
●
∆VOS/∆T
Input Offset Voltage Drift
VSENSE = 5mV, LTC6101HVA
VSENSE = 5mV, LTC6101HVB
VSENSE = 5mV, LTC6101HVC
IB
Input Bias Current
RIN = 1M
±1
±3
±10
●
●
●
UNITS
µV/°C
µV/°C
µV/°C
100
170
245
nA
nA
±2
±15
nA
●
RIN = 1M
●
VSENSE(MAX) Input Sense Voltage Full Scale
VOS within Specification, RIN = 1k
●
500
PSRR
VS = 6V to 100V, VSENSE = 5mV, Gain = 100
140
●
118
115
dB
dB
110
105
133
●
dB
dB
8
3
IOS
Input Offset Current
Power Supply Rejection Ratio
VS = 5V to 100V, VSENSE = 5mV, Gain = 100
VOUT
Maximum Output Voltage
12V ≤ VS ≤ 100V, VSENSE = 88mV
5V, VSENSE = 330mV, RIN = 1k, ROUT = 10k
●
●
VOUT (0)
Minimum Output Voltage
VSENSE = 0V, Gain = 100, LTC6101HVA
VSENSE = 0V, Gain = 100, LTC6101HVAC, LTC6101HVAI
VSENSE = 0V, Gain = 100, LTC6101HVAH
●
●
VSENSE = 0V, Gain = 100, LTC6101HVB
mV
V
V
0
30
45
53.5
mV
mV
mV
0
45
81
mV
mV
0
150
250
mV
mV
●
VSENSE = 0V, Gain = 100, LTC6101HVC
●
IOUT
Maximum Output Current
5V ≤ VS ≤ 100V, ROUT = 2k, VSENSE = 110mV, Gain = 20
tr
Input Step Response
(to 2.5V on a 5V Output Step)
∆VSENSE = 100mV Transient, 6V ≤ VS ≤ 100V, Gain = 50
VS = 5V
1
1.5
µs
µs
BW
Signal Bandwidth
IOUT = 200µA, RIN = 100, ROUT = 5k
IOUT = 1mA, RIN = 100, ROUT = 5k
140
200
kHz
kHz
IS
Supply Current
VS = 5V, IOUT = 0, RIN = 1M
●
1
mA
200
450
475
µA
µA
220
475
525
µA
µA
230
500
590
µA
µA
350
640
690
720
µA
µA
µA
350
640
690
720
µA
µA
µA
●
VS = 6V, IOUT = 0, RIN = 1M
●
VS = 12V, IOUT = 0, RIN = 1M
●
VS = 60V, IOUT = 0, RIN = 1M
LTC6101HVI, LTC6101HVC
LTC6101HVH
●
●
VS = 100V, IOUT = 0, RIN = 1M
LTC6101HVI, LTC6101HVC
LTC6101HVH
●
●
6101fa
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LTC6101/LTC6101HV
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC6101C/LTC6101HVC are guaranteed to meet specified
performance from 0°C to 70°C. The LTC6101C/LTC6101HVC are designed,
characterized and expected to meet specified performance from – 40°C to
85°C but are not tested or QA sampled at these temperatures. LTC6101I/
LTC6101HVI are guaranteed to meet specified performance from – 40°C to
85°C. The LTC6101H/LTC6101HVH are guaranteed to meet specified
performance from – 40°C to 125°C.
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TYPICAL PERFOR A CE CHARACTERISTICS
Input VOS vs Temperature
Input VOS vs Supply Voltage
REPRESENTATIVE
UNITS
600
TA = 0°C
0
INPUT OFFSET (µV)
INPUT OFFSET (µV)
2.5
20
400
200
0
– 200
– 400
–40
TA = 45°C
–60
–80
TA = 85°C
A GRADE
B GRADE
C GRADE
– 800
– 1000
–40 –20
0
RIN = 100
ROUT = 5k
VIN = 5mV
RIN = 100
ROUT = 5k
VIN = 5mV
–120
4
11
18
25 32 39
VSUPPLY (V)
46
0
60
VS = 4V
7
6
VS = 12V
8
6
VS = 6V
VS = 5V
4
VS = 4V
0
20 40 60 80
TEMPERATURE (°C)
100 120
6101 G06
0
–40 –20
5
VS = 12V
VS = 60V
4
3
VS = 6V
2
VS = 4V
2
2
RIN = 3k
ROUT = 3k
LTC6101: IOUT Maximum vs
Temperature
MAXIMUM IOUT (mA)
MAXIMUM OUTPUT (V)
VS = 6V
LTC6101
LTC6101HV
6101 G05
10
4
TA = 125°C
4 10 20 30 40 50 60 70 80 90 100
VSUPPLY (V)
VS = 100V
10
MAXIMUM OUTPUT (V)
53
12
VS = 60V
6
TA = 85°C
1
LTC6101HV: VOUT Maximum vs
Temperature
12
0
–40 –20
TA = 70°C
6101 G02
LTC6101: VOUT Maximum vs
Temperature
VS = 12V
TA = –40°C
0.5
6101 G01
8
TA = 0°C
1.5
TA = 125°C
–140
20 40 60 80 100 120
TEMPERATURE (°C)
TA = 25°C
2
TA = –40°C
–20
–100
– 600
Input Sense Range
40
MAXIMUM VSENSE (V)
800
1
0
20 40 60 80
TEMPERATURE (°C)
100 120
6101 G20
0
–40 –20
0
20 40 60 80
TEMPERATURE (°C)
100 120
6101 G07
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LTC6101/LTC6101HV
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TYPICAL PERFOR A CE CHARACTERISTICS
LTC6101HV: IOUT Maximum vs
Temperature
Output Error Due to Input Offset vs
Input Voltage
100
7
4
VS = 6V
VS = 5V
2
25
1
B GRADE
0.01
20 40 60 80
TEMPERATURE (°C)
100 120
–10
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
INPUT VOLTAGE (V)
6101 G21
160
120
350
IB (nA)
60
40
20
0
–40 –20
600
85°C
70°C
125°C
500
300
250
25°C
200
0°C
150
–40°C
100
20 40 60 80
TEMPERATURE (°C)
100 120
0 4 8 12 16 20 24 28 32 36 40 44 48 52 56 60
SUPPLY VOLTAGE (V)
–40°C
0°C
125°C
300
25°C
200
VIN = 0
RIN = 1M
0
10 20 30 40 50 60 70 80 90 100
SUPPLY VOLTAGE (V)
6101 G22
6101 G11
Step Response 0mV to 10mV
Step Response 10mV to 20mV
–
VSENSE
V+-10mV
VSENSE–
+
V -20mV
0.5V
1V
TA = 25°C
V+ = 12V
RIN = 100
ROUT = 5k
VSENSE+ = V+
TA = 25°C
V+ = 12V
RIN = 100
ROUT = 5k
VSENSE+ = V+
0V
70°C
0
0
6101 G10
V+
V+-10mV
400
85°C
100
VIN = 0
RIN = 1M
50
0
SUPPLY CURRENT (µA)
400
SUPPLY CURRENT (µA)
140
80
LTC6101HV: Supply Current vs
Supply Voltage
450
VS = 4V
1M
6101 G09
LTC6101: Supply Current vs
Supply Voltage
VS = 6V TO 100V
10k
100k
FREQUENCY (Hz)
1k
6101 G08
Input Bias Current vs
Temperature
100
IOUT = 200µA
10
–5
A GRADE
0
15
0
VS = 4V
0
–40 –20
20
5
C GRADE
0.1
IOUT = 1mA
TA = 25°C
RIN = 100
ROUT = 4.99k
30
GAIN (dB)
VS = 100V
1
35
10
5
3
TA = 25°C
GAIN =10
VS = 12V
OUTPUT ERROR (%)
MAXIMUM IOUT (mA)
6
Gain vs Frequency
40
0.5V
VOUT
TIME (10µs/DIV)
VOUT
TIME (10µs/DIV)
6101 G12
6101 G13
6101fa
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LTC6101/LTC6101HV
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TYPICAL PERFOR A CE CHARACTERISTICS
Step Response 100mV
V+
V+-100mV
5V
VSENSE–
V+
V+-100mV
CLOAD = 10pF
CLOAD = 1000pF
Step Response Rising Edge
Step Response 100mV
VSENSE–
TA = 25°C
V+ = 12V
CLOAD = 2200pF
RIN = 100
ROUT = 5k
VSENSE+ = V+
5V
TA = 25°C
V+ = 12V
RIN = 100
ROUT = 5k
VSENSE+ = V+
VSENSE–
∆VSENSE– =100mV
5.5V
5V
TA = 25°C
V+ = 12V
RIN = 100
ROUT = 5k
VSENSE+ = V+
VOUT
IOUT = 100µA
0V
VOUT
0.5V
0V
VOUT
TIME (100µs/DIV)
TIME (10µs/DIV)
IOUT = 0
TIME (500ns/DIV)
6101 G14
6101 G15
Step Response Falling Edge
6101 G16
PSRR vs Frequency
160
∆VSENSE– =100mV
5.5V
5V
140
TA = 25°C
V+ = 12V
RIN = 100
ROUT = 5k
VSENSE+ = V+
IOUT = 100µ
0.5V
0V
LTC6101,
V+ = 4V
120
VOUT
IOUT = 0
TIME (500ns/DIV)
6101 G17
PSRR (dB)
0V
100
80
LTC6101,
LTC6101HV,
V+ = 12V
60 R = 100
IN
ROUT = 10k
40 C
OUT = 5pF
GAIN = 100
LTC6101HV,
20 I
V+ = 5V
OUTDC = 100µA
VINAC = 50mVp
0
0.1
1
10 100 1k 10k 100k
FREQUENCY (Hz)
1M
6101 G19
6101fa
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LTC6101/LTC6101HV
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PI FU CTIO S
IN+ (Pin 4): Must be tied to the system load end of the
sense resistor, either directly or through a resistor.
OUT (Pin 1): Current Output. OUT (Pin 1) will source a
current that is proportional to the sense voltage into an
external resistor.
V+ (Pin 5): Positive Supply Pin. Supply current is drawn
through this pin. The circuit may be configured so that
the LTC6101 supply current is or is not monitored along
with the system load current. To monitor only system
load current, connect V+ to the more positive side of the
sense resistor. To monitor the total current, including the
LTC6101 current, connect V+ to the more negative side of
the sense resistor.
V – (Pin 2): Negative Supply (or Ground for Single-Supply
Operation).
IN – (Pin 3): The internal sense amplifier will drive IN– (Pin
3) to the same potential as IN+ (Pin 4). A resistor (RIN) tied
from V+ to IN– sets the output current IOUT = VSENSE/RIN.
VSENSE is the voltage developed across the external RSENSE
(Figure 1).
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BLOCK DIAGRA
ILOAD
–
VSENSE
+
VBATTERY
RSENSE
RIN
5
V+
10V
L
O
A
D
3
4
IN –
5k
–
IN +
5k
+
IOUT
10V
OUT
V–
LTC6101/LTC6101HV
2
1
6101 BD
VOUT = VSENSE x
ROUT
RIN
ROUT
Figure 1. LTC6101/LTC6101HV Block Diagram and Typical Connection
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APPLICATIO S I FOR ATIO
The LTC6101 high side current sense amplifier (Figure 1)
provides accurate monitoring of current through a userselected sense resistor. The sense voltage is amplified by
a user-selected gain and level shifted from the positive
power supply to a ground-referred output. The output
signal is analog and may be used as is or processed with
an output filter.
Theory of Operation
An internal sense amplifier loop forces IN– to have the
same potential as IN+. Connecting an external resistor,
RIN, between IN– and V+ forces a potential across RIN that
is the same as the sense voltage across RSENSE. A corresponding current, VSENSE/RIN, will flow through RIN. The
high impedance inputs of the sense amplifier will not
conduct this input current, so it will flow through an
internal MOSFET to the output pin.
The output current can be transformed into a voltage by
adding a resistor from OUT to V –. The output voltage is
then VO = V– + IOUT • ROUT.
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LTC6101/LTC6101HV
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APPLICATIO S I FOR ATIO
Useful Gain Configurations
Gain
RIN
ROUT
VSENSE at VOUT = 5V
IOUT at VOUT = 5V
20
499
10k
250mV
500µA
50
200
10k
100mV
500µA
100
100
10k
50mV
500µA
Selection of External Current Sense Resistor
The external sense resistor, RSENSE, has a significant
effect on the function of a current sensing system and
must be chosen with care.
First, the power dissipation in the resistor should be
considered. The system load current will cause both heat
and voltage loss in RSENSE. As a result, the sense resistor
should be as small as possible while still providing the
input dynamic range required by the measurement. Note
that input dynamic range is the difference between the
maximum input signal and the minimum accurately reproduced signal, and is limited primarily by input DC offset of
the internal amplifier of the LTC6101. In addition, RSENSE
must be small enough that VSENSE does not exceed the
maximum input voltage specified by the LTC6101, even
under peak load conditions. As an example, an application
may require that the maximum sense voltage be 100mV.
If this application is expected to draw 2A at peak load,
RSENSE should be no more than 50mΩ.
Once the maximum RSENSE value is determined, the minimum sense resistor value will be set by the resolution or
dynamic range required. The minimum signal that can be
accurately represented by this sense amp is limited by the
input offset. As an example, the LTC6101B has a typical
input offset of 150µV. If the minimum current is 20mA, a
sense resistor of 7.5mΩ will set VSENSE to 150µV. This is
the same value as the input offset. A larger sense resistor
will reduce the error due to offset by increasing the sense
voltage for a given load current.
Choosing a 50mΩ RSENSE will maximize the dynamic
range and provide a system that has 100mV across the
sense resistor at peak load (2A), while input offset causes
an error equivalent to only 3mA of load current.
Peak dissipation is 200mW. If a 5mΩ sense resistor is
employed, then the effective current error is 30mA, while
the peak sense voltage is reduced to 10mV at 2A, dissipating only 20mW.
The low offset and corresponding large dynamic range of
the LTC6101 make it more flexible than other solutions in
this respect. The 150µV typical offset gives 60dB of
dynamic range for a sense voltage that is limited to 150mV
max, and over 70dB of dynamic range if the rated input
maximum of 500mV is allowed.
Sense Resistor Connection
Kelvin connection of the IN– and IN+ inputs to the sense
resistor should be used in all but the lowest power applications. Solder connections and PC board interconnections that carry high current can cause significant error in
measurement due to their relatively large resistances. One
10mm x 10mm square trace of one-ounce copper is
approximately 0.5mΩ. A 1mV error can be caused by as
little as 2A flowing through this small interconnect. This
will cause a 1% error in a 100mV signal. A 10A load current
in the same interconnect will cause a 5% error for the same
100mV signal. By isolating the sense traces from the highcurrent paths, this error can be reduced by orders of
magnitude. A sense resistor with integrated Kelvin sense
terminals will give the best results. Figure 2 illustrates the
recommended method.
V+
RSENSE
RIN
4
3
+
–
LOAD
2
5
1
VOUT
LTC6101
ROUT
6101 F02
Figure 2. Kelvin Input Connection Preserves
Accuracy Despite Large Load Current
6101fa
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LTC6101/LTC6101HV
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APPLICATIO S I FOR ATIO
Selection of External Input Resistor, RIN
current measurement accuracy by limiting the result, while
increasing the low current measurement resolution.
The external input resistor, RIN, controls the transconductance of the current sense circuit. Since IOUT = VSENSE/
RIN, transconductance gm = 1/RIN. For example, if RIN =
100, then IOUT = VSENSE /100 or IOUT = 1mA for VSENSE =
100mV.
V+
RSENSE
RIN should be chosen to allow the required resolution while
limiting the output current. At low supply voltage, IOUT may
be as much as 1mA. By setting RIN such that the largest
expected sense voltage gives IOUT = 1mA, then the maximum output dynamic range is available. Output dynamic
range is limited by both the maximum allowed output
current and the maximum allowed output voltage, as well
as the minimum practical output signal. If less dynamic
range is required, then RIN can be increased accordingly,
reducing the max output current and power dissipation.
If low sense currents must be resolved accurately in a
system that has very wide dynamic range, a smaller RIN than
the max current spec allows may be used if the max
current is limited in another way, such as with a Schottky
diode across RSENSE (Figure 3a). This will reduce the high
LOAD
Figure 3a. Shunt Diode Limits Maximum Input Voltage to Allow
Better Low Input Resolution Without Overranging
This approach can be helpful in cases where occasional
large burst currents may be ignored. It can also be used in
a multirange configuration where a low current circuit is
added to a high current circuit (Figure 3b). Note that a
comparator (LTC1540) is used to select the range, and
transistor M1 limits the voltage across RSENSE LO.
Care should be taken when designing the board layout for
RIN, especially for small RIN values. All trace and interconnect impedances will increase the effective RIN value,
causing a gain error. In addition, internal device resistance
will add approximately 0.2Ω to RIN.
VLOGIC
(3.3V TO 5V)
CMPZ4697
7
10k
3
M1
Si4465
VIN
RSENSE HI
10m
ILOAD
VOUT
301
RSENSE LO
100m
4
+
–
4
+ –
LTC6101
8
5
Q1
CMPT5551
40.2k 6
301
301
301
4.7k
1.74M
2
DSENSE
6101 F03a
3
4
5
2
VIN
1
3
+ –
2
5
LTC1540
1
619k
1
LTC6101
HIGH
RANGE
INDICATOR
(ILOAD > 1.2A)
HIGH CURRENT RANGE OUT
250mV/A
7.5k
VLOGIC
BAT54C
R5
7.5k
(VLOGIC +5V) ≤ VIN ≤ 60V
LOW CURRENT RANGE OUT
2.5V/A
0 ≤ ILOAD ≤ 10A
6101 F03b
Figure 3b. Dual LTC6101s Allow High-Low Current Ranging
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10
LTC6101/LTC6101HV
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APPLICATIO S I FOR ATIO
Selection of External Output Resistor, ROUT
The output resistor, ROUT, determines how the output
current is converted to voltage. VOUT is simply IOUT • ROUT.
Output Error, EOUT, Due to the Amplifier DC Offset
Voltage, VOS
EOUT(VOS) = VOS • (ROUT/RIN)
In choosing an output resistor, the max output voltage
must first be considered. If the circuit that is driven by the
output does not limit the output voltage, then ROUT must
be chosen such that the max output voltage does not
exceed the LTC6101 max output voltage rating. If the
following circuit is a buffer or ADC with limited input range,
then ROUT must be chosen so that IOUT(MAX) • ROUT is less
than the allowed maximum input range of this circuit.
The DC offset voltage of the amplifier adds directly to the
value of the sense voltage, VSENSE. This is the dominant
error of the system and it limits the available dynamic
range. The paragraph “Selection of External Current Sense
Resistor” provides details.
In addition, the output impedance is determined by ROUT.
If the circuit to be driven has high enough input impedance, then almost any useful output impedance will be
acceptable. However, if the driven circuit has relatively low
input impedance, or draws spikes of current, such as an
ADC might do, then a lower ROUT value may be required in
order to preserve the accuracy of the output. As an
example, if the input impedance of the driven circuit is 100
times ROUT, then the accuracy of VOUT will be reduced by
1% since:
The bias current IB(+) flows into the positive input of the
internal op amp. IB(–) flows into the negative input.
VOUT = IOUT •
ROUT • RIN(DRIVEN)
ROUT + RIN(DRIVEN)
= IOUT • ROUT •
100
= 0.99 • IOUT • ROUT
101
Error Sources
The current sense system uses an amplifier and resistors
to apply gain and level shift the result. The output is then
dependent on the characteristics of the amplifier, such as
gain and input offset, as well as resistor matching.
Output Error, EOUT, Due to the Bias Currents,
IB(+) and IB(–)
EOUT(IBIAS) = ROUT((IB(+) • (RSENSE/RIN) – IB(–))
Since IB(+) ≈ IB(–) = IBIAS, if RSENSE << RIN then,
EOUT(IBIAS) ≈ –ROUT • IBIAS
For instance if IBIAS is 100nA and ROUT is 1kΩ, the output
error is 0.1mV.
Note that in applications where RSENSE ≈ RIN, IB(+) causes
a voltage offset in RSENSE that cancels the error due to
IB(–) and EOUT(IBIAS) ≈ 0. In applications where RSENSE <
RIN, the bias current error can be similarly reduced if an
external resistor RIN(+) = (RIN – RSENSE) is connected as
shown in Figure 4 below. Under both conditions:
EOUT(IBIAS) = ± ROUT • IOS; IOS = IB(+) – IB(–)
V+
RIN–
RSENSE
RIN+
4
3
+
Ideally, the circuit output is:
–
LOAD
VOUT
R
= VSENSE • OUT ; VSENSE = RSENSE • ISENSE
RIN
In this case, the only error is due to resistor mismatch,
which provides an error in gain only. However, offset
voltage, bias current and finite gain in the amplifier cause
additional errors:
2
5
1
VOUT
LTC6101
ROUT
RIN+ = RIN– – RSENSE
6101 F04
Figure 4. Second Input R Minimizes
Error Due to Input Bias Current
6101fa
11
LTC6101/LTC6101HV
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APPLICATIO S I FOR ATIO
If the offset current, IOS, of the LTC6101 amplifier is 2nA,
the 100 microvolt error above is reduced to 2 microvolts.
Adding RIN+ as described will maximize the dynamic range
of the circuit. For less sensitive designs, RIN+ is not
necessary.
Example:
If an ISENSE range = (1A to 1mA) and (VOUT/ISENSE) =
3V/1A
Then, from the Electrical Characteristics of the LTC6101,
RSENSE ≈ VSENSE (max) / ISENSE (max) = 500mV/1A =
500mΩ
Gain = ROUT/RIN = VOUT(max) / VSENSE (max) = 3V/500mV
=6
If the maximum output current, IOUT, is limited to 1mA,
ROUT equals 3V/1mA ≈ 3.01 kΩ (1% value) and RIN = 3kΩ/
6 ≈ 499Ω (1% value).
The output error due to DC offset is ±900µVolts (typ) and
the error due to offset current, IOS is 3k x 2nA = ±6µVolts
(typical), provided RIN+ = RIN–.
The maximum output error can therefore reach ±906µVolts
or 0.03% (–70dB) of the output full scale. Considering the
system input 60dB dynamic range (ISENSE = 1mA to 1A),
the 70dB performance of the LTC6101 makes this application feasible.
Output Error, EOUT, Due to the Finite DC Open Loop
Gain, AOL, of the LTC6101 Amplifier
This errors is inconsequential as the AOL of the LTC6101
is very large.
Output Current Limitations Due to Power Dissipation
The LTC6101 can deliver up to 1mA continuous current to
the output pin. This current flows through RIN and enters
the current sense amp via the IN(–) pin. The power
dissipated in the LTC6101 due to the output signal is:
POUT = (V–IN – VOUT) • IOUT
Since V–IN ≈ V+, POUT ≈ (V+ – VOUT) • IOUT
There is also power dissipated due to the quiescent supply
current:
PQ = IDD • V+
The total power dissipated is the output dissipation plus
the quiescent dissipation:
PTOTAL = POUT + PQ
At maximum supply and maximum output current, the
total power dissipation can exceed 100mW. This will
cause significant heating of the LTC6101 die. In order to
prevent damage to the LTC6101, the maximum expected
dissipation in each application should be calculated. This
number can be multiplied by the θJA value listed in the
package section on page 2 to find the maximum expected
die temperature. This must not be allowed to exceed
150°C, or performance may be degraded.
As an example, if an LTC6101 in the S5 package is to be run
at 55V ±5V supply with 1mA output current at 80°C:
PQ(MAX) = IDD(MAX) • V+(MAX) = 41.4mW
POUT(MAX) = IOUT • V+(MAX) = 60mW
TRISE = θJA • PTOTAL(MAX)
TMAX = TAMBIENT + TRISE
TMAX must be < 150°C
PTOTAL(MAX) ≈ 96mW and the max die temp
will be 104°C
If this same circuit must run at 125°C, the max die
temp will increase to 150°C. (Note that supply current,
and therefore PQ, is proportional to temperature. Refer to
Typical Performance Characteristics section.) In this condition, the maximum output current should be reduced to
avoid device damage. Note that the MSOP package has a
larger θJA than the S5, so additional care must be taken
when operating the LTC6101A/LTC6101HVA at high temperatures and high output currents.
The LTC6101HV can be used at voltages up to 105V. This
additional voltage requires that more power be dissipated
for a given level of current. This will further limit the
allowed output current at high ambient temperatures.
It is important to note that the LTC6101 has been designed
to provide at least 1mA to the output when required, and
can deliver more depending on the conditions. Care must
6101fa
12
LTC6101/LTC6101HV
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APPLICATIO S I FOR ATIO
be taken to limit the maximum output current by proper
choice of sense resistor and, if input fault conditions exist,
external clamps.
Output Filtering
The output voltage, VOUT, is simply IOUT • ZOUT. This makes
filtering straightforward. Any circuit may be used which
generates the required ZOUT to get the desired filter
response. For example, a capacitor in parallel with ROUT
will give a low pass response. This will reduce unwanted
noise from the output, and may also be useful as a charge
reservoir to keep the output steady while driving a switching circuit such as a mux or ADC. This output capacitor in
parallel with an output resistor will create a pole in the
output response at:
f –3dB =
allow a wide VSENSE range, it also allows the input reference to be separate from the positive supply (Figure 5).
Note that the difference between VBATT and V+ must be no
more than the common mode range listed in the Electrical
Characteristics table. If the maximum VSENSE is less than
500mV, the LTC6101 may monitor its own supply current,
as well as that of the load (Figure 6).
VBATTERY
RIN
RSENSE
4
3
+
–
V+
LOAD
2
5
1
2 • π • ROUT • COUT
1
VOUT
LTC6101
ROUT
Useful Equations
6101 F05
Figure 5. V+ Powered Separately from
Load Supply (VBATT)
Input Voltage: VSENSE = ISENSE • RSENSE
Voltage Gain:
Current Gain:
VOUT
R
= OUT
VSENSE
RIN
IOUT
ISENSE
Transconductance:
Transimpedance:
=
V+
RSENSE
RIN
RSENSE
4
ISENSE
= RSENSE •
3
+
1
IOUT
=
VSENSE RIN
VOUT
RIN
LOAD
2
–
5
ROUT
RIN
1
VOUT
LTC6101
ROUT
Input Common Mode Range
6101 F06
The inputs of the LTC6101 can function from 1.5V below
the positive supply to 0.5V above it. Not only does this
Figure 6. LTC6101 Supply Current
Monitored with Load
6101fa
13
LTC6101/LTC6101HV
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APPLICATIO S I FOR ATIO
Reverse Supply Protection
Some applications may be tested with reverse-polarity
supplies due to an expectation of this type of fault during
operation. The LTC6101 is not protected internally from
external reversal of supply polarity. To prevent damage
that may occur during this condition, a Schottky diode
should be added in series with V– (Figure 7). This will limit
the reverse current through the LTC6101. Note that this
diode will limit the low voltage performance of the LTC6101
by effectively reducing the supply voltage to the part by VD.
In addition, if the output of the LTC6101 is wired to a device
that will effectively short it to high voltage (such as
through an ESD protection clamp) during a reverse supply
condition, the LTC6101’s output should be connected
through a resistor or Schottky diode (Figure 8).
Response Time
The LTC6101 is designed to exhibit fast response to inputs
for the purpose of circuit protection or signal transmission. This response time will be affected by the external
circuit in two ways, delay and speed.
RSENSE
If the output current is very low and an input transient
occurs, there may be an increased delay before the output
voltage begins changing. This can be improved by increasing the minimum output current, either by increasing
RSENSE or decreasing RIN. The effect of increased output
current is illustrated in the step response curves in the
Typical Performance Characteristics section of this
datasheet. Note that the curves are labeled with respect to
the initial output currents.
The speed is also affected by the external circuit. In this
case, if the input changes very quickly, the internal amplifier will slew the gate of the internal output FET (Figure 1)
in order to maintain the internal loop. This results in
current flowing through RIN and the internal FET. This
current slew rate will be determined by the amplifier and
FET characteristics as well as the input resistor, RIN. Using
a smaller RIN will allow the output current to increase more
quickly, decreasing the response time at the output. This
will also have the effect of increasing the maximum output
current. Using a larger ROUT will decrease the response
time, since VOUT = IOUT • ROUT. Reducing RIN and increasing ROUT will both have the effect of increasing the voltage
gain of the circuit.
RSENSE
R1
100
4
L
O
A
D
R1
100
3
+ –
2
5
4
VBATT
LTC6101
D1
1
L
O
A
D
3
+ –
2
LTC6101
R2
4.99k
D1
6101 F07
VBATT
5
1
R3
1k
ADC
R2
4.99k
6101 F08
Figure 7. Schottky Prevents Damage During Supply Reversal
Figure 8. Additional Resistor R3 Protects
Output During Supply Reversal
6101fa
14
LTC6101/LTC6101HV
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TYPICAL APPLICATIO S
Bidirectional Current Sense Circuit with Separate Charge/Discharge Output
IDISCHARGE
ICHARGE
RSENSE
CHARGER
RIN C
100
RIN D
100
RIN D
100
4
+ –
2
L
O
A
D
RIN C
100
3
3
5
5
1
LTC6101
1
+
ROUT D
4.99k
4
– +
LTC6101
+
VOUT D VOUT C
–
–
VBATT
2
ROUT C
4.99k
6101 TA02
DISCHARGING: VOUT D = IDISCHARGE • RSENSE
CHARGING: VOUT C = ICHARGE • RSENSE
(
(
)
ROUT D
WHEN IDISCHARGE ≥ 0
RIN D
)
ROUT C
WHEN ICHARGE ≥ 0
RIN C
LTC6101 Monitors Its Own Supply Current
ILOAD
VS
RSENSE
4
2
CMPZ4697*
(10V)
ISUPPLY
R1
100
L
O
A
D
High-Side-Input Transimpedance Amplifier
4.75k
3
+ –
LASER MONITOR
PHOTODIODE
4.75k
4
5
VBATT
2
iPD
10k
3
+ –
5
1
LTC6101
+
R2
4.99k
VOUT
–
LTC6101
1
RL
6101 TA03
(
)
VOUT = 49.9 • RSENSE ILOAD + ISUPPLY
VO
VO = IPD • RL
*VZ SETS PHOTODIODE BIAS
VZ + 4 ≤ VS ≤ VZ + 60
6101 TA04
6101fa
15
LTC6101/LTC6101HV
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TYPICAL APPLICATIO S
16-Bit Resolution Unidirectional Output into LTC2433 ADC
ILOAD
VSENSE
–
+
RIN
100Ω
4
L
O
A
D
4V TO 60V
3
+ –
2
5
1µF
5V
2
VOUT
1
LTC6101
4
IN+
1
REF+
VCC
SCK
LTC2433-1
ROUT
4.99k
5
IN
SDD
–
CC
FO
REF– GND
3
ROUT
VOUT =
• VSENSE = 49.9VSENSE
RIN
6
9
8
TO µP
7
10
ADC FULL-SCALE = 2.5V
6101 TA06
Intelligent High-Side Switch with Current Monitor
10µF
63V
VLOGIC
14V
47k
FAULT
OFF ON
3
4
100Ω
1%
8
5
3
RS
LT1910
LTC6101
6
2
1
100Ω
1µF
1
VO
4
4.99k
2
5
SUB85N06-5
L
O
A
D
VO = 49.9 • RS • IL
IL
FOR RS = 5mΩ,
VO = 2.5V AT IL = 10A (FULL SCALE)
6101 TA07
6101fa
16
LTC6101/LTC6101HV
U
TYPICAL APPLICATIO S
48V Supply Current Monitor with Isolated Output with 105V Survivability
ISENSE
VSENSE
+
VS
RIN
–
LOAD
RSENSE
3
4
– +
5
2
V–
LTC6101HV
VLOGIC
ROUT
VOUT
ANY OPTOISOLATOR
V–
N = OPTOISOLATOR CURRENT GAIN
R
VOUT = VLOGIC – ISENSE • SENSE • N • ROUT
RIN
6101 TA08
Simple 500V Current Monitor
DANGER! Lethal Potentials Present — Use Caution
ISENSE
VSENSE
–
500V
+
RSENSE
4
L
O
A
D
2
RIN
100Ω
3
+ –
DANGER!!
HIGH VOLTAGE!!
5
1
LTC6101
62V
CMZ59448
M1
VOUT
M1 AND M2 ARE FQD3P50 TM
ROUT
VOUT =
• VSENSE = 49.9 VSENSE
RIN
M2
ROUT
4.99k
2M
6101 TA09
6101fa
17
LTC6101/LTC6101HV
U
PACKAGE DESCRIPTIO
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.42 ± 0.038
(.0165 ± .0015)
TYP
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.65
(.0256)
BSC
8
7 6 5
0.52
(.0205)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
1
2 3
4
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.127 ± 0.076
(.005 ± .003)
MSOP (MS8) 0204
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6101fa
18
LTC6101/LTC6101HV
U
PACKAGE DESCRIPTIO
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
0.62
MAX
0.95
REF
2.90 BSC
(NOTE 4)
1.22 REF
1.4 MIN
3.85 MAX 2.62 REF
2.80 BSC
1.50 – 1.75
(NOTE 4)
PIN ONE
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
0.01 – 0.10
1.00 MAX
DATUM ‘A’
0.30 – 0.50 REF
0.09 – 0.20
(NOTE 3)
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
1.90 BSC
S5 TSOT-23 0302
6101fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC6101/LTC6101HV
U
TYPICAL APPLICATIO
Bidirectional Current Sense Circuit with Combined Charge/Discharge Output
IDISCHARGE
ICHARGE
RSENSE
CHARGER
RIN C
RIN D
RIN C
RIN D
4
L
O
A
D
+ –
2
3
3
5
5
1
LTC6101
1
+
VOUT
4
– +
VBATT
2
LTC6101
ROUT
–
6101 TA05
DISCHARGING: VOUT = IDISCHARGE • RSENSE
CHARGING: VOUT = ICHARGE • RSENSE
(
(
)
ROUT
WHEN IDISCHARGE ≥ 0
RIN D
)
ROUT
WHEN ICHARGE ≥ 0
RIN C
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Over-The-Top is a trademark of Linear Technology Corporation.
6101fa
20
Linear Technology Corporation
LT/TP 0805 500 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
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