LINER LTC6906HS6

LTC6906
Micropower, 10kHz to 1MHz
Resistor Set Oscillator
in SOT-23
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FEATURES
DESCRIPTIO
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The LTC®6906 is a precision programmable oscillator that
is versatile, compact and easy-to-use. Micropower operation benefits portable and battery-powered equipment. At
100kHz, the LTC6906 consumes 12µA on a 3.3V supply.
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Supply Current: 12µA at 100kHz
<0.65% Frequency Accuracy (from 0°C to 70°C)
Frequency Range: 10kHz to 1MHz
One Resistor Sets the Oscillator Frequency
Single Supply: 2.25V to 5.5V
–40°C to 125°C Operating Temperature Range
No Decoupling Capacitor Needed
Start-Up Time Under 200µs at 1MHz
First Cycle After Power-Up is Accurate
150Ω CMOS Output Driver
Low Profile (1mm) SOT-23 (ThinSOTTM) Package
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APPLICATIO S
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A single resistor programs the oscillator frequency over a
10:1 range with better than 0.5% initial accuracy. The
output frequency can be divided by 1, 3 or 10 to span a
100:1 total frequency range, 10kHz to 1MHz.
The LTC6906 is easily programmed according to this
simple formula:
ƒOUT
Low Cost Precision Programmable Oscillator
Rugged, Compact Micropower Replacement for
Crystal and Ceramic Oscillators
High Shock and Vibration Environments
Portable and Battery-Powered Equipment
PDAs and Cellular Phones
, LTC and LT are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
⎧10, DIV Pin = V +
1MHz ⎛ 100k ⎞
⎪
=
•⎜
⎟ , N = ⎨3, DIV Pin = Open
N ⎝ RSET ⎠
⎪1, DIV Pin = GND
⎩
No decoupling capacitor is needed in most cases, yielding
an extremely compact solution occupying less than 20mm2.
Contact LTC Marketing for a version of the part with a
shutdown feature or lower frequency operation.
The LTC6906 is available in the 6-lead SOT-23 (ThinSOT)
package.
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TYPICAL APPLICATIO
Typical Supply Current vs Frequency
Micropower Clock Generator
2.25V TO 3.6V
÷10
÷3
÷1
V+
OUT
GND
GRD
DIV
CL = 5pF
TA = 25°C
80
10kHz TO 1MHz
SET
RSET
100k TO 1M
6906 TA01
POWER SUPPLY CURRENT (µA)
NO DECOUPLING
CAPACITOR
NEEDED
LTC6906
90
70
V+ = 3.6V
60
50
V+ = 2.25V
40
30
20
10
0
0
200
400
600
800
FREQUENCY (kHz)
1000
1200
6906 G04
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LTC6906
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PACKAGE/ORDER I FOR ATIO
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ABSOLUTE
RATI GS
(Note 1)
V + ................................................................– 0.3V to 6V
DIV to GND .................................... – 0.3V to (V + + 0.3V)
SET to GND ................................... – 0.3V to (V + + 0.3V)
GRD to GND .................................. – 0.3V to (V + + 0.3V)
TOP VIEW
Operating Temperature Range (Note 7)
LTC6906C .......................................... – 40°C to 85°C
LTC6906I ............................................ – 40°C to 85°C
LTC6906H ........................................ – 40°C to 125°C
Specified Temperature Range (Note 7)
LTC6906C ............................................... 0°C to 70°C
LTC6906I ............................................ – 40°C to 85°C
LTC6906H ........................................ – 40°C to 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
OUT 1
6 V+
GND 2
5 GRD
DIV 3
4 SET
S6 PACKAGE
6-LEAD PLASTIC TSOT-23
TJMAX = 150°C, θJA = 230°C/W
ORDER PART NUMBER
LTC6906CS6
LTC6906IS6
LTC6906HS6
S6 PART MARKING*
LTBJN
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature range.
*The temperature grade is identified by a label on the shipping container.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full specified
temperature range, otherwise specifications are at TA = 25°C. V+ = 2.25V to 3.6V, CL = 5pF, Pin 3 = V + unless otherwise noted.
All voltages are with respect to GND.
SYMBOL
PARAMETER
CONDITIONS
∆f
Frequency Accuracy (Notes 2, 3)
V+ = 2.7V to 3.6V 100kHz ≤ f ≤ 1MHz
100kHz ≤ f ≤ 1MHz, LTC6906C
100kHz ≤ f ≤ 1MHz, LTC6906I
f = 1MHz, LTC6906H
f = 100kHz, LTC6906H
●
●
●
●
100kHz ≤ f ≤ 1MHz
100kHz ≤ f ≤ 1MHz, LTC6906C
100kHz ≤ f ≤ 1MHz, LTC6906I
f = 1MHz, LTC6906H
f = 100kHz, LTC6906H
●
●
●
●
V+ = 2.25V
MIN
●
RSET
Frequency-Setting Resistor Range
∆f/∆T
Frequency Drift Over Temp (Note 3)
RSET = 316k
∆f/∆V
Frequency Drift Over Supply (Note 3)
Timing Jitter (Note 4)
≤ 1000k
Pin 3 = Open, 100k ≤ RSET ≤ 1000k
Pin 3 = 0V, 100k ≤ RSET ≤ 1000k
Sf
Long-Term Stability of Output Frequency
Pin 3 = V+
DC
Duty Cycle
V+
Operating Supply Range (Note 8)
IS
Power Supply Current
TYP
MAX
UNITS
±0.25
±0.5
±0.65
±1.3
±1.3
±2.2
%
%
%
%
%
±0.25
±0.7
±0.85
±1.3
±1.3
±2.2
%
%
%
%
%
100
1000
kΩ
±0.005
%/°C
V+ = 2.25V to 3.6V, 100k ≤ RSET ≤ 1000k
0.06
%/V
Pin 3 = V +, 100k ≤ RSET
0.03
0.07
0.15
%
%
%
●
300
●
45
●
2.25
50
ppm/√kHr
55
%
3.6
V
RSET = 1000k, Pin 3 = 0V, RL = 10M
(DIV = 1, fOUT = 100kHz)
V + = 3.6V
V + = 2.25V
●
●
12.5
10.0
18
15
µA
µA
RSET = 100k, Pin 3 = 0V, RL = 10M
(DIV = 1, fOUT = 1MHz)
V + = 3.6V
V + = 2.25V
●
●
78
60
100
80
µA
µA
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LTC6906
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full specified
temperature range, otherwise specifications are at TA = 25°C. V+ = 2.25V to 3.6V, CL = 5pF, Pin 3 = V + unless otherwise noted.
All voltages are with respect to GND.
SYMBOL
PARAMETER
VIH
High Level DIV Input Voltage
VIL
Low Level DIV Input Voltage
IDIV
DIV Input Current (Note 5)
VOH
VOL
High Level Output Voltage (Note 5)
Low Level Output Voltage (Note 5)
CONDITIONS
MIN
V+ = 3.6V
Pin 3 = V +
Pin 3 = 0V
V+ = 2.25V
●
●
V+ = 3.6V
V+ = 2.25V
●
●
TYP
MAX
3.1
2.05
UNITS
V
V
●
●
–2
1
–1
0.5
0.2
V
V
2
µA
µA
V + = 3.6V
IOH = – 100µA
IOH = – 1mA
●
●
3.40
2.80
3.59
3.30
V
V
V + = 2.25V
IOH = – 100µA
IOH = – 1mA
●
●
2.15
1.75
2.2
2.0
V
V
V + = 3.6V
IOL = 100µA
IOL = 1mA
●
●
0.02
0.15
0.2
0.8
V
V
V + = 2.25V
IOL = 100µA
IOL = 1mA
●
●
0.03
0.30
0.1
0.5
V
V
tr
OUT Rise Time (Note 6)
V + = 3.6V
V+ = 2.25V
10
25
ns
ns
tf
OUT Fall Time (Note 6)
V + = 3.6V
V+ = 2.25V
10
25
ns
ns
VGS
GRD Pin Voltage Relative to SET Pin
Voltage
–10µA ≤ IGRD ≤ 0.3µA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: Some frequencies may be generated using two different values of
RSET. For these frequencies, the error is specified assuming that the larger
value of RSET is used.
Note 3: Frequency accuracy is defined as the deviation from the fOUT
equation.
Note 4: Jitter is the ratio of the peak-to-peak deviation of the period to the
mean of the period. This specification is based on characterization and is
not 100% tested.
Note 5: Current into a pin is given as a positive value. Current out of a pin
is given as a negative value.
●
–10
10
mV
Note 6: Output rise and fall times are measured between the 10% and 90%
power supply levels.
Note 7: The LTC6906C is guaranteed to meet specified performance from
0°C to 70°C. The LTC6906C is designed, characterized and expected to
meet specified performance from –40°C to 85°C but is not tested or QA
sampled at these temperatures. The LTC6906I is guaranteed to meet
specified performance from –40°C to 85°C.
Note 8: Consult the Applications Information section for operation with
supplies higher than 3.6V.
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LTC6906
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TYPICAL PERFOR A CE CHARACTERISTICS
Typical Frequency Error
vs Temperature
Typical Frequency Error
vs Power Supply
0.50
0.40
0.40
1
0.30
0.10
RSET = 1M
RSET = 100k
–0.10
–0.20
0.30
2.25V
0
0.20
3.6V
–1
2.25V
3.6V
–2
0.10
V+ = 2.25V
0
V+ = 5V
–0.10
RSET = 1M
–3
–0.20
–0.30
–0.30
–4
–0.40
–0.50
2.25
3
4
SUPPLY VOLTAGE (V)
–0.40
–5
–50 –30 –10 10 30 50 70 90 110 130 150
TEMPERATURE (°C)
5
POWER SUPPLY CURRENT (µA)
180
70
V+ = 3.6V
60
50
V
40
+ = 2.25V
30
20
1MHz, 3.6V
100
1200
1MHz, 2.25V
60
40
0.60
0.55
VSET AT
V+ = 3.6V
VSET AT
V+ = 2.25V
0.50
0.45
0.35
100kHz, 2.25V
0
20
10
30
LOAD CAPACITANCE (pF)
40
0.30
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
6906 G06
6906 G05
Typical Supply Current
vs Temperature, 100kHz
Typical Supply Current
vs Temperature, 1MHz
90
18
CL = 5pF
85
0.65
0.40
100kHz, 3.6V
6906 G04
ISUPPLY
1200
0.70
80
0
1000
1000
RSET = 100k
0.75
120
0
400
600
800
FREQUENCY (kHz)
600
800
RSET (kΩ)
0.80
140
20
200
400
VSET vs Temperature (VSET is the
Voltage Measured at the RSET Pin)
TA = 25°C
160
10
0
200
6906 G03
SET PIN VOLTAGE (V)
200
CL = 5pF
TA = 25°C
80
0
Typical Supply Current
vs Load Capacitance
Typical Supply Current
vs Frequency
90
–0.50
6906 G02
6906 G01
POWER SUPPLY CURRENT (µA)
ERROR (%)
0.20
0
RSET = 100k
FREQUENCY ERROR (%)
FREQUENCY ERROR (%)
Typical Frequency Error vs RSET
0.50
2
17
AT V+ = 3.6V
CL = 5pF
SUPPLY CURRENT (µA)
SUPPLY CURRENT (µA)
16
80
75
70
ISUPPLY AT V+ = 2.25V
65
15
14
ISUPPLY AT V+ = 3.6V
13
12
11
ISUPPLY AT V+ = 2.25V
10
60
9
55
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
6906 G07
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–50 –30 –10 10 30 50 70 90 110 130 150
TEMPERATURE (°C)
6906 G08
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LTC6906
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PI FU CTIO S
OUT (Pin 1): Oscillator Output. The OUT pin swings from
GND to V+ with an output resistance of approximately
150Ω. For micropower operation, the load resistance
must be kept as high as possible and the load capacitance
as low as possible.
GND (Pin 2): Ground.
DIV (Pin 3): Divider Setting Input. This three-level input
selects one of three internal digital divider settings, determining the value of N in the frequency equation. Tie to GND
for ÷1, leave floating for ÷3 and tie to V+ for ÷10. When left
floating, the LTC6906 pulls Pin 3 to mid-supply with a
2.5M resistor. When Pin 3 is floating, care should be taken
to reduce coupling from the OUT pin and its trace to Pin 3.
Coupling can be reduced by increasing the physical space
between traces or by shielding the DIV pin with grounded
metal.
SET (Pin 4): Frequency Setting Resistor Input. Connect a
resistor, RSET, from this pin to GND to set the oscillator
frequency. For best performance use a precision metal- or
thin-film resistor of 0.5% or better tolerance and 50ppm/°C
or better temperature coefficient. For lower accuracy
applications, an inexpensive 1% thick-film resistor may be
used. Limit the capacitance in parallel with RSET to less
than 10pF to reduce jitter and to ensure stability. Capacitance greater than 10pF could cause the LTC6906 internal
feedback circuits to oscillate. The voltage on the SET pin
is approximately 650mV and decreases with temperature
by about –2.2mV/°C.
GRD (Pin 5): Guard Signal. This pin can be used to reduce
PC board leakage across the frequency setting resistor,
RSET. The GRD pin is held within a few millivolts of the SET
pin and shunts leakage current away from the SET pin. To
control leakage, connect a bare copper trace (a trace with
no solder mask) to GRD and loop it around the SET pin and
all PC board metal connected to SET.
V+ (Pin 6): Voltage Supply (2.25V to 3.6V). This supply is
internally decoupled with a 20Ω resistor in series with an
800pF capacitor. No external decoupling capacitor is
required for OUT pin loads less than 50pF. V+ should be
kept reasonably free of noise and ripple.
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BLOCK DIAGRA
DECOUPLING
NETWORK
6
2
V+ 20Ω
GND
V+
FREQUENCY-TO-CURRENT
CONVERTERS
5M
fOSC
THREE-LEVEL
INPUT
DETECTOR
800pF
IFB
IFB
DIV
3
5M
VSET ≅ VGRD ≅ 650mV
VSET
4
SET
RSET
ISET = IFB
DIVIDER
SELECT
VSET
BUFFER
5
GRD
VSET
–
+
OP AMP
VOLTAGE
CONTROLLED
OSCILLATOR
(MASTER OSCILLATOR)
150Ω DRIVER
fOSC
PROGRAMMABLE
DIVIDER (n)
(÷1, ÷3, ÷10)
OUT
1
fOSC = 1MHz • 100kΩ/RSET
6906 BD
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LTC6906
TEST CIRCUIT
LTC6906
SUPPLY
VOLTAGE
V+
OUT
GND
GRD
DIV
SET
EQUIVALENT CIRCUIT OF
OSCILLOSCOPE OR
FREQUENCY COUNTER PROBE
CTEST
RPROBE
10M
CPROBE
RSET
0.01%
10ppm/°C
6906 F01
CTEST = 1/(1/5pF – 1/CPROBE)
= 7.5pF FOR A 15pF SCOPE PROBE
Figure 1. Test Circuit with 5pF Effective Load
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EQUIVALE T I PUT A D OUTPUT CIRCUITS
6
V+
6
V+
20Ω
4
SET
6
1k
5
V+
GRD
200Ω
TOTAL OUTPUT
RESISTANCE
800pF
2
GND
2
6906 F02
Figure 2. V + Pin
6
GND
2
6906 F03
Figure 3. SET Pin
V+
6
DIV
6906 F04
Figure 4. GRD Pin
V+
fOUT
5M
3
GND
1
OUT
300Ω
5M
2
GND
6906 F05
Figure 5. DIV Pin
2
GND
6906 F06
Figure 6. OUT Pin
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LTC6906
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THEORY OF OPERATIO
The LTC6906 is a precision, resistor programmable oscillator (see Block Diagram). It generates a square wave at
the OUT pin with a period directly proportional to the value
of an external resistor, RSET. A feedback circuit measures
and controls the oscillator frequency to achieve the highest possible accuracy. In equilibrum, this circuit ensures
that the current in the SET pin, ISET, is balanced by IFB. IFB
is proportional to the master oscillator frequency, so we
have the relationship:
ISET = IFB = VSET • ƒOSC • COSC
(1)
Where COSC is a precision internal capacitor:
COSC = 10pF for the LTC6906
Solving for the oscillator period:
tOSC =
1
ƒ OSC
=
so
tOSC =
(2)
This is the fundamental equation for the LTC6906. It holds
regardless of how the SET pin is driven. When a resistor,
RSET, is connected from the SET pin to ground, we have
the relationship:
VSET
= RSET
ISET
ƒ OSC
= RSET • COSC
(4)
The period and frequency are determined exclusively by
RSET and the precision internal capacitor. Importantly, the
value of VSET is immaterial, and the LTC6906 maintains its
accuracy even though VSET is not a precision reference
voltage.
The digital dividers shown in the Block Diagram further
divide the master oscillator frequency by 1, 3 or 10
producing:
ƒ OSC
N
(5)
tOUT = N • tOSC
(6)
ƒ OUT =
VSET
• COSC
ISET
1
and
Table 1 gives specific frequency and period equations for
the LTC6906. The Applications Information section gives
further detail and discusses alternative ways of setting the
LTC6906 output frequency.
(3)
Table 1. Output Frequency Equations
PART NUMBER
LTC6906
FREQUENCY
ƒOUT =
1MHz
N
⎛ 100k ⎞
•⎜
⎟
⎝ RSET ⎠
PERIOD
DIVIDER RATIOS
⎛R ⎞
tOUT = N • 1µs • ⎜ SET ⎟
⎝ 100k ⎠
⎧10, DIV Pin = V +
⎪
N = ⎨3, DIV Pin = Open
⎪1, DIV Pin = GND
⎩
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LTC6906
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APPLICATIO S I FOR ATIO
Selecting RSET and the Divider Ratio
10000
÷10
1000
÷3
÷1
RSET (kΩ)
The LTC6906 contains a master oscillator followed by a
digital divider (see Block Diagram). RSET determines the
master oscillator frequency and the DIV pin sets the
divider ratio, N. The range of frequencies accessible in
each divider ratio overlap, as shown in Figure 7. This
figure is derived from the equations in Table 1. For any
given frequency, power can be minimized by minimizing the master oscillator frequency. This implies maximizing RSET and using the lowest possible divider ratio,
N. The relationship between RSET, N and the unloaded
power consumption is shown in Figure 8, where we can
clearly see that supply current decreases for large values
of RSET. For a discussion of jitter and divide ratio, refer to
page 11.
100
10
1
10
100
1000
OUTPUT FREQUENCY (kHz)
6906 F07
Figure 7. RSET vs Desired Output Frequency (LTC6906)
80
CLOAD = 0
V+ = 3V
TA = 25°C
70
Minimizing Power Consumption
ƒOUT and CLOAD)
ISUPPLY (µA)
60
The supply current of the LTC6906 has four current
components:
• Constant (Independent V+,
50
40
30
• Proportional to ISET (which is the current in RSET)
20
• Proportional to V+, ƒOUT and CLOAD
10
0
100
• Proportional to V+ and RLOAD
1000
RSET (kΩ)
An approximate expression for the total supply current is:
I+ ≅ 5µA + 6 • ISET + V + • ƒ OUT • (CLOAD + 5pF ) +
≅ 5µA + 6 •
10000
V+
2 • RLOAD
V+
VSET
+ V + • ƒ OUT • (CLOAD + 5pF ) +
2 • RLOAD
RSET
VSET is approximately 650mV at 25°C, but varies with
temperature. This behavior is shown in the Typical Performance Characteristics.
Power can be minimized by maximizing RSET, minimizing
the load on the OUT pin and operating at lower frequencies. Figure 9 shows total supply current vs frequency
6906 F09
Figure 8. Unloaded Supply Current vs RSET
under typical conditions. Below 100kHz the load current
is negligible for the 5pF load shown.
Guarding Against PC Board Leakage
The LTC6906 uses relatively large resistance values for
RSET to minimize power consumption. For RSET = 1M, the
SET pin current is typically only 6.5µA. Thus, only 6.5nA
leaking into the SET pin causes a 0.1% frequency error.
Similarly, 1G of leakage resistance across RSET (1000 •
RSET) causes the same 0.1% error.
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LTC6906
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APPLICATIO S I FOR ATIO
80
Bypassing the Power Supply
V+ = 2.7V
POWER SUPPLY CURRENT (µA)
70
60
The LTC6906 has on-chip power supply decoupling that
eliminates the need for an external decoupling capacitor in
most cases. Figure 11 shows a simplified equivalent
circuit of the output driver and on-chip decoupling network. When the output driver switches from low to high,
the 800pF capacitor delivers the current needed to charge
the off-chip capacitive load. Within nanoseconds the system power supply recharges the 800pF capacitor.
÷1
50
÷3
40
÷10
30
20
10
0
0
400
600
200
800 1000 1200
MASTER OSCILLATOR FREQUENCY (kHz)
V+
6906 F09
6
V+
LTC6906-1
Figure 9. Supply Current vs Frequency
Achieving the highest accuracy requires controlling potential leakage paths. PC board leakage is aggravated by
both dirt and moisture. Effective cleaning is a good first
step to minimizing leakage, and some PC board manufacturers offer high impedance or low leakage processing
options.
Another effective method for controlling leakage is to shunt
the leakage current away from the sensitive node through
a low impedance path. The LTC6906 provides a signal on
the GRD pin for this purpose. Figure 10 shows a PC board
layout that uses the GRD pin and a “guard ring” to absorb
leakage currents. The guard ring surrounds the SET pin
and the end of RSET to which it is connected. The guard ring
must have no solder mask covering it to be effective. The
GRD pin voltage is held within a few millivolts of the SET
pin voltage, so any leakage path between the SET pin and
the guard ring generates no leakage current.
LTC6906
1
OUT
2
GND
3
DIV
V+
NO SOLDER MASK
OVER THE GUARD RING
6
GRD
5
SET
GUARD
RING
4
RSET
NO LEAKAGE
CURRENT
LEAKAGE
CURRENT
6906 F10
Figure 10. PC Board Layout with Guard Ring
fOUT
1
OUT
20Ω
300Ω
CLOAD
800pF
2
GND
ESD DIODES
DRIVER
DECOUPLING
NETWORK
6906 F11
Figure 11. Simplified Equivalent of the Output Driver
and On-Chip Decoupling Circuit
Figure 12 shows a test circuit for evaluating performance
of the LTC6906 with a highly inductive, 330nH power
supply. Figure 13 shows the effectiveness of the
on-chip decoupling network. For CLOAD = 5pF to 50pF, the
output waveforms remain well formed.
The extremely low supply current of the LTC6906 allows
operation with substantial resistance in the power supply.
Figure 14 shows a test circuit for evaluating performance
of the LTC6906 with a highly resistive, 100Ω power
supply. Figure 15 shows the effectiveness of the on-chip
decoupling network. For CLOAD = 5pF to 50pF, the output
waveforms remain well formed. With a 50pF load, a very
small (2.5%) slow tail can be seen on the rising edge. The
output waveform is still well formed even in this case. The
ability of the LTC6906 to operate with a resistive supply
permits supplying power via a CMOS logic gate or
microcontroller pin. Since the LTC6906 has a turn-on time
of less than 200µsec, this technique can be used to enable
the device only when needed and further reduce power
consumption.
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LTC6906
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APPLICATIO S I FOR ATIO
LS
330nH
3.3V
LTC6906
V+
OUT
GND
GRD
DIV
RS
100Ω
1MHz
3.3V
CLOAD
SET
LTC6906
1MHz
V+
OUT
GND
GRD
DIV
SET
RSET
100k
RSET
100k
6906 F14
6906 F12
Figure 14. Test Circuit with a Resistive Power Supply
3.5
3.5
3
3
VOUT (V)
VOUT (V)
Figure 12. Test Circuit with an Inductive Power Supply
2
1
4.75
4.95
4.85
TIME (µs)
2
1
CLOAD = 5pF
CLOAD = 10pF
CLOAD = 20pF
CLOAD = 50pF
0
4.65
5.05
CLOAD
5.15
6906 F13
Figure 13. Output Waveforms with
an Inductive Supply (See Figure 12)
Start-Up Time
When the LTC6906 is powered up, it holds the OUT pin
low. After the master oscillator has settled, the OUT pin is
enabled and the first output cycle is guaranteed to be
within specification. The time from power-up to the first
output transition is given approximately by:
tSTART ≅ 64 • tOSC + 100µs
The digital divider ratio, N, does not affect the start-up
time.
Power Supply Rejection
The LTC6906 has a very low supply voltage coefficient,
meaning that the output frequency is nearly insensitive to
the DC power supply voltage. In most cases, this error
term can be neglected.
High frequency noise on the power supply (V+) pin has the
potential to interfere with the LTC6906’s master oscillator.
0
0.4
CLOAD = 5pF
CLOAD = 10pF
CLOAD = 20pF
CLOAD = 50pF
0.5
0.6
0.7 0.8
TIME (µs)
0.9
1.0
1.1
6906 F15
Figure 15. Output Waveforms with
a Resistive Supply (See Figure 14)
Periodic noise, such as that generated by a switching
power supply, can shift the output frequency or increase
jitter. The risk increases when the fundamental frequency
or harmonics of the noise fall near the master oscillator
frequency. It is relatively easy to filter the LTC6906 power
supply because of the very low supply current. For example, an RC filter with R = 160Ω and C = 10µF provides
a 100Hz lowpass filter while dropping the supply voltage
only about 10mV.
Operating the LTC6906 with Supplies Higher
Than 3.6V
The LTC6906 may also be used with supply voltages
between 3.6V and 5.5V under very specific conditions. To
ensure proper functioning above 3.6V, a filter circuit must
be attached to the power supply and located within 1cm of
the device. A simple RC filter consisting of a 100Ω resistor
and 1µF capacitor (Figure 16) will ensure that supply
resonance at higher supply voltages does not induce
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10
LTC6906
U
W
U U
APPLICATIO S I FOR ATIO
unpredictable oscillator behavior. Accuracy under higher
supplies may be estimated from the typical Frequency vs
Supply Voltage curves in the Typical Performance Characteristics section of this data sheet.
V+
3.6V TO 5.5V DC
100Ω
OUT
GND
GRD
DIV
SET
V
1µF
RSET
6906 F16
Figure 16. Using the LTC6906 at Higher Supply Voltages
Alternative Methods for Setting the Output Frequency
Any means of sinking current from the SET pin will control
the output frequency of the LTC6906. Equation 2 (repeated below) gives the fundamental relationship between
frequency and the SET pin voltage and current:
tOSC =
1
ƒ OSC
V
= SET • 10pF
ISET
If the SET pin is driven with a current source generating
ISET, the oscillator output frequency will be:
ISET
10pF
ƒ OSC ≅
ISET
⎞
⎛
25.9mV • n⎜
⎟ – 2.3mV / °C
–
18
⎝ 82 • 10 A ⎠
LTC6906
+
Performance graphs. VSET changes approximately –2.3mV/
°C. At room temperature VSET increases 18mV/octave or
60mV/decade of increase in ISET.
Figure 17 and Figure 18 show a current controlled oscillator and a voltage controlled oscillator. These circuits are
not highly accurate if used alone, but can be very useful if
they are enclosed in an overall feedback circuit such as a
phase-locked loop.
LTC6906
V+
(2)
V+
OUT
GND
GRD
DIV
SET
100kHz TO 1MHz
ICTRL
0.65µA TO 6.5µA
6906 F17
This equation shows that the LTC6906 converts conductance (ISET/VSET) to frequency or, equivalently, converts
resistance (RSET = VSET/ISET) to period.
VSET is the voltage across an internal diode, and as such
it is given approximately by:
VSET ≅ VT • Loge
ISET
IS
Figure 17. Current Controlled Oscillator
LTC6906
V+
V+
OUT
GND
GRD
DIV
SET
6906 F18
ISET
⎛
⎞
≅ 25.9mV • Loge ⎜
⎟ – 2.3mV/ °C
⎝ 82 • 10 –18 A ⎠
1MHz TO 100kHz
RSET
100k
VCTRL
0V TO 0.585V
Figure 18. Voltage Controlled Oscillator
Jitter and Divide Ratio
where
VT = kT/q = 25.9mV at T = 300°K (27°C)
IS ≅ 82 • 10–18 Amps
(IS is also temperature dependent)
VSET varies with temperature and the SET pin current. The
response of VSET to temperature is shown in the Typical
At a given output frequency, a higher master oscillator
frequency and a higher divide ratio will result in lower jitter
and higher power supply dissipation. Indeterminate jitter
percentage will decrease by a factor of slightly less than
the square root of the divider ratio, while determinate jitter
will not be similarly attenuated. Please consult the specification tables for typical jitter at various divider ratios.
6906fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC6906
U
TYPICAL APPLICATIO S
Setting Frequency to 0.1% Resolution with
Standard Resistors
10kHz TO 1MHz
LTC6906
2.25V TO 3.6V
V
÷10
÷3
÷1
+
Trimming the Frequency
LTC6906
OUT
GND
GRD
DIV
SET
2.25V TO 3.6V
RA
RA < RB/10
1% THIN FILM
RB
100k TO 1M
0.1% THIN FILM
V+
OUT
GND
GRD
DIV
Sine Wave Oscillator
1MHz WITH
±2.5% RANGE
1MHz
LTC6906
2.25V TO 3.6V
SET
RA
97.6k
V+
OUT
GND
GRD
DIV
SET
0.1µF
1k
RSET
100k
RB
5k
L1
100µH
C1
240pF
6906 TA05
6906 TA03
6906 TA04
U
PACKAGE DESCRIPTIO
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
0.62
MAX
2.90 BSC
(NOTE 4)
0.95
REF
1.22 REF
2.80 BSC
1.4 MIN
3.85 MAX 2.62 REF
1.50 – 1.75
(NOTE 4)
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45
6 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
0.01 – 0.10
1.00 MAX
DATUM ‘A’
0.30 – 0.50 REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
0.09 – 0.20
(NOTE 3)
1.90 BSC
S6 TSOT-23 0302
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
RELATED PARTS
PART NUMBER
LTC1799
LTC6900
LTC6902
LTC6903/LTC6904
LTC6905
DESCRIPTION
1kHz to 33MHz ThinSOT Oscillator
1kHz to 20MHz ThinSOT Oscillator
Multiphase Oscillator with Spread Spectrum Frequency Modulation
1kHz to 68MHz Serial Port Programmable Oscillator
17MHz to 170MHz ThinSOT Oscillator
COMMENTS
Single Output, Greater Frequency Range
Single Output, Greater Frequency Range
2-, 3- or 4-Phase Outputs
Very Wide Frequency Range with Digital Programmability
Single Output, Higher Frequency
6906fa
12
Linear Technology Corporation
LT/LWI/LT 0705 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005