P2005A/S November 2006 rev 1.3 Low Frequency EMI Reduction IC Features deviations • FCC approved method of EMI attenuation. • Provides up to 15dB of EMI suppression. • Generates a 1X or ½X low EMI spread spectrum Input frequency range: 8MHz to 32MHz. • Internal loop filter minimizes external • P2005A: ± 1% to ± 3% • P2005S: ± 0.6% to ± 1.8% to ±3.0%. Refer source, allowing system wide reduction of EMI of down stream clock and data dependent signals. The P2005A/S number of circuit board layers ferrite beads, shielding and other passive components that are traditionally required to pass EMI regulations. Frequency deviation: • ±0.6% allows significant system cost savings by reducing the components and board space. • form reduces electromagnetic interference (EMI) at the clock clock of the input frequency. • ranging Frequency Deviation Selections Table. The P2005A/S The P2005A/S uses the most efficient and optimized SSON# control pin for spread spectrum enable and disable options. • Low cycle-to-cycle jitter. • 3.3V or 5V operating voltage range. • Ultra-low power CMOS design. • Available in 8-pin SOIC and TSSOP. modulation profile approved by the FCC and is implemented in a proprietary all digital method. The P2005A/S modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system Product Description EMI compared to the typical narrow band signal produced The P2005A/S is a versatile spread spectrum frequency EMI by increasing a signal’s bandwidth is called ‘spread modulator spectrum clock generation’. designed frequencies from by oscillators and most frequency generators. Lowering specifically 8MHz to for 32MHz. input Refer clock Output Frequency Selection Table. The P2005A/S can generate Applications an EMI reduced clock from crystal, ceramic resonator, or system clock. The P2005A/S offers various percentage The P2005A/S is targeted towards EMI management for high-speed digital applications such as PC peripheral devices, consumer electronics and embedded controller systems. SR0 SSON# BlockDiagram VDD DIV2 PLL Modulation XIN Crystal Oscillator XOUT Frequency Divider Feedback Divider Phase Detector Loop Filter VCO Output Divider MODOUT VSS PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200, Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018 www.pulsecoresemi.com Notice: The information in this document is subject to change without notice. P2005A/S November 2006 rev 1.3 Pin Configuration XIN /CLK 1 XOUT 2 DIV2 VSS 8 VDD 7 ModOUT 3 6 SSON# 4 5 SR0 P2005A/S Pin Description Pin# Pin Name Type 1 XIN/CLK I 2 XOUT O Crystal output. Digital logic input used to select normal output mode or divide-by-two output mode. When this pin is HIGH, the frequency of the output clock is the same as the input clock frequency. When it is tied low, the output frequency is half the input clock frequency. This pin has an internal pull-up resistor. 3 DIV2 I 4 VSS P Description Connect to crystal or clock. Ground to entire chip. Connect to system ground. Digital logic input used to select Spreading Range Refer Modulation Output and Spreading Range Selection Table. This pin has an internal pull-up resistor. Digital logic input used to enable Spread Spectrum function (Active LOW). Spread Spectrum function enabled when LOW, disabled when HIGH. This pin has an internal pulllow resistor. 5 SR0 I 6 SSON# I 7 ModOUT O Spread spectrum clock output. 8 VDD P Power supply for the entire chip (+3.3V or 5.0V) Output Frequency Selections Input Frequency 8MHz 12MHz 16MHz 20MHz 24MHz 28MHz 32MHz 0 (1/2 X) 4MHz 6MHz 8MHz 10MHz 12MHz 14MHz 16MHz 1 (1X) 8MHz 12MHz 16MHz 20MHz 24MHz 28MHz 32MHz DIV2 Output Frequency Frequency Deviation Selections as a Function of Input Frequency P/N P2005A P2005S SR0 Input Frequency Range 8MHz 12MHz 16MHz 20MHz 24MHz 28MHz 32MHz 0 ± 3.0% ± 2.5% ± 2.0% ± 1.8% ± 1.5% ± 1.5% ± 1.3% 1 ± 2.5% ± 2.0% ± 1.8% ± 1.5% ± 1.3% ± 1.3% ± 1.0% 0 ± 1.8% ± 1.5% ± 1.2% ± 1.1% ± 0.9% ± 0.9% ± 0.8% 1 ± 1.5% ± 1.2% ± 1.1% ± 0.9% ± 0.8% ± 0.8% ± 0.6% Low Frequency EMI Reduction IC Notice: The information in this document is subject to change without notice. Modulation Rate (KHz) (XIN/20) * 62.5 2 of 8 P2005A/S November 2006 rev 1.3 Spread Spectrum The Output Frequency Selection Table and the Frequency Deviations Selections Table illustrate the two possible spread spectrum options. The optimal setting should minimize system EMI to the fullest without affecting system performance. The spreading is described as a percentage deviation of the center frequency (Note: The center frequency is the frequency of the external reference input on CLKIN, Pin1). Example: The P2005A/S is designed for communications, digital video and imaging applications. It is not only optimized for operation in the 8MHz – 32MHz range, but its output frequency can be extended down to one half of the input clock frequency using the divide-by-two feature. This feature extends low frequency as low as to 4MHz. Setting Pin 3 low (DIV2 = 0; Divide-by-two mode) sets the output frequency (ModOUT) to half the frequency of the input clock (CLKIN). This is a simple way to generate a spread spectrum modulated low frequency clock when only a higher frequency signal is available. If you want the output frequency to be the same as the input, you can either set DIV2=1 or leave it unconnected. Selecting the P2005A/S’s spread options is a matter of either setting SR0=1 or SR0=0. Setting SR0=0 set as a lower modulation spread, while setting it to 1 introduces a wider spectral spread in the output clock. Refer Modulation output and Spreading Selections Tables. The example given in the figure below shows the device set to the divide-by-two mode (DIV2=0) with a lower spectrum range (SR0=0). The versatility provided by allowing both clock division and spread spectrum on one chip is already proving to be a popular solution among leading system manufacturers. P2005A/S Application Schematic +3.3V 8.832MHz Crystal 1 CLKIN VDD 2 XOUT MODOUT 7 8 0.1µF 3 DIV2 SSON# 6 4 VSS SR0 5 Modulated 4.416MHz is connected to CLK input pin of the system P2005A/S Low Frequency EMI Reduction IC Notice: The information in this document is subject to change without notice. 3 of 8 P2005A/S November 2006 rev 1.3 Absolute Maximum Ratings Symbol VDD, VIN TSTG Parameter Rating Unit Voltage on any pin with respect to Ground -0.5 to +7.0 V Storage temperature -65 to +125 °C 0 to 70 °C TA Operating temperature Ts Max. Soldering Temperature (10 sec) 260 °C TJ Junction Temperature 150 °C 2 KV TDV Static Discharge Voltage (As per JEDEC STD22- A114-B) Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. DC Electrical Characteristics Symbol Parameter Min Typ Max Unit VIL Input low voltage GND – 0.3 - 0.8 V VIH Input high voltage 2.0 - VDD + 0.3 V IIL Input low current (pull-up resistors on inputs SR0, SR1, CP0 and CP1) - - -35 µA IIH Input high current (pull-down resistor on input SSON#) - - 35 µA IXOL XOUT Output Low Current (@ 0.4V, VDD = 3.3V) - 3 - mA IXOH XOUT Output High Current (@ 2.5V, VDD = 3.3V) VOL Output low voltage (VDD = 3.3V, IOL = 20mA) - - 0.4 V VOH Output high voltage (VDD = 3.3V, IOH = 20mA) 2.5 - - V ICC Dynamic supply current normal mode (3.3V, and 15pF loading) 6.0 7.0 8.3 mA IDD Static supply current standby mode - 0.6 - mA 3.1 3.3 5.5 V Power up time (first locked clock cycle after power up) - 0.18 - mS Clock output impedance - 50 - Ω VDD tON ZOUT Operating voltage 3 AC Electrical Characteristics Symbol fIN Parameter Min Typ Max Unit 8 - 32 MHz 1X Option 8 - 32 1/2X Option 4 - 16 Input frequency fOUT Output frequency MHz tLH* Output rise time (measured at 0.8V to 2.0V) 0.7 0.9 1.1 nS tHL* Output fall time (measured at 2.0V to 0.8V) 0.6 0.8 1.0 nS tJC Jitter (cycle to cycle) - - 360 pS tD Output duty cycle 45 50 55 % *tLH and tHL are measured into a capacitive load of 15pF Low Frequency EMI Reduction IC Notice: The information in this document is subject to change without notice. 4 of 8 P2005A/S November 2006 rev 1.3 Package Information 8-lead (150-mil) SOIC Package H E D A2 A C A1 D θ e L B Dimensions Symbol Inches Min Max Millimeters Min Max A1 0.004 0.010 0.10 0.25 A 0.053 0.069 1.35 1.75 A2 0.049 0.059 1.25 1.50 B 0.012 0.020 0.31 0.51 C 0.007 0.010 0.18 0.25 D 0.193 BSC 4.90 BSC E 0.154 BSC 3.91 BSC e 0.050 BSC 1.27 BSC H 0.236 BSC 6.00 BSC L 0.016 0.050 0.41 1.27 θ 0° 8° 0° 8° Low Frequency EMI Reduction IC Notice: The information in this document is subject to change without notice. 5 of 8 P2005A/S November 2006 rev 1.3 8-lead TSSOP (4.40-MM Body) H E D A2 A C θ e A1 L B Dimensions Symbol Inches Min Millimeters Max A Min Max 0.043 1.10 A1 0.002 0.006 0.05 0.15 A2 0.033 0.037 0.85 0.95 B 0.008 0.012 0.19 0.30 c 0.004 0.008 0.09 0.20 D 0.114 0.122 2.90 3.10 E 0.169 0.177 4.30 4.50 e 0.026 BSC 0.65 BSC H 0.252 BSC 6.40 BSC L 0.020 0.028 0.50 0.70 θ 0° 8° 0° 8° Low Frequency EMI Reduction IC Notice: The information in this document is subject to change without notice. 6 of 8 P2005A/S November 2006 rev 1.3 Ordering Codes Part Number Marking Package type Temperature P2005XF-08ST P2005XF 8 PIN SOIC, TUBE, Pb Free Commercial P2005XF-08SR P2005XF 8 PIN SOIC, TAPE AND REEL, Pb Free Commercial P2005XF-08TT P2005XF 8 PIN TSSOP, TUBE, Pb Free Commercial P2005XF-08TR P2005XF 8 PIN TSSOP, TAPE AND REEL, Pb Free Commercial P2005XG-08ST P2005XG 8 PIN SOIC, TUBE, Green Commercial P2005XG-08SR P2005XG 8 PIN SOIC, TAPE AND REEL, Green Commercial P2005XG-08TT P2005XG 8 PIN TSSOP, TUBE, Green Commercial P2005XG-08TR P2005XG 8 PIN TSSOP, TAPE AND REEL, Green Commercial Note: X=A or S Device Ordering Information P 2 0 0 5 X F - 0 8 S T Package: ST – SOIC, TUBE SR - SOIC, T/R TT – TSSOP, TUBE TR - TSSOP, T/R PIN COUNT F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE, LEAD FREE, and RoHS PART NUMBER P = Commercial Temperature Range (0°C to 70°C) I = Industrial Temperature Range (-25°C to 85°C) A = Automotive Temperature Range (-40°C to 125°C) Licensed under U.S Patent Nos 5,488,627 and 5,631,921 Low Frequency EMI Reduction IC Notice: The information in this document is subject to change without notice. 7 of 8 P2005A/S November 2006 rev 1.3 PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Copyright © PulseCore Semiconductor All Rights Reserved Preliminary Information Part Number: P2005A/S Document Version: v1.3 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003 © Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in PulseCore’s Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore’s Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use. Low Frequency EMI Reduction IC Notice: The information in this document is subject to change without notice. 8 of 8