PHILIPS CBT3861PW

CBT3861
10-bit bus switch with output enable
Rev. 1 — 19 August 2010
Product data sheet
1. General description
The CBT3861 provides ten bits of high-speed TTL-compatible bus switching. The low
ON resistance of the switch allows connections to be made with minimal propagation
delay.
The CBT3861 device is organized as one 10-bit bus switches with one output enable (OE)
input. When OE is LOW, the switch is on and port A is connected to the B port. When OE
is HIGH, each switch is disabled.
The CBT3861 is characterized for operation from −40 °C to +85 °C.
2. Features and benefits
„
„
„
„
„
5 Ω switch connection between two ports
TTL-compatible control input levels
Multiple package options
Latch-up protection exceeds 100 mA per JESD78
ESD protection:
‹ HBM JESD22-A114F exceeds 2000 V
‹ CDM JESD22-C101C exceeds 1000 V
3. Ordering information
Table 1.
Type
number
Ordering information
Package
Name
Description
Version
CBT3861PW −40 °C to +85 °C
TSSOP24
plastic thin shrink small outline package; 24 leads;
body width 4.4 mm
SOT355-1
CBT3861DK −40 °C to +85 °C
SSOP24[1]
plastic shrink small outline package; 24 leads; body
width 3.9 mm; lead pitch 0.635 mm
SOT556-1
CBT3861BQ −40 °C to +85 °C
DHVQFN24 plastic dual in-line compatible thermal enhanced very thin
quad flat package; no leads; 24 terminals;
body 3.5 × 5.5 × 0.85 mm
[1]
Temperature
range
Also known as QSOP24 package
SOT815-1
CBT3861
NXP Semiconductors
10-bit bus switch with output enable
4. Functional diagram
A1
A10
OE
Fig 1.
2
22
11
13
B1
B10
23
001aam471
Logic diagram
5. Pinning information
5.1 Pinning
CBT3861
CBT3861
n.c.
1
24 VCC
n.c.
1
24 VCC
A1
2
23 OE
A1
2
23 OE
A2
3
22 B1
A2
3
22 B1
A3
4
21 B2
A3
4
21 B2
A4
5
20 B3
A4
5
20 B3
A5
6
19 B4
A5
6
19 B4
A6
7
18 B5
A6
7
18 B5
A7
8
17 B6
A7
8
17 B6
A8
9
16 B7
A8
9
16 B7
A9 10
15 B8
A9 10
15 B8
A10 11
14 B9
A10 11
14 B9
GND 12
13 B10
GND 12
13 B10
001aam472
Fig 2.
001aam473
Pin configuration for TSSOP24 (SOT355-1)
CBT3861
Product data sheet
Fig 3.
Pin configuration for SSOP24 (SOT556-1)
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Rev. 1 — 19 August 2010
© NXP B.V. 2010. All rights reserved.
2 of 14
CBT3861
NXP Semiconductors
10-bit bus switch with output enable
n.c.
24 VCC
CBT3861
1
terminal 1
index area
A1
2
23 OE
A2
3
22 B1
A3
4
21 B2
A4
5
20 B3
A5
6
19 B4
A6
7
18 B5
A7
8
17 B6
A8
9
16 B7
GND(1)
A9 10
15 B8
B10 13
14 B9
GND 12
A10 11
001aam474
Transparent top view
Fig 4.
Pin configuration for DHVQFN24 (SOT815-1)
5.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
nc
1
not connected
A1 to A10
2, 3, 4, 5, 6, 7, 8, 9, 10, 11
data input/output (A port)
GND
12
ground (0 V)
B1 to B10
22, 21, 20, 19, 18, 17, 16, 15, 14, 13 data input/output (B port)
OE
23
output enable input (active LOW)
VCC
24
positive supply voltage
6. Functional description
Table 3.
Function selection[1]
Input
Input/output
OE
An, Bn
L
An = Bn
H
Z
[1]
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
CBT3861
Product data sheet
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Rev. 1 — 19 August 2010
© NXP B.V. 2010. All rights reserved.
3 of 14
CBT3861
NXP Semiconductors
10-bit bus switch with output enable
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Tamb = −40 °C to +85 °C, unless otherwise specified.
Symbol
Parameter
VCC
supply voltage
VI
input voltage
IO
output current
IIK
input clamping current
Tstg
storage temperature
Conditions
Min
Max
Unit
−0.5
+7.0
V
−0.5
+7.0
V
VO < 0 V
-
±128
mA
VI/O = 0 V
−50
-
mA
−65
+150
°C
[2]
[1]
Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under Section 8. is not implied. Exposure to absolute-maximum-rated
conditions for extended periods may affect device reliability.
[2]
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
8. Recommended operating conditions
Table 5.
Operating conditions
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation.
Symbol
Parameter
VCC
VIH
Conditions
Min
Typ
Max
Unit
supply voltage
4.5
-
5.5
V
HIGH-level input voltage
2.0
-
-
V
VIL
LOW-level input voltage
-
-
0.8
V
Tamb
ambient temperature
−40
-
+85
°C
operating in free air
9. Static characteristics
Table 6.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Tamb = −40 °C to +85 °C
Conditions
Min
Typ[1]
Max
Unit
VIK
input clamping voltage
VCC = 4.5 V; II = −18 mA
-
-
−1.2
V
II
input leakage current
VCC = 5.5 V; VI = GND or 5.5 V
-
-
±1
μA
ICC
supply current
VCC = 5.5 V; IO = 0 mA;
VI = VCC or GND
-
-
3
μA
ΔICC
additional supply current
per input pin; VCC = 5.5 V; one input at
3.4 V, other inputs at VCC or GND
-
-
2.5
mA
Vpass
pass voltage
output HIGH; VI = VCC = 5.0 V;
IO = −100 μA
3.6
3.9
4.2
V
CI
input capacitance
control pins; VI = 3 V or 0 V
-
3.0
-
pF
Cio(off)
off-state input/output
capacitance
port off; VI = 3 V or 0 V; OE = VCC
-
5.0
-
pF
CBT3861
Product data sheet
[2]
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Rev. 1 — 19 August 2010
© NXP B.V. 2010. All rights reserved.
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CBT3861
NXP Semiconductors
10-bit bus switch with output enable
Table 6.
Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
Symbol
RON
[1]
Parameter
Tamb = −40 °C to +85 °C
Conditions
ON resistance
Unit
Min
Typ[1]
VCC = 4.5 V; VI = 0 V; II = 64 mA
[3]
-
5
VCC = 4.5 V; VI = 0 V; II = 30 mA
[3]
-
5
7
Ω
VCC = 4.5 V; VI = 2.4 V; II = −15 mA
[3]
-
10
15
Ω
Max
7
Ω
All typical values are at VCC = 5 V, Tamb = 25 °C.
[2]
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
[3]
Measured by the voltage drop between the nAn and the nBn terminals at the indicated current through the switch. ON resistance is
determined by the lowest voltage of the two (nAn or nBn) terminals.
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.
Symbol Parameter
Tamb = 25 °C
Conditions
tpd
propagation delay
An, Bn to Bn, An;
see Figure 5
ten
enable time
OE to An or Bn;
see Figure 6
[2]
Min
Max
-
-
0.25
-
0.25
ns
-
3.3
-
1.6
7.5
ns
-
3.4
-
2.1
6.6
ns
[2]
OE to An or Bn;
see Figure 6
VCC = 5.0 V ± 0.5 V
[1]
Max
[2]
VCC = 5.0 V ± 0.5 V
disable time
Unit
Typ
[1][2]
VCC = 5.0 V ± 0.5 V
tdis
Tamb = −40 °C to +85 °C
Min
The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
CBT3861
Product data sheet
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Rev. 1 — 19 August 2010
© NXP B.V. 2010. All rights reserved.
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CBT3861
NXP Semiconductors
10-bit bus switch with output enable
11. Waveforms
VI
VM
An, Bn input
GND
tPHL
tPLH
VOH
VM
Bn, An output
VOL
001aam475
Measurement points are given in Table 8.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 5.
The data input (An, Bn) to output (Bn, An) propagation delay times
VI
VM
OE input
GND
tPLZ
tPZL
3.5 V
output
LOW-to-OFF
OFF-to-LOW
VM
VX
VOL
tPHZ
tPZH
VOH
VY
output
HIGH-to-OFF
OFF-to-HIGH
VM
GND
outputs
enabled
outputs
disabled
outputs
enabled
001aam476
Measurement points are given in Table 8.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 6.
Table 8.
Enable and disable times
Measurement points
Supply voltage
Input
VCC
VI
VM
VM
VX
VY
VCC = 5.0 V ± 0.5 V
GND to 3.0 V
1.5 V
1.5 V
VOL + 0.3 V
VOH − 0.3 V
CBT3861
Product data sheet
Output
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Rev. 1 — 19 August 2010
© NXP B.V. 2010. All rights reserved.
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CBT3861
NXP Semiconductors
10-bit bus switch with output enable
12. Test information
VI
tW
90 %
negative
pulse
VM
0V
tf
tr
tr
tf
VI
90 %
positive
pulse
0V
VM
10 %
VM
VM
10 %
tW
VEXT
VCC
VI
RL
VO
G
DUT
RT
RL
CL
001aae331
Test data is given in Table 9.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz; Zo = 50 Ω.
The outputs are measured one at a time with one transition per measurement.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 7.
Table 9.
Test circuit for measuring switching times
Test data
Supply voltage
Input
VI
VCC = 5.0 V ± 0.5 V
CBT3861
Product data sheet
Load
tr, tf
GND to 3.0 V ≤ 2.5 ns
VEXT
CL
RL
tPLH, tPHL
tPLZ, tPZL
tPHZ, tPZH
50 pF
500 Ω
open
7.0 V
open
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Rev. 1 — 19 August 2010
© NXP B.V. 2010. All rights reserved.
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CBT3861
NXP Semiconductors
10-bit bus switch with output enable
13. Package outline
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
D
SOT355-1
E
A
X
c
HE
y
v M A
Z
13
24
Q
A2
(A 3)
A1
pin 1 index
A
θ
Lp
L
1
12
bp
e
detail X
w M
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
7.9
7.7
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.5
0.2
8o
0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT355-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
MO-153
Fig 8. Package outline SOT355-1 (TSSOP24)
CBT3861
Product data sheet
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Rev. 1 — 19 August 2010
© NXP B.V. 2010. All rights reserved.
8 of 14
CBT3861
NXP Semiconductors
10-bit bus switch with output enable
SSOP24: plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635 mm
D
E
SOT556-1
A
X
c
y
HE
v M A
Z
13
24
A2
A
(A 3)
A1
θ
Lp
L
12
1
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(1)
e
HE
L
Lp
v
w
y
Z(1)
θ
mm
1.73
0.25
0.10
1.55
1.40
0.25
0.31
0.20
0.25
0.18
8.8
8.6
4.0
3.8
0.635
6.2
5.8
1
0.89
0.41
0.25
0.18
0.1
1.05
0.66
8
o
0
inches
0.068
0.0098 0.061
0.0040 0.055
0.01
0.012 0.0098 0.344 0.157
0.244
0.035
0.025
0.041
0.008 0.0075 0.337 0.150
0.228
0.016
0.01
0.007 0.004
0.040
0.026
8o
o
0
o
Note
1. Plastic or metal protrusions of 0.2 mm (0.008 inch) maximum per side are not included.
OUTLINE
VERSION
SOT556-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
MO-137
Fig 9. Package outline SOT556-1 (SSOP24)
CBT3861
Product data sheet
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Rev. 1 — 19 August 2010
© NXP B.V. 2010. All rights reserved.
9 of 14
CBT3861
NXP Semiconductors
10-bit bus switch with output enable
DHVQFN24: plastic dual in-line compatible thermal enhanced very thin quad flat package;
no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm
B
D
SOT815-1
A
A
E
A1
c
detail X
terminal 1
index area
C
e1
terminal 1
index area
e
y1 C
v M C A B
w M C
b
2
y
11
L
12
1
e2
Eh
24
13
23
14
X
Dh
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A(1)
max.
A1
b
c
D (1)
Dh
E (1)
Eh
e
e1
e2
L
v
w
y
y1
mm
1
0.05
0.00
0.30
0.18
0.2
5.6
5.4
4.25
3.95
3.6
3.4
2.25
1.95
0.5
4.5
1.5
0.5
0.3
0.1
0.05
0.05
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT815-1
---
---
---
EUROPEAN
PROJECTION
ISSUE DATE
03-04-29
Fig 10. Package outline SOT815-1 (DHVQFN24)
CBT3861
Product data sheet
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Rev. 1 — 19 August 2010
© NXP B.V. 2010. All rights reserved.
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CBT3861
NXP Semiconductors
10-bit bus switch with output enable
14. Abbreviations
Table 10.
Abbreviations
Acronym
Description
CDM
Charged Device Model
ESD
ElectroStatic Discharge
HBM
Human Body Model
PRR
Pulse Rate Repetition
TTL
Transistor-Transistor Logic
15. Revision history
Table 11.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
CBT3861 v.1
20100819
Product data sheet
-
-
CBT3861
Product data sheet
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Rev. 1 — 19 August 2010
© NXP B.V. 2010. All rights reserved.
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NXP Semiconductors
10-bit bus switch with output enable
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
16.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. The product is not designed, authorized or warranted to be
CBT3861
Product data sheet
suitable for use in medical, military, aircraft, space or life support equipment,
nor in applications where failure or malfunction of an NXP Semiconductors
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. NXP Semiconductors accepts no
liability for inclusion and/or use of NXP Semiconductors products in such
equipment or applications and therefore such inclusion and/or use is at the
customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 August 2010
© NXP B.V. 2010. All rights reserved.
12 of 14
CBT3861
NXP Semiconductors
10-bit bus switch with output enable
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
CBT3861
Product data sheet
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Rev. 1 — 19 August 2010
© NXP B.V. 2010. All rights reserved.
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CBT3861
NXP Semiconductors
10-bit bus switch with output enable
18. Contents
1
2
3
4
5
5.1
5.2
6
7
8
9
10
11
12
13
14
15
16
16.1
16.2
16.3
16.4
17
18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test information . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11
Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Contact information. . . . . . . . . . . . . . . . . . . . . 13
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 19 August 2010
Document identifier: CBT3861