19-5781; Rev 0; 3/11 KIT ATION EVALU E L B AVAILA 36V, 1MHz Step-Down Controller with Low Operating Current The MAX16955 is a current-mode, synchronous PWM step-down controller designed to operate with input voltages from 3.5V to 36V while using only 50μA of quiescent current at no load. The switching frequency is adjustable from 220kHz to 1MHz by an external resistor and can be synchronized to an external clock up to 1.1MHz. The MAX16955 output voltage is pin programmable to be either 5V fixed, or adjustable from 1V to 13V. The wide input voltage range, along with its ability to operate in dropout during undervoltage transients, makes it ideal for automotive and industrial applications. The MAX16955 operates in fixed-frequency PWM mode and low quiescent current skip mode. It features an enable logic input, which is compatible up to 42V to disable the device and reduce its shutdown current to 10μA. Protection features include overcurrent limit, overvoltage, undervoltage, and thermal shutdown with automatic recovery. The device also features a powergood monitor to ease power-supply sequencing. The MAX16955 is available in a thermally enhanced 16pin TSSOP package with exposed pad and is specified for operation over the -40°C to +125°C automotive temperature range. Features ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ Wide 3.5V to 36V Input Voltage Range 42V Input Transient Tolerance High Duty Cycle During Undervoltage Transients 220kHz to 1MHz Adjustable Switching Frequency Current-Mode Control Architecture Adjustable (1V to 13V) Output Voltage with ±2% Accuracy Three Operating Modes 50µA Ultra-Low Quiescent Current Skip Mode Forced Fixed-Frequency Mode External Frequency Synchronization Lowest BOM Count, Current-Mode Control Architecture Power-Good Output Enable Input Compatible from 3.3V Logic Level to 42V Current-Limit, Thermal Shutdown, and Overvoltage Protection -40°C to +125°C Automotive Temperature Range Automotive Qualified Typical Operating Circuit Applications VBAT Automotive CIN NH Industrial SUP Military Point of Load RCOMP Ordering Information PART TEMP RANGE PIN-PACKAGE MAX16955AUE/V+ -40°C to +125°C 16 TSSOP-EP* /V denotes an automotive qualified part. +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. BST L LX CCOMP2 MAX16955 CCOMP1 NL DL PGOOD RSENSE PGND EN FSYNC CS VOUT 5V OUT FOSC RFOSC CBST DH COMP SGND FB BIAS COUT CL ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX16955 General Description MAX16955 36V, 1MHz Step-Down Controller with Low Operating Current ABSOLUTE MAXIMUM RATINGS SUP and EN to SGND ............................................-0.3V to +42V LX to PGND ..............................................................-1V to +42V BST to LX .................................................................-0.3V to +6V BIAS, FB, PGOOD, FSYNC to SGND .......................-0.3V to +6V DH to LX ...................................................................-0.3V to +6V DL to PGND .............................................-0.3V to (VBIAS + 0.3V) FOSC to SGND ........................................-0.3V to (VBIAS + 0.3V) CS and OUT to SGND .........................................-0.3V to +12.7V PGND to SGND .....................................................-0.3V to +0.3V Continuous Power Dissipation (TA = +70°C) TSSOP (derate 26.1mW/°C above +70°C) .............2088.8mW* Operating Temperature Range .........................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Soldering Temperature (reflow) .......................................+260°C *As per JEDEC51 standard (multilayer board). Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) TSSOP Junction-to-Ambient Thermal Resistance (θJA) .........38.3°C/W Junction-to-Case Thermal Resistance (θJC) ...................3°C/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. ELECTRICAL CHARACTERISTICS (VSUP = VEN = 14V, CIN = 10μF, COUT = 94μF, CBIAS = 2.2μF, CBST = 0.1μF, RFOSC = 76.8kΩ, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) PARAMETER SUP Input Voltage Range SUP Operating Supply Current Skip Mode Supply Current SUP Shutdown Supply Current BIAS Voltage BIAS Undervoltage Lockout SYMBOL MIN TYP UNITS 36 V (Note 3) I SUP Fixed 5V output, fixed-frequency, PWM mode, VFB = VBIAS, no external FETs connected 1 I SKIP No load, fixed 5V output 50 90 μA VEN = 0V 10 20 μA VSUP = 3.5V, IBIAS = 45mA 6V < VSUP < 36V 3.0 I SHDN,SUP VBIAS VUVBIAS IBIAS(MIN) 3.5 MAX VSUP BIAS Undervoltage Lockout Hysteresis BIAS Minimum Load CONDITIONS 4.7 mA V 5.0 5.3 VBIAS rising 3.1 3.4 VBIAS falling 200 mV VSUP - VBIAS > 200mV 45 mA V OUTPUT VOLTAGE (OUT) Output Voltage Adjustable Range OUT Pulldown Resistance Output Voltage (5V Fixed Mode) 1.0 RPULL_D VOUT VEN = 0V or fault condition active VSUP = 6V to 36V, VFB = VBIAS, fixedfrequency mode (Note 4) FB Feedback Voltage (Adjustable Mode) VFB VSUP = 6V to 36V, 0V < (VCS - VOUT) < 80mV, fixed-frequency mode FB Current IFB VFB = 1.0V 2 13 V 30 4.925 5.0 5.075 V 0.99 1.0 1.01 V 0.02 _______________________________________________________________________________________ μA 36V, 1MHz Step-Down Controller with Low Operating Current (VSUP = VEN = 14V, CIN = 10μF, COUT = 94μF, CBIAS = 2.2μF, CBST = 0.1μF, RFOSC = 76.8kΩ, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) PARAMETER SYMBOL FB Line Regulation CONDITIONS MIN VEN = V SUP, 6V < VSUP < 36V (Note 4) TYP MAX UNITS 0.02 %/V gm,EA 1200 μS Error-Amplifier Output Impedance R OUT,EA 30 M Operating Frequency f SW Transconductance (from FB to COMP) Minimum On-Time RFOSC = 76.8k 360 RFOSC = 30.1k 400 440 1000 kHz t ON(MIN) 80 ns Maximum FSYNC Frequency fFSYNC(MAX) 1100 kHz Minimum FSYNC Frequency fFSYNC(MIN) 242 kHz FSYNC Switching Threshold High VFSYNC,HI FSYNC Switching Threshold Low VFSYNC,LO fFSYNC > 110% of internal frequency (20% duty cycle), f SW = 220kHz 1.4 V 0.4 FSYNC Internal Pulldown Resistance 1 V M CURRENT LIMIT CS Input Current ICS Output Input Current CS Current-Limit Voltage Threshold I OUT VCS = V OUT = 0V or VBIAS (Note 4) -1 +1 During normal operation 22 VFB = VBIAS 32 μA μA VLIMIT VCS - VOUT, VBIAS = 5V, VOUT 2.5V 68 80 92 mV VFB,OV VOUT = VFB, rising edge 108 113 118 %VFB FAULT DETECTION Output Overvoltage Trip Threshold Output Overvoltage Trip Hysteresis 2.5 Output Overvoltage Fault Propagation Delay t OVP Output Undervoltage Trip Threshold VFB,UV Rising edge 25 Falling edge 25 VOUT = VFB; with respect to slewed FB threshold, falling edge Output Undervoltage Trip Hysteresis PGOOD Leakage Current Thermal Shutdown Threshold Thermal Shutdown Hysteresis 88 μs 93 2.5 Output Undervoltage Propagation Delay PGOOD Output Low Voltage 83 % VPGOOD,L Falling edge 25 Rising edge (excluding startup) 25 I SINK = 3mA I PGOOD TSHDN %VFB % μs 0.4 V 1 μA (Note 5) +175 °C (Note 5) 15 °C _______________________________________________________________________________________ 3 MAX16955 ELECTRICAL CHARACTERISTICS (continued) MAX16955 36V, 1MHz Step-Down Controller with Low Operating Current ELECTRICAL CHARACTERISTICS (continued) (VSUP = VEN = 14V, CIN = 10μF, COUT = 94μF, CBIAS = 2.2μF, CBST = 0.1μF, RFOSC = 76.8kΩ, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS GATE DRIVE DH Gate-Driver On-Resistance RDH DL Gate-Driver On-Resistance RDL DH/DL Dead Time (Note 4) BST Input Current tDEAD IBST BST On-Resistance (VBST - VLX) forced to 5V 10 (VBST - VLX) forced to 0V 2 DL = high state 3.5 DL = low state 2 DL rising (Note 5) 60 DH rising (Note 5) 60 VLX = 0V, VBST = 5V, VDH - VLX = VDL - VPGND = 0V 1 (Note 5) 5 ns μA 15 1.2 V ENABLE INPUT EN Input Threshold Low VEN,LO EN Input Threshold High VEN,HI EN Threshold Voltage Hysteresis EN Input Current 2.2 V 0.2 V I EN 0.5 μA t SS 5 ms SOFT-START Soft-Start Ramp Time Note 2: Note 3: Note 4: Note 5: 4 Devices tested at TA = +25°C. Limits over temperature are guaranteed by design. For 3.5V operation, the n-channel MOSFET’s threshold voltage should be compatible to (lower than) this input voltage. Device not in dropout condition. Guaranteed by design; not production tested. _______________________________________________________________________________________ 36V, 1MHz Step-Down Controller with Low Operating Current VOUT = 3.3V STARTUP RESPONSE (SKIP MODE) VOUT = 5V STARTUP RESPONSE (SKIP MODE) MAX16955 toc01 MAX16955 toc02 10V/div 10V/div VOUT 2V/div VOUT 2V/div IOUT 2A/div IOUT 2A/div 5V/div VPGOOD 5V/div VPGOOD 2ms SUPPLY CURRENT vs. SUPPLY VOLTAGE 80 20 15 70 90 80 EFFICIENCY (%) SUPPLY CURRENT (µA) 25 60 50 40 50 40 30 20 5 10 10 0 0 18 24 30 12 18 24 90 FREQUENCY (kHz) VOUT = 3.3V VOUT = 5V 60 50 40 30 20 10 SKIP MODE 0 0.0001 0.001 36 0 0.01 0.1 LOAD CURRENT (A) 1 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 LOAD CURRENT (A) SWITCHING FREQUENCY vs. RFOSC EFFICIENCY vs. LOAD CURRENT 100 70 30 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) 80 FIXED-FREQUENCY MODE 0 6 36 10 1200 1150 1100 1050 1000 950 900 850 800 750 700 650 600 550 500 450 400 350 300 250 200 MAX16955 toc07 12 MAX16955 toc06 6 VOUT = 3.3V 60 20 10 VOUT = 5V 70 30 EFFICIENCY (%) SUPPLY CURRENT (mA) 30 SKIP MODE 90 100 MAX16955 toc04 FIXED-FREQUENCY MODE 35 EFFICIENCY vs. LOAD CURRENT SUPPLY CURRENT vs. SUPPLY VOLTAGE 100 MAX16955 toc03 40 MAX16955 toc05 2ms 25 35 45 55 65 75 85 95 105 115 125 135 145 RFOSC (kI) _______________________________________________________________________________________ 5 MAX16955 Typical Operating Characteristics (VSUP = VEN = 14V, CIN = 10μF, COUT = 94μF, CBIAS = 2.2μF, CBST = 0.1μF, RFOSC = 66.5kΩ, fOSC = 468kHz, VFB = VBIAS, VOUT = 5V, TA = +25°C, unless otherwise noted.) MAX16955 36V, 1MHz Step-Down Controller with Low Operating Current Typical Operating Characteristics (continued) (VSUP = VEN = 14V, CIN = 10μF, COUT = 94μF, CBIAS = 2.2μF, CBST = 0.1μF, RFOSC = 66.5kΩ, fOSC = 468kHz, VFB = VBIAS, VOUT = 5V, TA = +25°C, unless otherwise noted.) 0 TO 4A LOAD-TRANSIENT RESPONSE, VOUT = 5V, PWM MODE 0 TO 4A LOAD-TRANSIENT RESPONSE, VOUT = 3.3V, PWM MODE MAX16955 toc08 MAX16955 toc09 IOUT 2A/div MAX16955 toc10 VFSYNC 2V/div IOUT 2A/div VOUT 200mV/div VLX 5V/div VOUT 200mV/div 100µs 1µs 100µs COLD CRANK (PWM MODE) LOAD DUMP RESPONSE (SKIP MODE) MAX16955 toc11 LOAD DUMP RESPONSE (PWM MODE) MAX16955 toc12 MAX16955 toc13 VSUP 5V/div VSUP 20V/div VSUP 20V/div VOUT 5V/div VOUT 5V/div VOUT 5V/div ILX 5A/div ILX 5A/div ILX 5A/div VPGOOD 5V/div VPGOOD 5V/div VPGOOD 5V/div 10ms 100ms SLOW INPUT RESPONSE (PWM MODE) 10s 100ms SLOW INPUT RESPONSE (SKIP MODE) MAX16955 toc14 6 SYNCHRONIZATION WITH EXTERNAL CLOCK fFSYNC = 1MHz MAX16955 toc15 VSUP 10V/div VSUP 10V/div VLX 10V/div VLX 10V/div VOUT 5V/div VOUT 5V/div VPGOOD 5V/div VPGOOD 5V/div 10s _______________________________________________________________________________________ 36V, 1MHz Step-Down Controller with Low Operating Current SHORT-CIRCUIT RESPONSE, VOUT = 3.3V SHORT-CIRCUIT RESPONSE, VOUT = 5V MAX16955 toc17 MAX16955 toc16 VOUT 2V/div VOUT 2V/div IOUT 5A/div IOUT 5A/div VPGOOD 5V/div VPGOOD 5V/div 400µs 400µs LOAD REGULATION 2 TA = -40°C 1 0 -1 -2 TA = +125°C -3 TA = -40°C 0 -1 0 -1 -2 -2 -3 -3 TA = +125°C -4 -4 -5 -5 -5 4 3 0 1 OUTPUT VOLTAGE (V) FIXED-FREQUENCY MODE TA = +25°C TA = -40°C TA = +125°C 6 12 18 24 SUPPLY VOLTAGE (V) -40 -25 -10 5 20 35 50 65 80 95 110 125 4 3 TEMPERATURE (°C) BIAS VOLTAGE vs. BIAS CURRENT LINE REGULATION MAX16955 toc21 LINE REGULATION 3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 2 FIXED-FREQUENCY MODE LOAD CURRENT (A) 30 36 3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 SKIP MODE TA = +25°C TA = -40°C TA = +125°C 5 4 BIAS VOLTAGE ERROR (%) 2 LOAD CURRENT (A) MAX16955 toc22 1 SKIP MODE 1 -4 0 OUTPUT VOLTAGE (V) 3 2 TA = +25°C 1 MAX16955 toc20 3 MAX16955 toc23 TA = +25°C ERROR (%) ERROR (%) 2 4 ERROR (%) 3 SKIP MODE 4 5 MAX16955 toc19 FIXED-FREQUENCY MODE 4 5 MAX16955 toc18 5 OUTPUT-VOLTAGE ERROR vs. TEMPERATURE LOAD REGULATION 3 TA = -40°C 2 1 0 -1 -2 TA = +25°C -3 TA = +125°C -4 -5 6 12 18 24 SUPPLY VOLTAGE (V) 30 36 0 20 40 60 80 100 BIAS CURRENT (mA) _______________________________________________________________________________________ 7 MAX16955 Typical Operating Characteristics (continued) (VSUP = VEN = 14V, CIN = 10μF, COUT = 94μF, CBIAS = 2.2μF, CBST = 0.1μF, RFOSC = 66.5kΩ, fOSC = 468kHz, VFB = VBIAS, VOUT = 5V, TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (VSUP = VEN = 14V, CIN = 10μF, COUT = 94μF, CBIAS = 2.2μF, CBST = 0.1μF, RFOSC = 66.5kΩ, fOSC = 468kHz, VFB = VBIAS, VOUT = 5V, TA = +25°C, unless otherwise noted.) 14 12 10 8 6 4 1.0 10.50 10.45 10.40 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 10.35 -0.8 2 -1.0 10.30 0 3 6 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 9 12 15 18 21 24 27 30 33 36 1 DIPS AND DROPS TEST, PWM MODE, VOUT = 5V DIPS AND DROPS TEST, SKIP MODE, VOUT = 5V MAX16955 toc27 MAX16955 toc28 VSUP 10V/div VSUP 10V/div VLX 10V/div VLX 10V/div VOUT 2V/div VOUT 2V/div VPGOOD 5V/div VPGOOD 5V/div 10ms 10ms DIPS AND DROPS TEST, PWM MODE, VOUT = 3.3V DIPS AND DROPS TEST, SKIP MODE, VOUT = 3.3V MAX16955 toc29 10ms 2 LOAD CURRENT (A) TEMPERATURE (°C ) VSUP (V) 8 MAX16955 toc26 10.55 VSUP = 14V VEN = 0V FREQUENCY (kHz) 16 10.60 MAX16955 toc25 18 SHUTDOWN CURRENT (µA) MAX16955 toc24 20 SWITCHING FREQUENCY vs. LOAD CURRENT SHUTDOWN CURRENT vs. TEMPERATURE SHUTDOWN CURRENT vs. VSUP SHUTDOWN CURRENT (µA) MAX16955 36V, 1MHz Step-Down Controller with Low Operating Current MAX16955 toc30 VSUP 10V/div VSUP 10V/div VLX 10V/div VLX 10V/div VOUT 2V/div VOUT 2V/div VPGOOD 5V/div VPGOOD 5V/div 10ms _______________________________________________________________________________________ 3 4 36V, 1MHz Step-Down Controller with Low Operating Current TOP VIEW SUP 1 EN 2 FOSC 3 + 16 BST 15 DH 14 LX MAX16955 FSYNC 4 13 BIAS SGND 5 12 DL COMP 6 11 PGND FB 7 10 PGOOD 9 OUT EP CS 8 TSSOP Pin Description PIN NAME FUNCTION 1 SUP Input Supply Voltage. SUP is the input voltage to the internal linear regulator. Bypass SUP to PGND with a 1μF minimum value ceramic capacitor. Connect BIAS and SUP to a 5V rail, if available. 2 EN Active-High Enable Input. EN is compatible with 5V and 3.3V logic levels. Drive EN logic-high to enable the output or drive EN logic-low to put the controller in low-power shutdown mode. Connect EN to SUP for always-on operation. Do not leave EN unconnected. 3 FOSC Oscillator-Timing Resistor Input. Connect a resistor from FOSC to SGND to set the oscillator frequency from 220kHz to 1MHz. See the Setting the Switching Frequency section. 4 FSYNC Synchronization and Mode Selection Input. Connect FSYNC to BIAS to select fixed-frequency PWM mode and disable skip mode. Connect FSYNC to SGND to select skip mode. Connect FSYNC to an external clock for synchronization. FSYNC is internally pulled down to ground with a 1M resistor. 5 SGND Signal Ground. Connect SGND directly to the local ground plane. Connect SGND to PGND at a single point, typically near the output capacitor return terminal. 6 COMP Error Amplifier Output. Connect COMP to the compensation feedback network. See the Compensation Design section. 7 FB Feedback Regulation Point. Connect FB to BIAS for a fixed 5V output voltage. In adjustable mode, connect to the center tap of a resistive divider from the output (VOUT) to SGND to set the output voltage. The FB voltage regulates to 1V (typ). 8 CS Positive Current-Sense Input. Connect CS to the positive terminal of the current-sense element. Figure 4 shows two different current-sensing options: 1) accurate sense with a sense resistor or 2) lossless inductor DCR sensing. 9 OUT Output Sense and Negative Current-Sense Input. When using the internal preset 5V feedback divider (FB = BIAS), the controller uses OUT to sense the output voltage. Connect OUT to the negative terminal of the current-sense element. _______________________________________________________________________________________ 9 MAX16955 Pin Configuration 36V, 1MHz Step-Down Controller with Low Operating Current MAX16955 Pin Description (continued) PIN 10 NAME FUNCTION Open-Drain Power-Good Output. A logic-high voltage on PGOOD indicates that the output voltage is in regulation. PGOOD is pulled low when the output voltage is out of regulation. Connect a 10k pullup resistor from PGOOD to the digital interface voltage. 10 PGOOD 11 PGND 12 DL 13 BIAS 14 LX External Inductor Connection. Connect LX to the switched side of the inductor. LX serves as the lower supply rail for the DH high-side gate driver. 15 DH High-Side Gate-Driver Output. DH swings from LX to BST. To avoid any interference with the internal break-before-make circuitry, do not connect any resistor between DH and the gate of the MOSFET. 16 BST Boost Flying Capacitor Connection. Connect a ceramic capacitor between BST and LX. See the BoostFlying Capacitor Selection section for details. — EP Exposed Pad. Internally connected to ground. Connect EP to a large contiguous copper plane at SGND potential to improve thermal dissipation. Do not use as the main ground connection. Power Ground. Connect the input and output filter capacitors’ negative terminals to PGND. Connect PGND externally to SGND at a single point, typically at the output capacitor return terminal. Low-Side Gate-Driver Output. DL swings from VBIAS to PGND. To avoid any interference with the internal break-before-make circuitry, do not connect any resistor between DL and the gate of the MOSFET. Internal 5V Linear Regulator Output. BIAS provides power for bias and gate drive. Connect a 1μF to 10μF ceramic capacitor from BIAS to PGND. Connect BIAS and SUP to a 5V rail, if available. ______________________________________________________________________________________ 36V, 1MHz Step-Down Controller with Low Operating Current SUP EN BST EN LDO BST SWITCH MAX16955 UG DH SGND LX BIAS BUCK CONTROLLER PGOOD REF BIAS FB LG DL PWM EAFB COMP EA REF PGND ILIM OSC FOSC CLK CS ZX FSYNC MODE SYNC CS MODE OUT FBI SGND ______________________________________________________________________________________ 11 MAX16955 Functional Diagram MAX16955 36V, 1MHz Step-Down Controller with Low Operating Current Detailed Description The MAX16955 is a current-mode, synchronous PWM buck controller designed to drive logic-level MOSFETs. The device tolerates a wide 3.5V to 42V input voltage range and generates an adjustable 1V to 13V or fixed 5V output voltage. This device can operate in dropout mode, making it ideal for automotive and industrial applications with undervoltage transients. The internal switching frequency is adjustable from 220kHz to 1MHz with an external resistor and can be synchronized to an external clock. The high switching frequency reduces output ripple and allows the use of small external components. The device operates in both fixed-frequency PWM mode and a low quiescent current skip mode. While working in skip mode, the operating current is as low as 50μA. The device features an enable logic input to disable the device and reduce its shutdown current to 10μA. Protection features include cycle-by-cycle current limit, overvoltage detection, and thermal shutdown. The device also features integrated soft-start and a powergood monitor to help with power sequencing. Supply Voltage Range (SUP) (max), the controller starts up with a 5ms fixed soft-start time. Once regulation is reached, PGOOD goes high impedance. A logic-low at EN shuts down the device. During shutdown, the internal linear regulator and gate drivers turn off. Shutdown is the lowest power state and reduces the quiescent current to 10μA (typ). To protect the low-side MOSFET during shutdown, the step-down regulator cannot be enabled until the output voltage drops below 1.25V. An internal 30Ω pulldown switch helps discharge the output. If the EN pin is toggled low then high, the switching regulator shuts down and remains off until the output voltage decays to 1.25V. At this point, the MAX16955 turns on using the soft-start sequence. Fixed 5V Linear Regulator (BIAS) The MAX16955 has an internal 5V linear regulator to provide its own 5V bias from a high-voltage input supply at SUP. This bias supply powers the gate drivers for the external n-channel MOSFETs and provides the power required for the analog controller, reference, and logic blocks. The bias rail needs to be stabilized by a 1μF or greater capacitance at BIAS, and can provide up to 50mA (typ) total current. The supply voltage range (VSUP) of the MAX16955 is compatible to the typical automotive battery voltage range from 3.5V to 36V and can tolerate up to 42V transients. If an external 5V rail is available, use this rail to power the MAX16955 to increase efficiency by bypassing the internal LDO. Connect both BIAS and SUP to this rail, while connecting the half-bridge rectifier to the battery. The linear regulator has an overcurrent threshold of approximately 100mA. In case of an overcurrent event, the current is limited to 100mA and the BIAS voltage starts to droop. As soon as VBIAS drops to 2.9V (typ), the LDO shuts down and the power MOSFETs are turned off. Slow Ramp-Up of the Input Voltage Oscillator Frequency and External Synchronization If the input voltage (VSUP) ramps up slowly, the device operates in dropout mode until VSUP is greater than the regulated output voltage. The dropout mode is detected by monitoring high-side FET on for eight clock cycles. Once dropout mode is detected, the controller issues a forced low-side pulse at the rising edge of switching clock to refresh BST capacitor. This maintains the proper BST voltage to turn on the high-side MOSFET when the device is in dropout mode. System Enable (EN) and Soft-Start An enable control input (EN) activates the MAX16955 from its low-power shutdown mode. EN is compatible with inputs from automotive battery level down to 3.5V. The high-voltage compatibility allows EN to be connected to SUP, KEY/KL30, or the inhibit pin (INH) of a CAN transceiver. A logic-high at EN turns on the internal regulator. Once VBIAS is above the internal lockout level, VUVL = 3.1V 12 The MAX16955 provides an internal oscillator adjustable from 220kHz to 1MHz. To set the switching frequency, connect a resistor from FOSC to SGND. See the Setting the Switching Frequency section. The MAX16955 can also be synchronized to an external clock by connecting the external clock signal to FSYNC. For proper frequency synchronization, FSYNC’s input frequency must be at least 10% higher than the programmed internal oscillator frequency. A rising clock edge on FSYNC is interpreted as a synchronization input. If the FSYNC signal is lost, the internal oscillator takes control of the switching rate, returning to the switching frequency set by the resistor connected to FOSC. This maintains output regulation even with intermittent FSYNC signals. The maximum synchronizable frequency is 1.1MHz. When FSYNC is connected to SGND, the device operates in skip mode. When FSYNC is connected to BIAS ______________________________________________________________________________________ 36V, 1MHz Step-Down Controller with Low Operating Current Error Detection and Fault Behavior Several error-detection mechanisms prevent damage to the MAX16955 and the application circuit: • • • • • Overcurrent protection Output overvoltage protection Undervoltage lockout at BIAS Power-good detection of the output voltage Overtemperature protection of the IC threshold. The PGOOD output is open drain and should be pulled up with an external resistor to the supply voltage of the logic input it drives. This voltage should not exceed 6V. A 10kΩ pullup resistor works well in most applications. PGOOD can sink up to 4mA of current while low. PGOOD asserts low during the following conditions: • Standby mode • Undervoltage with VOUT below 90% (typ) its set value • Overvoltage with VOUT above 111% (typ) its set value Overcurrent Protection The MAX16955 provides cycle-by-cycle current limiting as long as the FB voltage is greater than 0.7V (i.e., 70% of the regulated output voltage). If the output voltage drops below 70% of the regulation point due to overcurrent event, 16 consecutive current-limit events initiate restart. If the overcurrent is still present during restart, the MAX16955 shuts down and initiates restart. This automatic restart continues until the overcurrent condition disappears. If the overcurrent condition disappears at any restart attempt, the device enters the normal soft-start routine. If the output is shorted through a long wire, output voltage can fall significantly below ground before reaching the overcurrent limit. Under this condition, the MAX16955 stops switching and initiates restart as soon as output drops to 20% of its regulation point. The power-good levels are measured at FB if a feedback divider is used. If the MAX16955 is used in 5V mode with FB connected to BIAS, OUT is used as a feedback path for voltage regulation and power-good determination. Output Overvoltage Protection The MAX16955 features an internal output overvoltage protection. If VOUT increases by 13% (typ) of the intended regulation voltage, the high-side MOSFET turns off and the low-side MOSFET turns on. The low-side MOSFET stays on until VOUT goes back into regulation. Once VOUT is in regulation, the normal switching cycles continue. The MAX16955’s step-down controller uses a PWM, current-mode control scheme. An internal transconductance amplifier establishes an integrated error voltage. The heart of the PWM controller is an open-loop comparator that compares the integrated voltage-feedback signal against the amplified current-sense signal plus the slope compensation ramp, which are summed into the main PWM comparator to preserve inner-loop stability and eliminate inductor stair casing. At each falling edge of the internal clock, the high-side MOSFET turns on until the PWM comparator trips, the maximum duty cycle is reached, or the peak current limit is reached. During this on-time, current ramps up through the inductor, storing energy in its magnetic field and sourcing current to the output. The current-mode feedback system regulates the peak inductor current as a function of the output-voltage error signal. The circuit acts as a switch-mode transconductance amplifier and eliminates the influence of the output LC filter double pole. Undervoltage Lockout (UVLO) The BIAS input undervoltage lockout (UVLO) circuitry inhibits switching if the 5V bias supply (BIAS) is below its UVLO threshold, 3.1V (typ). If the BIAS voltage drops below the UVLO threshold, the controller stops switching and turns off both high-side and low-side gate drivers until the BIAS voltage recovers. Power-Good Detection (PGOOD) The MAX16955 includes a power-good comparator with added hysteresis to monitor the step-down controller’s output voltage and detect the power-good Overtemperature Protection Thermal-overload protection limits total power dissipation in the MAX16955. When the junction temperature exceeds +175°C (typ), an internal thermal sensor shuts down the step-down controller, allowing the IC to cool. The thermal sensor turns on the IC again after the junction temperature cools by 15°C and the output voltage has dropped below 1.25V (typ). A continuous overtemperature condition can cause on-/off-cycling of the device. Fixed-Frequency, Current-Mode PWM Controller ______________________________________________________________________________________ 13 MAX16955 or driven by an external clock, the MAX16955 operates in skip mode during soft-start and transitions to fixedfrequency PWM mode after soft-start is over. MAX16955 36V, 1MHz Step-Down Controller with Low Operating Current During the second half of the cycle, the high-side MOSFET turns off and the low-side MOSFET turns on. The inductor releases the stored energy as the current ramps down, providing current to the output. The output capacitor stores charge when the inductor current exceeds the required load current and discharges when the inductor current is lower, smoothing the voltage across the load. Under soft-overload conditions, when the peak inductor current exceeds the selected current limit, the high-side MOSFET is turned off immediately. The low-side MOSFET is turned on and remains on to let the inductor current ramp down until the next clock cycle. Forced Fixed-Frequency PWM Mode The low-noise forced fixed-frequency PWM mode (FSYNC connected to BIAS or an external clock) disables the zero-crossing comparator, which controls the low-side switch on-time. This forces the low-side gatedriver waveform to constantly be the complement of the high-side gate-drive waveform. The inductor current reverses at light loads while DH maintains a duty factor of VOUT/VSUP. The benefit of forced fixed-frequency PWM mode is to keep the switching frequency fairly constant. However, forced fixed-frequency PWM operation comes at a cost: the no-load 5V supply current can be up to 45mA, depending on the external MOSFETs and switching frequency. Forced fixed-frequency PWM mode is most useful for avoiding audio frequency noises and improving load-transient response. Light-Load Low-Quiescent Operating (Skip) Mode The MAX16955 includes a light-load operating mode control input (FSYNC = SGND) used to enable or disable the zero-crossing comparator. When the zerocrossing comparator is enabled, the regulator forces DL low when the current-sense inputs detect zero inductor current. This keeps the inductor from discharging the output capacitor and forces the regulator to skip pulses under light-load conditions to avoid overcharging the output. The lowest operating currents can be achieved in skip mode. When the MAX16955 operates in skip mode with no external load current, the overall current consumption can be as low as 50μA. A disadvantage of skip mode is that the operating frequency is not fixed. Skip-Mode Current-Sense Threshold When skip mode is enabled, the on-time of the stepdown controller terminates when the output voltage exceeds the feedback threshold and when the current14 sense voltage exceeds the idle-mode current-sense threshold (VCS,IDLE). See Figure 1. Under light-load conditions, the on-time duration depends solely on the skip-mode current-sense threshold, which is 25mV (typ). This forces the controller to source a minimum amount of power with each cycle. To avoid overcharging the output, another on-time cannot begin until the output voltage drops below the feedback threshold. Because the zero-crossing comparator prevents the switching regulator from sinking current, the controller must skip pulses. Therefore, the controller regulates the valley of the output ripple under light-load conditions. Automatic Pulse-Skipping Crossover In skip mode, an inherent automatic switchover to pulse frequency modulation (PFM) takes place at light loads. This switchover is affected by a comparator that truncates the low-side switch on-time at the inductor current’s zero crossing. The zero-crossing comparator senses the inductor current across CS to OUT. Once (VCS - VOUT) drops below the 6mV zero-crossing, current-sense threshold, the comparator forces DL low. This mechanism causes the threshold between pulseskipping PFM and nonskipping PWM operation to coincide with the boundary between continuous and discontinuous inductor-current operation (also known as the critical conduction point). The load-current level at which PFM/PWM crossover occurs, ILOAD(SKIP), is given by: ILOAD (SKIP) [ A ] = (VSUP − VOUT ) VOUT 2 × VSUP × fSW [MHz ] × L [μH] The switching waveforms can appear noisy and asynchronous when light-loading causes pulse-skipping operation. This is a normal operating condition that results in high light-load efficiency. Trade-offs in PFM noise vs. light-load efficiency is made by varying the inductor value. Generally, low inductor values produce a broader efficiency versus load current, while higher values result in higher full-load efficiency (assuming that the coil resistance remains constant) and less output-voltage ripple. Drawbacks of using higher inductor values include larger physical size and degraded loadtransient response (especially at low input-voltage levels). MOSFET Gate Drivers (DH and DL) The DH and DL drivers are optimized for driving logiclevel n-channel power MOSFETs. The DH high-side n-channel MOSFET driver is powered by charge pumping at BST, while the DL synchronous rectifier drivers are powered directly by the 5V linear regulator (BIAS). ______________________________________________________________________________________ 36V, 1MHz Step-Down Controller with Low Operating Current VOUT VSUPfSW INDUCTOR CURRENT IPK ILOAD = IPK/2 0 ON-TIME TIME Figure 1. Pulse-Skipping/Discontinuous Crossover Point An adaptive dead-time circuit monitors the DH and DL outputs and prevents the opposite-side MOSFET from turning on until the other MOSFET is fully off. Thus, the circuit allows the high-side driver to turn on only when the DL gate driver has been turned off. Similarly, it prevents the low-side (DL) from turning on until the DH gate driver has been turned off. The adaptive driver dead-time allows operation without shoot-through with a wide range of MOSFETs, minimizing delays and maintaining efficiency. There must be a low-resistance, low-inductance path from the DL and DH drivers to the MOSFET gates for the adaptive deadtime circuits to work properly. Otherwise, because of the stray impedance in the gate discharge path, the sense circuitry could interpret the MOSFET gates as off while the VGS of the MOSFET is still high. To minimize stray impedance, use very short, wide traces (50 mils to 100 mils wide if the MOSFET is 1in from the controller). Synchronous rectification reduces conduction losses in the rectifier by replacing the normal low-side Schottky catch diode with a low-resistance MOSFET switch. The internal pulldown transistor that drives DL low is robust, with a 1.6Ω (typ) on-resistance. This low onresistance helps prevent DL from being pulled up during the fast rise time of the LX node, due to capacitive coupling from the drain to the gate of the low-side synchronous rectifier MOSFET. Applications with high input voltages and long-inductive driver traces can require additional gate-to-source capacitance. This ⎛C ⎞ VGS(TH) > VSUP ⎜ RSS ⎟ ⎝ CISS ⎠ High-Side Gate-Drive Supply (BST) The high-side MOSFET is turned on by closing an internal switch between BST and DH. This provides the necessary gate-to-source voltage to turn on the highside MOSFET, an action that boosts the gate-drive signal above VSUP. The boost capacitor connected between BST and LX holds up the voltage across the floating gate driver during the high-side MOSFET on-time. The charge lost by the boost capacitor for delivering the gate charge is refreshed when the high-side MOSFET is turned off and the LX node swings down to ground. When the LX node is low, an internal highvoltage switch connected between BIAS and BST recharges the boost capacitor to the BIAS voltage. See the Boost-Flying Capacitor Selection section to choose the right size of the boost capacitor. Dropout Behavior During Undervoltage Transition The controller generates a low-side pulse every four clock cycles to refresh the BST capacitor during lowdropout operation. This guarantees that the MAX16955 operates in dropout mode during undervoltage transients like cold crank. Current Limiting and Current-Sense Inputs (CS and OUT) The current-limit circuit uses differential current-sense inputs (CS and OUT) to limit the peak inductor current. If the magnitude of the current-sense signal exceeds the current-limit threshold, the PWM controller turns off the high-side MOSFET. The actual maximum load current is less than the peak current-limit threshold by an amount equal to half the inductor ripple current. Therefore, the maximum load capability is a function of the current-sense resistance, inductor value, switching frequency, and duty cycle (V OUT /V SUP ). See the Current Sensing section. ______________________________________________________________________________________ 15 MAX16955 tON(SKIP) = ensures that fast-rising LX edges do not pull up the low-side MOSFET’s gate, causing shoot-through currents. The capacitive coupling between LX and DL created by the MOSFET’s gate-to-drain capacitance (CGD = CRSS), gate-to-source capacitance (CGS = CISS C GD ), and additional board parasitic should not exceed the following minimum threshold: Design Procedure OUT Effective Input Voltage Range Although the MAX16955 controller can operate from input supplies up to 42V and regulate down to 1V, the minimum voltage conversion ratio (VOUT/VSUP) might be limited by the minimum controllable on-time. For proper fixed-frequency PWM operation, the voltage conversion ratio should obey the following condition: RFB1 FB RFB2 VOUT > tON(MIN) × fSW VSUP where tON(MIN) is 80ns and fSW is the switching frequency in Hz. If the desired voltage conversion does not meet the above condition, then pulse skipping occurs to decrease the effective duty cycle. To avoid this, decrease the switching frequency or lower the input voltage (VSUP). MAX16955 Figure 2. Adjustable Output Voltage Setting the Output Voltage Connect FB to BIAS to enable the fixed step-down controller output voltage (5V), set by a preset, internal resistive voltage-divider connected between the output (OUT) and SGND. ⎡⎛ V ⎞ ⎤ RFB1 = RFB2 ⎢⎜ OUT ⎟ − 1⎥ ⎢⎣⎝ VFB ⎠ ⎥⎦ where VFB = 1V (typ) (see the Electrical Characteristics table) and VOUT can range from 1V to 13V. 1200 1150 1100 1050 1000 950 900 850 800 750 700 650 600 550 500 450 400 350 300 250 200 MAX16955 toc07 To achieve other output voltages between 1V to 13V, connect a resistive divider from OUT to FB to SGND (Figure 2). Select RFB2 (FB to SGND resistor) less than or equal to 100kΩ. Calculate RFB1 (OUT to FB resistor) with the following equation: SWITCHING FREQUENCY vs. RFOSC FREQUENCY (kHz) MAX16955 36V, 1MHz Step-Down Controller with Low Operating Current 25 35 45 55 65 75 85 95 105 115 125 135 145 RFOSC (kI) Setting the Switching Frequency The switching frequency, f SW , is set by a resistor (RFOSC) connected from FOSC to SGND. See Figure 3 to select the correct R FOSC value for the desired switching frequency. For example, a 400kHz switching frequency is set with RFOSC = 76.8kΩ. Higher frequencies allow designs with lower inductor values and less output capacitance. Consequently, peak currents and I2R losses are lower at higher switching frequencies, but core losses, gatecharge currents, and switching losses increase. Inductor Selection Three key inductor parameters must be specified for operation with the MAX16955: inductance value (L), inductor saturation current (ISAT), and DC resistance (RDCR). To select inductance value, the ratio of inductor 16 Figure 3. Switching Frequency vs. RFOSC peak-to-peak AC current to DC average current (LIR) must be selected first. A good compromise between size and loss is a 30% peak-to-peak ripple current to average-current ratio (LIR = 0.3). The switching frequency, input voltage, output voltage, and selected LIR then determine the inductor value as follows: L= ( VOUT VSUP(MIN) − VOUT ) VSUP(MIN) × fSW × IOUT(MAX) × LIR where VSUP(MIN) is the minimum supply voltage, VOUT is the typical output voltage, and IOUT(MAX) is the maximum ______________________________________________________________________________________ 36V, 1MHz Step-Down Controller with Low Operating Current VOUT [V] = 1 ±25% L[μH] × fSW [MHz] However, if it is necessary, higher inductor values can be selected. The exact inductor value is not critical and can be adjusted to make trade-offs among size, cost, efficiency, and transient response requirements. Table 1 shows a comparison between small and large inductor sizes. Table 1. Inductor Size Comparison INDUCTOR SIZE SMALLER LARGER Lower price Smaller ripple Smaller form factor Higher efficiency Faster load response Larger fixed-frequency range in skip mode The minimum practical inductor value is one that causes the circuit to operate at the edge of critical conduction (where the inductor current just touches zero with every cycle at maximum load). Inductor values lower than this grant no further size-reduction benefit. The optimum operating point is usually found between 25% and 45% ripple current. When pulse skipping (FSYNC low and light loads), the inductor value also determines the load-current value at which PFM/PWM switchover occurs. For the selected inductance value, the actual peak-topeak inductor ripple current (ΔIINDUCTOR) is defined by: ΔIINDUCTOR = VOUT ( VSUP − VOUT ) VSUP × fSW × L where ΔIINDUCTOR is in mA, L is in μH, and fSW is in kHz. The core must be large enough not to saturate at the peak inductor current (IPEAK): IPEAK = ILOAD(MAX) + ΔIINDUCTOR 2 Transient Response The inductor ripple current also impacts transient response performance, especially at low VSUP - VOUT differentials. Low inductor values allow the inductor current to slew faster, replenishing charge removed from the output filter capacitors by a sudden load step. The total output voltage sag is the sum of the voltage sag while the inductor is ramping up and the voltage sag before the next pulse can occur: VSAG = ( ) 2 L ΔILOAD(MAX) ΔILOAD(MAX) ( t − Δt ) + COUT 2COUT (( VSUP × DMAX ) − VOUT ) where D MAX is the maximum duty factor (see the Electrical Characteristics table), L is the inductor value in μH, COUT is the output capacitor value in μF, t is the switching period (1/fSW) in μs, and Δt equals (VOUT/VSUP) × t when in fixed-frequency PWM mode, or L × 0.2 × IMAX/(VSUP - VOUT) when in skip mode. The amount of overshoot (VSOAR) during a full-load to noload transient due to stored inductor energy can be calculated as: (ΔILOAD(MAX) ) 2 VSOAR ≈ L 2COUT VOUT Current Sensing For the most accurate current sensing, use a currentsense resistor (RSENSE) between the inductor and the output capacitor. Connect CS to the inductor side of R SENSE, and OUT to the capacitor side. Dimension RSENSE so its maximum current (IOC) induces a voltage of VLIMIT (72mV minimum) across RSENSE. If a higher voltage drop across RSENSE must be tolerated, divide the voltage across the sense resistor with a voltage-divider between CS and OUT to reach VLIMIT (72mV minimum). The current-sense method (Figure 4) and magnitude determine the achievable current-limit accuracy and power loss. Typically, higher current-sense limits provide tighter accuracy, but also dissipate more power. For the best current-sense accuracy and overcurrent protection, use a ±1% tolerance current-sense resistor with low parasitic inductance between the inductor and output as shown in Figure 4a. ______________________________________________________________________________________ 17 MAX16955 load current. The switching frequency is set by RFOSC (see the Setting the Switching Frequency section). The MAX16955 uses internal frequency independent slope compensation to ensure stable operation at duty cycles above 50%. The maximum slope compensation ramp voltage over a full clock period is 200mV. Use the equation below to select the inductor value: MAX16955 36V, 1MHz Step-Down Controller with Low Operating Current Alternatively, high-power applications that do not require highly accurate current-limit protection can reduce the overall power dissipation by connecting a series RC circuit across the inductor (Figure 4b) with an equivalent time constant: ⎛ R2 ⎞ RCSHL = ⎜ R ⎝ R1 + R2 ⎟⎠ DCR and: RDCR = L ⎛ 1 1⎞ ⎜ + ⎟ CEQ ⎝ R1 R2 ⎠ where RCSHL is the required current-sense resistor and RDCR is the inductor’s series DC resistance. Use the typical inductance and RDCR values provided by the inductor manufacturer. Carefully observe the PCB layout guidelines to ensure the noise and DC errors do not corrupt the differential current-sense signals seen by CS and OUT. Place the sense resistor close to the IC with short, direct traces, making a Kelvin-sense connection to the current-sense resistor. INPUT (VIN) CIN MAX16955 DH NH L RSENSE LX DL NL COUT DL GND CS OUT a) OUTPUT SERIES RESISTOR SENSING INPUT (VIN) CIN MAX16955 DH NH INDUCTOR L RDCR LX DL NL DL R1 R2 RCSHL = GND CS COUT CEQ RDCR = ( ) R2 RDCR R1 + R2 L CEQ [ OUT b) LOSSLESS INDUCTOR SENSING Figure 4. Current-Sense Configurations 18 ______________________________________________________________________________________ 1 1 + R1 R2 ] 36V, 1MHz Step-Down Controller with Low Operating Current IRMS = ILOAD(MAX) VOUT ( VSUP − VOUT ) VSUP I RMS has a maximum value when the input voltage equals twice the output voltage (VSUP = 2VOUT), so IRMS(MAX) = ILOAD(MAX)/2. Choose an input capacitor that exhibits less than +10°C self-heating temperature rise at the RMS input current for optimal long-term reliability. The input-voltage ripple comprises ΔVQ (caused by the capacitor discharge) and ΔVESR (caused by the ESR of the capacitor). Use low-ESR ceramic capacitors with high-ripple-current capability at the input. Assume the contribution from the ESR and capacitor discharge is equal to 50%. Calculate the input capacitance and ESR required for a specified input voltage ripple using the following equations: ESRIN = ΔVESR ΔI IOUT + L 2 where: ΔIL = ( VSUP − VOUT ) × VOUT VSUP × fSW × L and: absorb the inductor energy while transitioning from fullload to no-load conditions without tripping the overvoltage fault protection. When using high-capacitance, low-ESR capacitors, the filter capacitor’s ESR dominates the output-voltage ripple. The size of the output capacitor depends on the maximum ESR required to meet the output-voltage ripple (VRIPPLE(P-P)) specifications: VRIPPLE(P −P) = ESR × ILOAD(MAX) × LIR In skip mode, the inductor current becomes discontinuous, with the peak current set by the skip-mode current-sense threshold (VSKIP = 32mV, typ). In skip mode, the no-load output ripple can be determined as follows: V × ESR VRIPPLE(P −P) = SKIP RSENSE The actual capacitance value required relates to the physical size needed to achieve low ESR, as well as to the chemistry of the capacitor technology. Thus, the capacitor is usually selected by ESR and voltage rating rather than by capacitance value. When using low-value filter capacitors, such as ceramic capacitors, size is usually determined by the capacity needed to prevent V SAG and V SOAR from causing problems during load transients. Generally, once enough capacitance is added to meet the overshoot requirement, undershoot at the rising load edge is no longer a problem (see the VSAG and VSOAR equations in the Transient Response section). However, low-value filter capacitors typically have high-ESR zeros that can affect the overall stability. Compensation Design I × D (1 − D) CIN = OUT ΔVQ × fSW where: V D = OUT VSUP Output Capacitor The output filter capacitor must have low enough ESR to meet output ripple and load-transient requirements, yet have high enough ESR to satisfy stability requirements. The output capacitance must be high enough to The MAX16955 uses an internal transconductance error amplifier with its inverting input and its output available to the user for external frequency compensation. The output capacitor and compensation network determine the loop stability. The inductor and the output capacitor are chosen based on performance, size, and cost. Additionally, the compensation network optimizes the control-loop stability. The controller uses a current-mode control scheme that regulates the output voltage by forcing the required current through the external inductor. The MAX16955 uses the voltage drop across the DC resistance of the inductor or the alternate series current-sense resistor to measure the inductor current. Current-mode control ______________________________________________________________________________________ 19 MAX16955 Input Capacitor The input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuit’s switching. The input capacitor RMS current requirement (IRMS) is defined by the following equation: MAX16955 36V, 1MHz Step-Down Controller with Low Operating Current eliminates the double pole in the feedback loop caused by the inductor and output capacitor, resulting in a smaller phase shift and requiring less elaborate erroramplifier compensation than voltage-mode control. A simple single-series resistor (RC) and capacitor (CC) are required to have a stable, high-bandwidth loop in applications where ceramic capacitors are used for output filtering (Figure 5). For other types of capacitors, due to the higher capacitance and ESR, the frequency of the zero created by the capacitance and ESR is lower than the desired closed-loop crossover frequency. To stabilize a nonceramic output capacitor loop, add another compensation capacitor (CF) from COMP to SGND to cancel this ESR zero. The basic regulator loop is modeled as a power modulator, output feedback divider, and an error amplifier. The power modulator has a DC gain set by g mc × RLOAD, with a pole and zero pair set by RLOAD, the output capacitor (COUT), and its ESR. The following equations determine the approximate value for the gain of the power modulator (GAINMOD(dc)), neglecting the effect of the ramp stabilization. Ramp stabilization is necessary when the duty cycle is above 50% and is internally and automatically done for the MAX16955: GAINMOD(dc) ≅ gmc × RLOAD × fSW × L RLOAD + ( fSW × L ) where RLOAD = VOUT/IOUT(MAX) in Ω, fSW is the switching frequency in MHz, L is the output inductance in μH, and gmc = 1/(AV_CS × RDC) in S. AV_CS is the voltage gain of the current-sense amplifier and is typically 11V/V (see the Electrical Characteristics table). RDC is the DC-resistance of the inductor or the current-sense resistor in Ω. In a current-mode step-down converter, the output capacitor, its ESR, and the load resistance introduce a pole at the following frequency: 1 fpMOD = ⎛ R ⎞ × f ×L 2π × COUT × ⎜⎜ LOAD SW + ESR⎟⎟ ⎝ RLOAD + ( fSW × L ) ⎠ The feedback voltage-divider has a gain of GAINFB = VFB/VOUT, where VFB is 1V (typ). The transconductance error amplifier has a DC gain of GAINEA(dc) = gm,EA × ROUT,EA, where gm,EA is the error amplifier transconductance, and ROUT,EA is the output resistance of the error amplifier. Use gm,EA of 2500μS (max) and ROUT,EA of 30MΩ (typ) for compensation design with the highest phase margin. A dominant pole (fdpEA) is set by the compensation capacitor (CC), the compensation resistor (RC), and the amplifier output resistance (ROUT,EA). A zero (fzEA) is set by the compensation resistor (RC) and the compensation capacitor (CC). There is an optional pole (fpEA) set by CF and RC to cancel the output capacitor ESR zero if it occurs near the crossover frequency (f C , where the loop gain equals 1 (0dB)). Thus: fdpEA = 1 2 π × CC × (ROUT,EA + RC ) fzEA = 1 2 π × CC × RC fpEA = 1 2π × CF × RC The loop-gain crossover frequency (fC) should be set below 1/5 the switching frequency and much higher than the power-modulator pole (fpMOD): f fpMOD << fC ≤ SW 5 The total loop gain as the product of the modulator gain, the feedback voltage-divider gain, and the error amplifier gain at fC should be equal to 1. So: GAINMOD( fC) × VFB × GAINEA( fC) = 1 VOUT The output capacitor and its ESR also introduce a zero at: fzMOD = 1 2π × ESR × COUT When COUT is composed of n identical capacitors in parallel, the resulting COUT = n × COUT(EACH), and ESR = ESR(EACH)/n. Note that the capacitor zero for a parallel combination of like capacitors is the same as for an individual capacitor. 20 For the case where fzMOD is greater than fC: GAINEA( fC) = gm,EA × RC GAINMOD( fC) = GAINMOD(dc) × ______________________________________________________________________________________ fpMOD fC 36V, 1MHz Step-Down Controller with Low Operating Current Solving for RC: GAINMOD( fC) × VFB × gm,EA × RC = 1 VOUT Solving for RC: RC = VOUT gm,EA × VFB × GAINMOD( fC) Set the error-amplifier compensation zero formed by RC and CC (fzEA) at the fpMOD. Calculate the value of CC as follows: CC = VOUT × fC gm,EA × VFB × GAINMOD( fC) × fzMOD Set the error-amplifier compensation zero formed by RC and CC at the fpMOD (fzEA = fpMOD): CC = CF = 1 2π × fzMOD × RC As the load current decreases, the modulator pole also decreases; however, the modulator gain increases accordingly and the crossover frequency remains the same. For the case where fzMOD is less than fC: The power-modulator gain at fC is: GAINMOD( fC) = GAINMOD(dc) × 1 2π × RC × fzMOD MOSFET Selection The MAX16955’s controller drives two external logiclevel n-channel MOSFETs as the circuit switch elements. The key selection parameters to choose these MOSFETs include: • • • On-resistance (RDS(ON)) Maximum drain-to-source voltage (VDS(MAX)) Minimum threshold voltage (VTH(MIN)) • • • Total gate charge (QG) Reverse-transfer capacitance (CRSS) Power dissipation VOUT fpMOD fzMOD 1 2π × f2MOD × RC If fzMOD is less than 5 × fC, add a second capacitor CF from COMP to SGND. Set fpEA = fzMOD and calculate CF as follows: 1 2π × fpMOD × RC If fzMOD is less than 5 x fC, add a second capacitor, CF, from COMP to SGND and set the compensation pole formed by R C and C F (f pEA ) at the f zMOD . Calculate the value of CF as follows: CF = RC = R1 The error-amplifier gain at fC is: f GAINEA( fC) = gm,EA × RC × zMOD fC COMP gm R2 VREF RC Therefore: CC CF f V GAINMOD( fC) × FB × gm,EA × RC × zMOD = 1 VOUT fC Figure 5. Compensation Network ______________________________________________________________________________________ 21 MAX16955 Therefore: MAX16955 36V, 1MHz Step-Down Controller with Low Operating Current Both n-channel MOSFETs must be logic-level types with guaranteed on-resistance specifications at VGS = 4.5V. Ensure that the conduction losses at minimum input voltage do not exceed MOSFET package thermal limits or violate the overall thermal budget. Also, ensure that the conduction losses, plus switching losses at the maximum input voltage, do not exceed package ratings or violate the overall thermal budget. The MAX16955’s DL gate driver must drive the low-side MOSFET (NL). In particular, check that the dV/dt caused by the high-side MOSFET (NH) turning on does not pull up the NL gate through its drain-to-gate capacitance. This is the most frequent cause of cross-conduction problems. Should this value be lower than the ideal capacitance and assuming that the minimum bootstrap capacitor should be large enough to supply 2V (typ) effective gate voltage: Gate-charge losses are dissipated by the driver and do not heat the MOSFET. Therefore, if the drive current is taken from the internal LDO regulator, the power dissipation due to drive losses must be checked. Both MOSFETs must be selected so that their total gate charge is low enough; therefore, BIAS can power both drivers without overheating the IC: PDRIVE = (VSUP - VBIAS) × QG_TOTAL × fSW where QG_TOTAL is the sum of the gate charges of both MOSFETs. The MAX16955’s maximum power dissipation depends on the thermal resistance from the die to the ambient environment and the ambient temperature. The thermal resistance depends on the device package, PCB copper area, other thermal mass, and airflow. Boost-Flying Capacitor Selection The bootstrap capacitor stores the gate voltage for the internal switch. Its size is constrained by the switching frequency and the gate charge of the high-side MOSFET. Ideally the bootstrap capacitance should be at least nine times the gate capacitance: CBST(TYP) = 9 × QG VBIAS This results in a 10% voltage drop when the gate is driven. However, if this value becomes too large to be recharged during the minimum off-time, a smaller capacitor must be chosen. During recharge, the internal bootstrap switch acts as a resistor, resulting in an RC circuit with the associated time constants. Two τs (time constants) are necessary to charge from 90% to 99%. The maximum allowable capacitance is, therefore: CBST(MAX) = tOFF(MIN) 2 × RBST(MAX) When in dropout, tOFF(MIN) is the minimum on-time of the low-side switch and is approximately half the clock period. When not in dropout, tOFF(MIN) = 1 - DMAX. 22 CBST(MIN) = QG VBIAS(MIN) − VTH(TYP) − 2V Should the minimum value still be too large to be recharged sufficiently, a parallel bootstrap Schottky diode may be necessary. Power Dissipation The device’s power dissipation depends on the internal linear regulator current consumption (PLIN) and the dynamic gate current (PGATE): PT = PLIN + PGATE Linear power is the average bias current times the voltage drop from VSUP to VBIAS: PLIN = IBIAS,AV × (VSUP - VBIAS) where I BIAS,AV = I SUP(MAX) + f SW × (Q G_DH(MAX) + QG_DL(MAX)), ISUP(MAX) is 2mA, fSW is the switching frequency programmed at FOSC, and QG_ is the MOSFET data sheet’s total gate-charge specification limits at VGS = 5V. Dynamic power is the average power during charging and discharging of both the external gates per period of oscillation: PGATE = 2 × V 2BIAS × tG,RISE × fSW RHS / LS where: 2× V 2BIAS W × tG,RISE ≈ 0.2 ×10−6 RHS / LS Hz is the frequency-dependent power, dissipated during one turn-on and turn-off cycle of each of the external n-channel MOSFETs. RHS/LS is the on-resistance of the NH and NL. ______________________________________________________________________________________ 36V, 1MHz Step-Down Controller with Low Operating Current TJ = TA + (PT × θJA) where θJA is the junction-to-ambient thermal resistance of the package, PT is power dissipated in the device, and TA is the ambient temperature. The θJA is 38.3°C/W for the 16-pin TSSOP package on multilayer boards, with the conditions specified by the respective JEDEC standards (JESD51-5, JESD51-7). If actual operating conditions significantly deviate from those described in the JEDEC standards, then an accurate estimation of the junction temperature requires a direct measurement of the case temperature (TC). Then, the junction temperature can be calculated using the following equation: TJ = TC + (PT × θJC) Use 3°C/W as θJC thermal resistance for the 16-pin TSSOP package. The case-to-ambient thermal resistance (θCA) is dependent on how well the heat is transferred from the PCB to the ambient. Therefore, solder the exposed pad of the TSSOP package to a large copper area to spread heat through the board surface, minimizing the case-to-ambient thermal resistance. Use large copper areas to keep the PCB temperature low. Applications Information PCB Layout Guidelines Make the controller ground connections as follows: create a small analog ground plane near the IC by using any of the PCB layers. Connect this plane to SGND and use this plane for the ground connection for the SUP bypass capacitor, compensation components, feedback dividers, and FOSC resistor. If possible, place all power components on the top side of the board and run the power stage currents, especially large high-frequency components, using traces or copper fills on the top side only, without adding vias. On the top side, lay out a large PGND copper area for the output, and connect the bottom terminals of the high-frequency input capacitors, output capacitors, and the source terminals of the low-side MOSFET to that area. Then, make a star connection of the SGND plane to the top copper PGND area with few vias in the vicinity of the source terminal sensing. Do not connect PGND and SGND anywhere else. Refer to the MAX16955 evaluation kit data sheet for guidance. Keep the power traces and load connections short, especially at the ground terminals. This practice is essential for high efficiency and jitter-free operation. Use thick copper PCBs (2oz. vs. 1oz.) to enhance efficiency. Place the controller IC adjacent to the synchronous rectifier MOSFET (NL) and keep the connections for LX, PGND, DH, and DL short and wide. Use multiple small vias to route these signals from the top to the bottom side. The gate current traces must be short and wide, measuring 50 mils to 100 mils wide if the low-side MOSFET is 1in from the controller IC. Connect the PGND trace from the IC close to the source terminal of the low-side MOSFET. Route high-speed switching nodes (BST, LX, DH, and DL) away from the sensitive analog areas (FOSC, COMP, and FB). Group all SGND-referred and feedback components close to the IC. Keep the FB and compensation network nets as small as possible to prevent noise pickup. ______________________________________________________________________________________ 23 MAX16955 To estimate the temperature rise of the die, use the following equation: MAX16955 36V, 1MHz Step-Down Controller with Low Operating Current VBAT 5.5V TO 28V D1 C1 C2 C3 1 SUP R1 2 VEN DH EN BST R2 10 VL_IN D2 RED R5 6 PGOOD LX MAX16955 DL COMP C8 PGND 4 C9 3 5 N1-B 16 14 12 L1 C4 N1-A 11 FSYNC CS R4 15 8 R3 FOSC SGND OUT BIAS 13 FB 7 9 VOUT 5V C6 C7 Figure 6. Typical Operating Circuit for VOUT = 5V 24 ______________________________________________________________________________________ C5 36V, 1MHz Step-Down Controller with Low Operating Current MAX16955 VBAT 5.5V TO 28V C1 C2 C3 1 SUP R4 2 VEN DH EN BST R7 10 *VBIAS PGOOD MAX16955 D1 6 R6 LX DL COMP C9 PGND C8 4 R5 3 5 FSYNC CS 15 N1-B 16 L1 C4 14 12 N1-A 11 8 R3 FOSC SGND OUT BIAS 13 9 VOUT 1.2V/5A FB R1 7 C5 C6 C7 R2 *CONNECT FSYNC TO BIAS FOR FIXED-FREQUENCY PWM MODE. CONNECT FSYNC TO SGND FOR SKIP MODE. Figure 7. Typical Operating Circuit for Adjustable Output Voltage, VOUT = 1.2V/5A Chip Information PROCESS: BiCMOS Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 16 TSSOP-EP U16E+3 21-0108 90-0120 ______________________________________________________________________________________ 25 MAX16955 36V, 1MHz Step-Down Controller with Low Operating Current Revision History REVISION NUMBER REVISION DATE 0 3/11 DESCRIPTION Initial release PAGES CHANGED — Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 26 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.