TI LM3448

LM3448
LM3448 Phase Dimmable Offline LED Driver with Integrated FET
Literature Number: SNOSB51B
LM3448
Phase Dimmable Offline LED Driver with Integrated FET
General Description
Features
The LM3448 is an adaptive constant off-time AC/DC buck
(step-down) constant current LED regulator designed to be
compatible with TRIAC dimmers. The LM3448 provides a
constant current for illuminating high power LEDs and includes a phase angle dim decoder. The dim decoder allows
wide range LED dimming using standard forward and reverse
phase TRIAC dimmers. The integrated high-voltage and low
Rdson MOSFET reduces design complexity while improving
LED driver efficiency. The integrated and patented architecture facilitates implementation of small form factor LED
drivers suitable for integrated LED lamps with very low external component count. The LM3448 also provides the flexibility
required to implement both isolated and non-isolated solutions based on the Flyback, Buck or Buck-Boost topology
using either active or passive power factor correction (ValleyFill) circuits. Additional features include thermal shutdown,
current limit and VCC under-voltage lockout.
■ Input phase angle dim decoder circuit for LED dimming
■ Integrated, vertical 600V MOSFET with superior
avalanche energy capability
■ Application voltage range 85VAC – 265VAC
■ Adjustable switching frequency
■ Adaptive programmable off-time allows for constant ripple
■
■
■
■
■
current
No 120Hz flicker possible
Low quiescent current
Thermal shutdown
Low profile 16-pin Narrow SOIC package
Wave solder capable
Applications
■
■
■
■
Retrofit TRIAC Dimming
Solid State Lighting
Industrial and Commercial Lighting
Residential Lighting
Typical LM3448 LED Driver Application Circuit
301258a0
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 2011 Texas Instruments Incorporated
301258
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LM3448 Phase Dimmable Offline LED Driver with Integrated FET
November 8, 2011
LM3448
Connection Diagram
Top View
30125873
16-Lead Narrow SOIC Package
NS Package Drawing M16A
Ordering Information
Order Number
Spec.
Package Type
NSC Package
Drawing
LM3448MA
NOPB
Narrow SOIC-16
M16A
48 Units, Rails
LM3448MAX
NOPB
Narrow SOIC-16
M16A
2500 Units, Tape and Reel
Supplied As
Pin Descriptions
Pin(s)
Name
1, 2, 15, 16
SW
Drain connection of internal 600V MOSFET.
3, 14
NC
No connect. Provides clearance between high voltage and low voltage pins. Do not tie to GND.
4
BLDR
Bleeder pin. Provides the input signal to the angle detect circuitry. A 230Ω internal resistor ensures BLDR is
pulled down for proper angle sense detection.
5, 12
GND
Circuit ground connection.
6
VCC
Input voltage pin. This pin provides the power for the internal control circuitry and gate driver. Connect a 22uF
(minimum) bypass capacitor to ground.
7
ASNS
PWM output of the TRIAC dim decoder circuit. Outputs a 0 to 4V PWM signal with a duty cycle proportional
to the TRIAC dimmer on-time.
8
FLTR1
First filter input. The 120Hz PWM signal from ASNS is filtered to a DC signal and compared to a 1 to 3V, 5.85
kHz ramp to generate a higher frequency PWM signal with a duty cycle proportional to the TRIAC dimmer
firing angle. Pull above 4.9V (typical) to TRI-STATE® DIM.
9
DIM
10
COFF
OFF time setting pin. A user set current and capacitor connected from the output to this pin sets the constant
OFF time of the switching controller.
11
FLTR2
Second filter input. A capacitor tied to this pin filters the PWM dimming signal to supply a DC voltage to control
the LED current. Could also be used as an analog dimming input.
13
ISNS
LED current sense pin (internally connected to MOSFET source). Connect a resistor from ISNS to GND to
set the maximum LED current.
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Description
Input/output dual function dim pin. This pin can be driven with an external PWM signal to dim the LEDs. It
may also be used as an output signal and connected to the DIM pin of other LM3448/LM3445 devices or
LED drivers to dim multiple LED circuits simultaneously.
2
If Military/Aerospace specified devices are required,
please contact the Texas Instruments Sales Office/
Distributors for availability and specifications.
SW to GND
BLDR to GND
VCC, FLTR1 to GND
ISNS to GND
ASNS, DIM, FLTR2, COFF to
GND
SW FET Drain Current:
Peak
Continuous
-0.3V to +600V
-0.3V to +17V
-0.3V to +14V
-0.3V to +2.5V
Operating Conditions
-0.3V to +7.0V
VCC
Junction Temperature Range
1.2A
Limited by TJ-MAX
Internally Limited
2 kV
125°C
-65°C to +150°C
260°C
(Note 1)
8V to 12V
−40°C to +125°C
Electrical Characteristics (Note 1)
VCC = 12V unless otherwise noted. Limits in standard type face are for TJ = 25°C and those with boldface type apply over the full
Operating Temperature Range ( TJ = −40°C to +125°C). Minimum and Maximum limits are guaranteed through test, design, or
statistical correlation. Typical values represent the most likely parametric norm at TJ = +25ºC and are provided for reference
purposes only.
Typ
(Note 5)
Max
(Note 4)
Units
Bleeder resistance to GND IBLDR = 10mA
230
325
Ω
IVCC
Operating supply current
2.00
2.85
mA
VCC-UVLO
Rising threshold
7.4
7.7
V
1.276
1.327
V
60
Ω
Symbol
Parameter
Min
(Note 4)
Conditions
BLEEDER
RBLDR
VCC SUPPLY
Non-switching
Falling threshold
6.0
Hysterisis
6.4
1
COFF
VCOFF
Time out threshold
1.225
RCOFF
Off timer sinking
impedance
33
tCOFF
Restart timer
180
µs
CURRENT LIMIT
VISNS
ISNS limit threshold
tISNS
Leading edge blanking time
125
ns
Current limit reset delay
180
µs
5.85
kHz
1.174
1.269
1.364
V
INTERNAL PWM RAMP
fRAMP
Frequency
VRAMP
Valley voltage
0.96
1.00
1.04
Peak voltage
2.85
3.00
3.08
Maximum duty cycle
96.5
98.0
6.79
7.21
DRAMP
V
%
DIM DECODER
VANG_DET
Angle detect rising
threshold
VASNS
ASNS filter delay
Observed on BLDR pin
4
ASNS VMAX
IASNS
IDIM
7.81
3.81
3.96
ASNS drive capability sink VASNS = 2V
-7.6
ASNS drive capability
source
VASNS = 2V
4.3
DIM low sink current
VDIM = 1V
DIM high source current
VDIM = 4V
-2.80
3.00
3
V
µs
4.11
V
mA
-1.65
4.00
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LM3448
Continuous Power Dissipation
(Note 2)
ESD Susceptibility:
HBM (Note 3)
Junction Temperature (TJ-MAX)
Storage Temperature Range
Maximum Lead Temperature
(Solder and Reflow)
Absolute Maximum Ratings (Note 1)
LM3448
Symbol
Parameter
Conditions
VDIM
DIM low voltage
PWM input voltage threshold
Min
(Note 4)
Typ
(Note 5)
0.9
1.33
DIM high voltage
VTSTH
TRI-STATE threshold
voltage
RDIM
DIM comparator TRISTATE impedance
Apply to FLTR1 pin
Max
(Note 4)
Units
V
2.33
3.15
4.87
5.25
10
V
MΩ
CURRENT SENSE COMPARATOR
VFLTR2
FLTR2 open circuit voltage
RFLTR2
FLTR2 impedance
720
750
780
mV
420
kΩ
660
V
OUTPUT MOSFET (SW FET)
VBVDS
SW to ISNS breakdown
voltage
IDS
SW to ISNS leakage
current (Note 8)
RON
SW to ISNS switch on
resistance
600
SW - ISNS = 600V
1
µA
3.6
Ω
165
°C
THERMAL SHUTDOWN
TSD
Thermal shutdown
temperature
(Note 6)
Thermal shutdown
hysteresis
20
THERMAL RESISTANCE
RθJA
Junction to Ambient
(Note 6, Note 7)
95
°C/W
Note 1: Absolute Maximum Ratings are limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed and do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical
Characteristics table. All voltages are with respect to the potential at the GND pin unless otherwise specified.
Note 2: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at approximately TJ = 165°C (typ.) and
disengages at approximately TJ = 145°C (typ).
Note 3: Human Body Model, applicable std. JESD22-A114-C.
Note 4: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100%
production tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used
to calculate Average Outgoing Quality Level (AOQL).
Note 5: Typical numbers are at 25°C and represent the most likely norm.
Note 6: These electrical parameters are guaranteed by design and are not verified by test.
Note 7: This RθJA typical value determined using JEDEC specifications JESD51-1 to JESD51-11. However junction-to-ambient thermal resistance is highly boardlayout dependent. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues during board design. In
high-power dissipation applications, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the
maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient
thermal resistance of the part/package in the application (RθJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (RθJA × PD-MAX).
Note 8: High voltage devices such as the LM3448 are susceptible to increased leakage currents when exposed to high humidity and high pressure operating
environments. Users of this device are cautioned to satisfy themselves as to the suitability of this product in the intended end application and take any necessary
precautions (e.g. system level HAST/HALT testing, conformal coating, potting, etc.) to ensure proper device operation.
Note 9: Data used for this plot taken from Design #3.
Note 10: Data used for this plot taken from Design #2.
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TJ = 25°C and VCC = 12V unless otherwise specified.
Power Factor vs. Input Line Voltage (Note 9)
Efficiency vs. Input Line Voltage (Note 9)
84
0.98
7 LEDs
0.97
POWER FACTOR
EFFICIENCY (%)
82
80
78
9 LEDs
76
9 LEDs
0.96
0.95
7 LEDs
0.94
74
80
90
100 110 120 130
INPUT VOLTAGE (VRMS)
0.93
80
140
90
100 110 120 130
INPUT VOLTAGE (VRMS)
30125881
fSW vs. Input Line Voltage (Note 10)
90
220
SWITCHING FREQUENCY (kHz)
LED CURRENT (mA)
240
8 LEDs
200
180
10 LEDs
160
12 LEDs
140
80
140
30125882
LED Current vs. Input Line Voltage (Note 10)
90
100 110 120 130
INPUT VOLTAGE (VRMS)
8 LEDs
85
80
75
70
10 LEDs
65
12 LEDs
60
140
80
90
100 110 120 130
INPUT VOLTAGE (VRMS)
30125884
BLDR Resistor vs. Temperature
300
190
280
BLDR RESISTOR (Ω)
200
180
170
160
260
240
220
200
150
-50 -25
140
30125883
Min On-Time (tON) vs. Temperature
MIN ON-TIME (ns)
LM3448
Typical Performance Characteristics
-50 -25
0 25 50 75 100 125 150
TEMPERATURE (°C)
0 25 50 75 100 125 150
TEMPERATURE (°C)
30125802
30125833
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LM3448
VCC UVLO vs. Temperature
VCOFF Threshold vs. Temperature
1.30
UVLO (VCC) Rising
VCOFF THRESHOLD (V)
UVLO THRESHOLD (V)
8.0
7.5
7.0
UVLO (VCC) Falling
6.5
6.0
-50 -25
1.29
1.28
1.27
1.26
1.25
0 25 50 75 100 125 150
TEMPERATURE (°C)
-50 -25
30125814
0 25 50 75 100 125 150
TEMPERATURE (°C)
30125837
Leading Edge Blanking Variation Over Temperature
Angle Detect Threshold vs. Temperature
ANGLE DETECT THRESHOLD (V)
7.8
7.6
7.4
7.2
7.0
6.8
6.6
-50 -30 -10 10 30 50 70 90 110 130 150
TEMPERATURE (°C)
30125842
30125872
DIM Pin Duty Cycle vs. FLTR1 Voltage (Note 9)
DIM PIN DUTY CYCLE (%)
100
80
60
40
20
0
1.0 1.3 1.5 1.8 2.0 2.3 2.5 2.8 3.0
FLTR1 VOLTAGE (V)
30125862
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LM3448
Simplified Internal Block Diagram
30125811
Theory of Operation
The LM3448 contains all the necessary circuitry to build a linepowered (mains powered) constant current LED driver whose
output current can be controlled with a conventional TRIAC
dimmer.
OVERVIEW OF PHASE CONTROL DIMMING
A basic "phase controlled" TRIAC dimmer circuit is shown in
Figure 1.
30125812
FIGURE 1. Basic TRIAC Dimmer
30125813
An RC network consisting of R1, R2, and C1 delay the turn
on of the TRIAC until the voltage on C1 reaches the trigger
voltage of the diac. Increasing the resistance of the potentiometer (wiper moving downward) increases the turn-on delay which decreases the on-time or "conduction angle" of the
TRIAC (θ). This reduces the average power delivered to the
load.
FIGURE 2. Line Voltage and Dimming Waveforms
Voltage waveforms for a simple TRIAC dimmer are shown in
Figure 2. Figure 2(a) shows the full sinusoid of the input voltage. Even when set to full brightness, few dimmers will provide 100% on-time (i.e. the full sinusoid). Figure 2(b) shows
a theoretical waveform from a dimmer. The on-time is often
referred to as the "conduction angle" and may be stated in
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LM3448
degrees or radians. The off-time represents the delay caused
by the RC circuit feeding the TRIAC. The off-time can be referred to as the "firing angle" and is simply (180° - θ).
Figure 2(c) shows a waveform from a reverse phase dimmer,
sometimes referred to as an electronic dimmer. These typically are more expensive, microcontroller based dimmers that
use switching elements other than TRIACs. Note that the
conduction starts from the zero-crossing and terminates
some time later. This method of control reduces the noise
spike at the transition. Since the LM3448 has been designed
to assess the relative on-time and control the LED current
accordingly, most phase control dimmers both forward and
reverse phase may be used with success.
A bridge rectifier converts the line (mains) voltage of (b) into
a series of half-sines as shown in (a).
30125815
FIGURE 3. Voltage Waveforms After Bridge Rectifier
Without TRIAC Dimming
30125817
(b) and (a) show typical TRIAC dimmed voltage waveforms
before and after the bridge rectifier.
FIGURE 5. AC Line Sense Circuitry
D1 is typically a 15V zener diode which forces transistor Q1
to “stand-off” most of the rectified line voltage. Having no capacitance on the source of Q1 allows the voltage on the BLDR
pin to rise and fall with the rectified line voltage as the line
voltage drops below zener voltage D1 (see the section on
Angle Detect).
A diode-capacitor network (D2, C5) is used to maintain the
voltage on the VCC pin while the voltage on the BLDR pin
goes low. This provides the supply voltage to operate the
LM3448.
Resistor R5 is used to bleed charge out of any stray capacitance on the BLDR node and may be used to provide the
necessary holding current for the dimmer when operating at
light output currents.
ANGLE DETECT
The Angle Detect circuit uses a comparator with a fixed
threshold voltage of 7.21V to monitor the BLDR pin to determine whether the TRIAC is on or off. The output of the
comparator drives the ASNS buffer and also controls the
bleeder circuit. A 4s delay line on the output is used to filter
out noise that could be present on this signal.
The output of the Angle Detect circuit is limited to a 0V to 4.0V
swing by the buffer and presented to the ASNS pin. R1 and
C3 comprise a low-pass filter with a bandwidth on the order
of 1.0Hz.
30125816
FIGURE 4. Voltage Waveforms After Bridge Rectifier With
TRIAC Dimming
SENSING THE RECTIFIED TRIAC WAVEFORM
An external series pass regulator (R2, D1, and Q1) translates
the rectified line voltage to a level where it can be sensed by
the BLDR pin on the LM3448 as shown in Figure 5.
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The transition from dimming with the DIM decoder to headroom or minimum on-time dimming is seamless. LED currents
from full load to as low as 0.5mA can be easily achieved.
COFF AND CONSTANT OFF-TIME CONTROL OVERVIEW
The LM3448 is a buck regulator that uses a proprietary constant off-time method to maintain constant current through a
string of LEDs as shown in Figure 6.
BLEEDER
While the BLDR pin is below the 7.21V threshold, the internal
bleeder MOSFET is on to place a small load (230Ω) on the
series pass regulator. This additional load is necessary to
complete the circuit through the TRIAC dimmer so that the
dimmer delay circuit can operate correctly. Above 7.21V, the
bleeder resistor is removed to increase efficiency.
FLTR1 PIN
The FLTR1 pin has two functions. Normally it is fed by ASNS
through filter components R1 and C3 and drives the dim decoder. However if the FLTR1 pin is tied above 4.9V ( e.g., to
VCC) the ramp comparator is at TRI-STATE disabling the dim
decoder.
DIM DECODER
The ramp generator produces a 5.85 kHz saw tooth wave with
a minimum of 1.0V and a maximum of 3.0V. The filtered ASNS
signal enters pin FLTR1 where it is compared against the
output of the Ramp Generator. The output of the ramp comparator will have an on-time which is inversely proportional to
the average voltage level at pin FLTR1. However since the
FLTR1 signal can vary between 0V and 4.0V (the limits of the
ASNS pin), and the ramp generator signal only varies between 1.0V and 3.0V, the output of the ramp comparator will
be on continuously for VFLTR1 < 1.0V and off continuously for
VFLTR1 > 3.0V. This allows a decoding range from 45° to 135°
to provide a 0 – 100% dimming range.
The output of the ramp comparator drives both a common
source N-channel MOSFET through a Schmitt trigger and the
DIM pin. The MOSFET drain is pulled up to 750 mV by a
50kΩ resistor.
Since the MOSFET inverts the output of the ramp comparator,
the drain voltage of the MOSFET is proportional to the duty
cycle of the line voltage that comes through the TRIAC dimmer. The amplitude of the ramp generator causes this proportionality to "hard limit" for duty cycles above 75% and
below 25%.
30125823
FLTR2
The MOSFET drain signal next passes through an RC filter
comprised of an internal 370kΩ resistor and an external capacitor on pin FLTR2. This forms a second low pass filter to
further reduce the ripple in this signal which is used as a reference by the PWM comparator. This RC filter is generally set
to 10Hz.
The net effect is that the output of the dim decoder is a DC
voltage whose amplitude varies from near 0V to 750 mV as
the duty cycle of the dimmer varies from 25% to 75%. This
corresponds to conduction angles of 45° to 135°.
The output voltage of the dim decoder directly controls the
peak current that will be delivered by the internal SW FET.
As the TRIAC fires beyond 135°, the DIM decoder no longer
controls the dimming. At this point the LEDs will dim gradually
for one of two reasons:
• The voltage at VBUCK decreases and the buck converter
runs out of headroom and causes LED current to decrease
as VBUCK decreases.
• Minimum on-time is reached which fixes the duty-cycle
and therefore reduces the voltage at VBUCK.
FIGURE 6. Simplified Buck Regulation Circuit
Constant off-time control architecture operates by simply
defining the off-time and allowing the on-time, and therefore
the switching frequency, to vary as either VIN or VO changes.
The output voltage is equal to the LED string voltage (VLED),
and should not change significantly for a given application.
The input voltage or VBUCK in this analysis will vary as the
input line varies. The length of the on-time is determined by
the sensed inductor current through a resistor to a voltage
reference at a comparator. During the on-time denoted by
tON, the SW FET is on causing the inductor current to increase
(see Figure 7). During the on-time, current flows from VBUCK
through the LEDs, L2, the LM3448's internal SW FET and
finally through R3 to ground. At some point in time the inductor
current reaches a maximum (IL2-PK) determined by the voltage
at the ISNS pin. This sensed voltage across R3 is compared
against the dim decoder voltage on FLTR2 at which point the
SW FET is turned off by the regulator. During the off-period
denoted by tOFF, the current through L2 continues to flow
through the LEDs via D10. Capacitor C12 eliminates most of
the ripple current seen in the inductor. Resistor R4, capacitor
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LM3448
The Angle Detect circuit and its filter produce a DC level which
corresponds to the duty cycle (relative on-time) of the TRIAC
dimmer. As a result, the LM3448 will work equally well with
50Hz or 60Hz line voltages.
LM3448
VCC BIAS SUPPLY
The LM3448 requires a supply voltage at the VCC pin in the
range of 8V to 12V. The device has VCC under-voltage lockout
(UVLO) with rising and falling thresholds of 7.4V and 6.4V
respectively. Methods for supplying the VCC voltage are discussed in the “Design Considerations” section of this
datasheet.
C11 and transistor Q3 provide a linear current ramp that in
conjunction with the COFF comparator threshold sets the
constant off-time for a given output voltage.
THERMAL SHUTDOWN
Thermal shutdown limits total power dissipation by turning off
the internal SW FET when the IC junction temperature exceeds 165°C. After thermal shutdown occurs, the SW FET will
not turn on until the junction temperature drops to approximately 145°C.
30125825
FIGURE 7. Inductor Current Waveform in CCM
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LM3448
The peak voltage of a two stage valley-fill capacitor is:
Design Considerations
VALLEY-FILL POWER FACTOR CORRECTION
For the non-isolated buck converter, a valley-fill power factor
correction (PFC) circuit shown in Figure 8 provides a simple
means of improving the converter’s power factor performance.
As the AC line decreases from its peak value every cycle,
there will be a point where the voltage magnitude of the AC
line is equal to the voltage that each capacitor is charged. At
this point diode D3 becomes reversed biased, and the capacitors are placed in parallel to each other (see Figure 10)
and VBUCK equals the capacitor voltage.
30125818
FIGURE 8. Two Stage Valley Fill Circuit
The valley-fill circuit allows the buck regulator to draw power
throughout a larger portion of the AC line. This allows the capacitance needed at VBUCK to be lower than if there were no
valley-fill circuit and adds passive power factor correction
(PFC) to the application. Besides better power factor correction, a valley-fill circuit allows the buck converter to operate
while separate circuitry translates the dimming information.
This allows for dimming that isn’t subject to 120Hz flicker that
can possibly be perceived by the human eye.
VBUCK supplies the power which drives the LED string. Diode
D3 allows VBUCK to remain high while V+ cycles on and off.
VBUCK has a relatively small hold capacitor C10 which reduces
the voltage ripple when the valley-fill capacitors are being
charged. However, the network of diodes and capacitors
shown between D3 and C10 make up a "valley-fill" circuit. The
valley-fill circuit can be configured with two or three stages.
The most common configuration is two stages which is illustrated in Figure 8.
When the “input line is high”, power is derived directly through
D3. The term “input line is high” can be explained as follows.
The valley-fill circuit charges capacitors C7 and C9 in series
when the input line is high (see Figure 9).
30125821
FIGURE 10. Two stage Valley-Fill Circuit when AC Line is
Low
The valley-fill circuit can be optimized for power factor, voltage hold-up and overall application size and cost. The
LM3448 will operate with a single stage or a three stage valley-fill circuit as well. Resistor R8 functions as a current
limiting resistor during start-up and during the transition from
series to parallel connection. Resistors R6 and R7 are 1MΩ
bleeder resistors and may or may not be necessary for each
application.
FLTR2 LINE-INJECTION
The technique of line-injection is another very effective means
of improving power factor performance. When using this
method, the valley-fill circuit can be eliminated which results
in a much simpler driver design. The trade off will be an increase of 120Hz ripple on the LED current.
Different FLTR2 circuits are shown in Figure 11. Figure 11(a)
shows how to set up FLTR2 when a passive PFC circuit (e.g.
valley-fill) is already being used and no line-injection is utilized. If passive PFC is not being implemented, then the
“direct line-injection” of Figure 11(b) or “AC line-injection” of
Figure 11(c) can be used.
Direct line-injection involves injecting a small portion (750mV
to 1.00V) of rectified AC line voltage (i.e. V+) into the FLTR2
pin. The result is that current shaping of the input current will
yield power factor values greater than 0.94.
AC coupled line-injection goes one step further by adding a
capacitor C14 between R15 and C11. This improves LED line
regulation but does so by trading out a small portion of the
power factor improvement from the direct-injection circuit. For
example with AC coupled line-injection, LED current regulation of up to +/- 3% is possible for an input voltage range of
105VAC to 135VAC when operating at a nominal 120VAC.
30125819
FIGURE 9. Two stage Valley-Fill Circuit when AC Line is
High
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LM3448
30125886
FIGURE 11. (a) No line-injection, (b) Direct line-injection, (c) AC-coupled line injection
DIRECT LINE-INJECTION FOR FLYBACK TOPOLOGY
For flyback converters using the LM3448, direct-line injection
can result in power factors greater than 0.95. Using this technique, the LM3448 circuit is essentially turned into a constant
power flyback converter operating in discontinuous conduction mode (DCM). The LM3448 normally works as a constant
off-time regulator, but by injecting a 1.0VPK rectified AC voltage into the FLTR2 pin, the on-time can be made to be
constant. With a DCM flyback converter the primary side current, i, needs to increase as the rectified input voltage, V+,
increases as shown in the following equations,
By using the line voltage injection technique, the FLTR2 pin
has the voltage wave shape shown in Figure 12 on it with no
TRIAC dimmer in-line. Peak voltage at the FLTR2 pin should
be kept below 1.25V otherwise current limit will be tripped.
Capacitor C11 is chosen small enough so as not to distort the
AC signal but just add a little filtering.
Although the on-time is probably never truly constant, it can
be observed in Figure 13 how (by injecting the rectified voltage) the on-time is adjusted.
or,
30125895
FIGURE 12. FLTR2 Waveform with No Dimmer
Therefore a constant on-time (since inductor L is constant)
can be obtained.
30125896
FIGURE 13. Typical Operation of Direct Line-Injection into FLTR2 Pin
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With a single LM3448 circuit on a common TRIAC dimmer, a
holding current resistor between 3kΩ and 5kΩ will be required. As the number of LM3448 circuits added to a single
dimmer increases, R4’s resistance can also be increased. A
few TRIAC dimmers will require a resistor as low as 1kΩ or
smaller for a single LM3448 circuit. Therefore the trade-off will
be dimming performance versus efficiency. As the holding
resistor R4 is increased, the overall system efficiency will also
increase.
30125885
FIGURE 14. Basic holding current circuit
OPTIMIZING THE HOLDING CURRENT
For optimal system performance and efficiency, only enough
holding current should be applied at the right time in the cycle
to keep the TRIAC operating properly. This will ensure no
variation or ‘flicker’ is seen in the LED light output while improving the circuit efficiency. Circuits that do this are outlined
individually as blocks in Figure 15. These circuits are de-
signed to identify the type of phase dimmer in-line with the
LM3448, add holding current for different dimming conditions,
or to discharge parasitic capacitances. The objective is to only
add enough holding current as needed regardless if the dimmer is of a forward or reverse phase type. This allows the
lighting manufacturer to optimize efficiency and gain Energy
Star approval if desired.
30125878
FIGURE 15. TRIAC holding current circuits
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LM3448
TRIAC DIMMER HOLDING CURRENT
In order to emulate an incandescent light bulb (essentially a
resistor) with any LED driver, the existing TRIAC will require
a small amount of holding current throughout the AC line cycle. As shown in Figure 14, a simple circuit consisting of R3,
D1, Q1 and R4 can accomplish this. With R4 placed on the
source of Q1, additional holding current can be pulled from
the TRIAC. Most TRIAC dimmers only require a few milliamps
of current to hold them on. A few “less expensive” TRIACs
sold on the market will require a bit more current. The value
of resistor R4 will depend on the type of TRIAC being used
and how many light fixtures are running off the TRIAC.
LM3448
Linear Hold Insertion Circuit
This circuit adds holding current during low TRIAC conduction
angles. A variable voltage between 0 and 5 volts is generated
at the Q6 gate by averaging the square wave output signal on
the DIM pin. The duty cycle of this square wave varies with
the TRIAC firing angle. As the LEDs are dimmed, the voltage
at the Q6 gate will rise pulling a “holding current” equal to the
Q6 source voltage divided by resistor R19.
Valley-Fill Holding Current Circuit
As described in the section on valley-fill PFC operation, when
the valley-fill capacitors are in parallel there is a brief period
of time where the output load is being supplied by these two
capacitors. Therefore there is minimal or no line current being
drawn from the AC line and the minimum holding current requirement is not met. The TRIAC may turn off at this time
which causes phase dimming decode issues. A circuit can be
added that detects when the valley-fill capacitors are in parallel. The result is that the gate of Q4 is pulled low, allowing
additional hold current to be sourced through resistor R10.
TRIAC Edge Detect Circuit
During initial turn on (forward phase) or turn off (reverse
phase) of a phase dimmer, a little extra holding current is
sometimes required to latch the phase dimmer on or discharge any parasitic capacitances on the AC line. In order to
determine which dimmer is being used, a TRIAC edge detect
circuit is needed.
When the TRIAC fires, a sharp edge is created that can be
captured by a properly sized R-C circuit. The combination of
C3 and R6 creates a positive pulse on R7 for a forward phase
dimmer or a negative pulse on R7 for a reverse phase dimmer. The pulse polarity determines whether the forward or
reverse phase holding current circuit will be used. The value
of R7 can be adjusted to vary the sensitivity of the edge detect
circuit.
Forward Phase Holding Current Circuit
This circuit adds holding current when a forward phase TRIAC
edge is detected. The TRIAC edge detect R-C circuit creates
a positive pulse on the base of Q3 each cycle when a forward
phase dimmer is present and dimming. The positive pulse
turns on Q3 which results in additional holding current being
pulled through R9.
Reverse Phase Holding Current Circuit
This circuit adds holding current when a reverse phase TRIAC
edge is detected. The TRIAC edge detect R-C circuit creates
a negative pulse on the emitter of Q2 each cycle when a reverse phase dimmer is present and dimming. This turns on
Q8 and connects R23 to the Q1 pass MOSFET, adding holding current and sharpening the turn-off of the reverse phase
dimmer.
START-UP AND BIAS SUPPLY
Figure 16 shows how to generate the necessary VCC bias
supply at start-up. Since the AC line peak voltage is always
higher than the rating of the regulator, all designs require an
N-channel MOSFET (passFET). The passFET (Q1) is connected with its drain attached to the rectified AC. The gate of
Q1 is connected to a zener diode (D1) which is then biased
from the rectified AC line through series resistance (R3). The
source of Q1 is held at a VGS below the zener voltage and
current flows through Q1 to charge up whatever capacitance
is present. If the capacitance is large enough, the source voltage will remain relatively constant over the line cycle and this
becomes the input bias supply at VCC. This bias circuit also
enables instant turn-on.
However once the circuit is operational, it can be desirable to
bootstrap VCC to an auxiliary winding of the inductor or transformer as shown in Figure 17. The two bias paths are each
connected to VCC through a diode to ensure the higher of the
two is providing VCC current. This bootstrapping greatly improves efficiency while still maintaining quick start-up response.
30125885
FIGURE 16. VCC start-up circuit
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14
LM3448
30125887
FIGURE 17. VCC auxiliary winding bias circuit
COFF CURRENT SOURCE CIRCUITS
There are a few different current source circuits that can be
used for establishing the LM3448 constant-off time control as
shown in Figure 18.
Figure 18(a) shows the simplest current source circuit. Capacitor COFF will be charged with a constant current from
VCC through resistor ROFF.
If there is large noise or ripple on the VCC pin, then the previously described circuit will fluctuate and the off-time will not
be constant. The circuit of Figure 18(b) addresses this by using a zener diode D1 across ROFF which establishes a stable
voltage reference for the current source with inherent VCC ripple rejection.
LED loads can exhibit voltage drift due to self-heating or external thermal conditions. A change in the LED stack voltage
will result in the LED current to drift as well. Figure 18(c) addresses this issue by having the COFF current source referenced to the LED stack voltage using Q1 and ROFF and
thereby compensating for LED voltage drift. Another benefit
is that the number of series LEDs in the LED string can be
changed while still maintaining the same output drive current.
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LM3448
30125888
FIGURE 18. COFF Current Source Circuits
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16
LM3448
Design Guide
30125801
FIGURE 19. Typical Non-Isolated Buck Converter with Valley-Fill PFC
The following design guide is an example of how to design
the LM3448 as a non-isolated buck converter with valley-fill
PFC as shown in Figure 19.
For simplicity, choose efficiency between 75% and 85%.
CALCULATING OFF-TIME
The “Off-Time” of the LM3448 is set by the user and remains
fairly constant as long as the voltage of the LED stack remains
constant. Calculating the off-time is the first step in determining the switching frequency (fSW) of the converter, which is
integral in determining some external component values.
PNP transistor Q3, resistor R4, and the LED string voltage
define a charging current into capacitor C11. A constant current into a capacitor creates a linear charging characteristic.
DETERMINING DUTY-CYCLE (D)
Duty cycle (D) approximately equals:
With efficiency considered:
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LM3448
Resistor R4, capacitor C11 and the current through resistor
R4 (iCOLL), which is approximately equal to VLED/R4, are all
fixed. Therefore, dv is fixed and linear, and dt (i.e. tOFF) can
now be calculated.
Worst case scenario for minimum on time is when VBUCK is at
its maximum voltage (AC high line) and the LED string voltage
(VLED) is at its minimum value.
The maximum voltage seen by the Buck Converter is:
Common equations for determining duty cycle and switching
frequency in any buck converter:
INDUCTOR SELECTION
The controlled off-time architecture of the LM3448 regulates
the average current through the inductor (L2), and therefore
the LED string current (see Figure 20). The input voltage to
the buck converter (VBUCK) changes with line variations and
over the course of each half-cycle of the input line voltage.
The voltage across the LED string is relatively constant, and
therefore the current through R4 is constant. This current sets
the off-time of the converter and therefore the output voltsecond product (VLED x off-time) remains constant. A constant
volt-second product makes it possible to keep the ripple
through the inductor constant as the voltage at VBUCK varies.
Therefore:
With efficiency of the buck converter in mind:
Substitute equations and rearrange:
Off-time and switching frequency can now be calculated using
the equations above.
SETTING THE SWITCHING FREQUENCY
Selecting the switching frequency for nominal operating conditions is based on tradeoffs between efficiency (better at low
frequency) and solution size/cost (smaller at high frequency).
The input voltage to the buck converter (VBUCK) changes with
both line variations and over the course of each half-cycle of
the input line voltage. The voltage across the LED string will,
however, remain constant and therefore the off-time remains
constant.
The on-time (tON) and therefore the switching frequency, will
vary as the VBUCK voltage changes with line voltage. A good
design practice is to choose a desired nominal switching frequency knowing that the switching frequency will decrease as
the line voltage drops and increase as the line voltage increases.
The off-time of the LM3448 can be programmed for switching
frequencies ranging from 30 kHz to over 1MHz. A trade-off
between efficiency and solution size must be considered
when designing the LM3448 application.
The maximum switching frequency attainable is limited only
by the minimum on-time requirement (200 ns).
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30125840
FIGURE 20. Simplified LM3448 Buck Converter
The equation for an ideal inductor is:
18
LM3448 constant off-time control loop regulates the peak inductor current (IL2-PK). Since the average inductor current
equals the average LED current (IAVE), LED current is controlled by regulating the peak inductor current.
Since the voltage across the SW FET (VDS) is relatively small
as is the voltage across sense resistor R3, we can simplify
this as approximately,
During the off-time, the voltage seen by the inductor is approximately,
30125825
FIGURE 21. Inductor Current Waveform in CCM
The value of VL(OFF-TIME) will be relatively constant, because
the LED stack voltage will remain constant. If we rewrite the
equation for an inductor inserting what we know about the
circuit during the off-time, we get,
Knowing the desired average LED current (IAVE) and the nominal inductor current ripple (ΔiL), the peak current for an application running in CCM is defined as follows:
Or, the maximum (i.e. un-dimmed) LED current would then
be,
Re-arranging this gives,
This is important to calculate because this peak current multiplied by the sense resistor R3 will determine when the
internal comparator is tripped. The internal comparator turns
the SW FET off once the peak sensed voltage reaches 750
mV.
From this we can see that the ripple current (Δi) is proportional
to off-time (tOFF) multiplied by a voltage which is dominated
by VLED divided by a constant inductance (L2).
These equations can be rearranged to calculate the desired
value for inductor L2.
CURRENT LIMIT
Under normal circumstances, the trip voltage on the PWM
comparator would be less than or equal to 750 mV depending
on the amount of dimming. However if there is a short circuit
or an excessive load on the output, higher than normal switch
currents will cause a voltage above 1.27V on the ISNS pin
which will trip the I-LIM comparator. The I-LIM comparator will
reset the RS latch, turning off the internal SW FET. It will also
inhibit the Start Pulse Generator and the COFF comparator
by holding the COFF pin low. A delay circuit will prevent the
start of another cycle for 180µs.
where,
and finally,
VALLEY FILL CAPACITORS
The maximum voltage seen by the valley-fill capacitors is,
Refer to “Design Example” section of the datasheet to better
understand the design process.
SETTING THE LED CURRENT
Figure 21 shows the inductor current waveform (IL2) when
operating in continuous conduction mode (CCM). The
This assumes that the capacitors chosen have identical capacitance values and split the line voltage equally. Often a
20% difference in capacitance could be observed between
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LM3448
Given a fixed inductor value, L, this equation states that the
change in the inductor current over time is proportional to the
voltage applied across the inductor.
During the on-time, the voltage applied across the inductor is,
LM3448
like capacitors. Therefore a voltage rating margin of 25% to
50% should be considered.
The valley-fill capacitors should be sized to supply energy to
the buck converter (VBUCK) when the input line is less than its
peak divided by the number of stages used in the valley-fill.
The capacitance value should be calculated when the TRIAC
is not firing (i.e. when full LED current is being drawn by the
LED string). The maximum power is delivered to the LED
string at this time and therefore the most capacitance will be
needed.
converter will be before the maximum number of series LEDs
allowed can be determined. Two variables will have to be determined in order to accomplish this.
1. AC line operating voltage. This is usually 90VAC to
135VAC for North America. Although the LM3448 can
operate at much lower and higher input voltages a range
is needed to illustrate the design process.
2. Number of stages being implemented in the valley-fill
circuit.
In this example a two-stage valley-fill circuit will be used.
Figure 23 shows three TRIAC dimmed waveforms. One can
easily see that the peak voltage (VPEAK) from 0° to 90° will
always be,
Once the TRIAC is firing at an angle greater than 90° the peak
voltage will lower and be equal to,
The voltage at VBUCK with a valley-fill stage of two will look
similar to the waveforms of Figure 24. The purpose of the
valley-fill circuit is to allow the buck converter to pull power
directly off of the AC line when the line voltage is greater than
its peak voltage divided by two (for a two stage valley-fill circuit). During this time, the capacitors within the valley-fill
circuit (C7 and C9) are charged up to the peak of the AC line
voltage. Once the line drops below its peak divided by two,
the two capacitors are placed in parallel and deliver power to
the buck converter. One can now see that if the peak of the
AC line voltage is lowered due to variations in the line voltage,
or if the TRIAC is firing at an angle above 90°, the DC offset
(VDC) will lower. VDC is the lowest value that voltage VBUCK
will encounter.
30125852
FIGURE 22. Two Stage Valley-Fill VBUCK Voltage with no
TRIAC Dimming
From Figure 22 and the equation for current in a capacitor,
the amount of capacitance needed at VBUCK can be calculated
using the following method.
At 60Hz and a valley-fill circuit of two stages, the hold-up time
(tX) required at VBUCK is calculated as follows. The total angle
of an AC half cycle is 180° and the total time of a half AC line
cycle is 8.33ms. When the angle of the AC waveform is at 30°
and 150°, the voltage of the AC line is exactly ½ of its peak.
With a two stage valley-fill circuit, this is the point where the
LED string switches from power being derived from AC line
to power being derived from the hold-up capacitors (C7 and
C9). At 60° out of 180° of the cycle or 1/3 of the cycle, the
power is derived from the hold-up capacitors (1/3 x 8.33 ms
= 2.78 ms). This is equal to the hold-up time (dt) from the
above equation, and dv is the amount of voltage the circuit is
allowed to droop. From the next section (“Determining Maximum Number of Series Connected LEDs Allowed”) we know
the minimum VBUCK voltage will be about 45V for a 90VAC to
135VAC line. At a 90VAC low line operating condition input,
½ of the peak voltage is 64V. Therefore with some margin the
voltage at VBUCK cannot droop more than about 15V (dv). (i)
is equal to (POUT/ VBUCK), where POUT is equal to (VLED x
ILED). Total capacitance (C7 in parallel with C9) can now be
calculated. See “ Design Example" section for further calculations of the valley-fill capacitors.
Example:
Line voltage = 90VAC to 135VAC
Valley-fill stages = 2
Depending on what type and value of capacitors are used,
some derating should be used for voltage droop when the
capacitors are delivering power to the buck converter. When
the TRIAC is firing at 135° the current through the LED string
will be small. Therefore the droop should be small at this point
and a 5% voltage droop should be a sufficient derating. With
this derating, the lowest voltage the buck converter will see is
about 42.5V in this example.
To determine how many LEDs can be driven, take the minimum voltage the buck converter will see (42.5V) and divide it
by the worst case forward voltage drop of a single LED.
Example:
42.5V/3.7V = 11.5 LEDs (11 LEDs with margin)
MAXIMUM NUMBER OF SERIES CONNECTED LEDS
A buck converter topology requires that the input voltage
(VBUCK) of the output circuit must be greater than the voltage
of the LED stack (VLED) for proper regulation. One must determine what the minimum voltage observed by the buck
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LM3448
30125855
FIGURE 23. VBUCK Waveforms with Various TRIAC Firing Angles
30125856
FIGURE 24. Two Stage Valley-Fill VBUCK Waveforms with Various TRIAC Firing Angles
OUTPUT CAPACITOR
A capacitor placed in parallel with the LED or array of LEDs
can be used to reduce the LED current ripple while keeping
the same average current through both the inductor and the
LED array. With a buck topology the output inductance (L2)
can now be lowered, making the magnetics smaller and less
expensive. With a well designed converter, you can assume
that all of the ripple will be seen by the capacitor and not the
LEDs. One must ensure that the capacitor you choose can
handle the RMS current of the inductor. Refer to
manufacture’s datasheets to ensure compliance. Usually an
X5R or X7R capacitor between 1µF and 10µF of the proper
voltage rating will be sufficient.
seen at VBUCK. For a common 110VAC ± 20% line, the reverse voltage could be as high as 190V.
The current rating must be at least,
or,
RE-CIRCULATING DIODE
The LM3448 Buck converter requires a re-circulating diode
D10 to carry the inductor current during the off-time of the
internal SW FET. The most efficient choice for D10 is a diode
with a low forward drop and near-zero reverse recovery time
that can withstand a reverse voltage of the maximum voltage
Another consideration when choosing a diode is to make sure
that the diode’s reverse recovery time is much greater than
the leading edge blanking time for proper operation.
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LM3448
tON(MIN) > 200ns,
Design Calculation Example
The following design example illustrates the process of actually calculating external component values for a LM3448 nonisolated buck converter with valley-fill PFC according to the
following specifications.
SPECIFICATIONS:
1. Input voltage range (90VAC – 135VAC)
2. Nominal input voltage = 115VAC
3. Number of LEDs in series = 7
4. Forward voltage drop of a single LED = 3.6V
5. LED stack voltage = (7 x 3.6V) = 25.2V
CHOSEN VALUES:
1. Target nominal switching frequency, fSW = 250kHz
2. ILED(AVE) = 400mA
3. POUT = (25.2V) x (400mA) = 10.1W
4. Ripple current Δi (usually 15% - 30% of ILED(AVE)) = (0.30
x 400mA) = 120mA
5. Valley fill stages = 2
6. Assumed minimum efficiency = 80%
5.
6.
Calculate C11 and R4:
Choose current through R4 (between 50µA and 100µA):
70µA
Calculate R4,
7.
8.
9.
Choose a standard value of 365kΩ
Calculate C11,
10. Choose standard value of 120pF.
11. Calculate inductor value at tOFF = 3µs,
CALCULATIONS:
1. Calculate minimum voltage VBUCK equals:
2.
Calculate maximum voltage VBUCK voltage,
3.
Calculate tOFF at VBUCK nominal line voltage,
12. Choose C10 = 1.0µF, 200V.
13. Calculate valley-fill capacitor values,
VAC low line = 90VAC, VBUCK minimum equals 45V (no
TRIAC dimming at maximum LED current). Set droop for
20V maximum at full load and low line.
Since "i" equals POUT/VBUCK = 224mA, "dV" equals 20V,
"dt" equals 2.78ms, and then CTOTAL equals 31µF.
Therefore choose C7 = C9 = 15µF.
4.
Calculate tON(MIN) at high line to ensure that
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22
LM3448
Applications Information
DESIGN #1: 7W, 120VAC Non-isolated Buck LED Driver with Valley-Fill PFC
SPECIFICATIONS:
• AC Input Voltage: 120VAC nominal (85VAC – 135VAC)
• Output Voltage: 21.1VDC
• LED Output Current: 342mA
This TRIAC dimmer compatible design incorporates the following features:
•
•
•
•
Passive valley-fill PFC for improved power factor performance,
Comprehensive TRIAC holding current coverage,
Standard VCC start-up and bias circuit,
Constant-off time control with LED voltage drift compensation.
23
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LM3448
30125877
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24
Part ID
Description
Manufacturer
Part Number
U1
IC LED Driver
National Semiconductor
LM3448MA
BR1
Bridge Rectifier Vr = 400V, Io = 0.8A, Vf = 1V
Diodes Inc.
HD04-T
C2
Ceramic, 0.01uF, X7R, 25V, 10%
MuRata
GRM188R71E103KA01D
C3
Ceramic, 1000pF 500V X7R 1206
Kemet
C1206C102KCRACTU
C12
.01uF
KEMIT
C1808C103KDRACTU
C6, C10
CAP 33uF 100V ELECT NHG RADIAL
Panasonic-ECG
ECA-2AHG330
C7
22uF, Ceramic, X5R, 25V, 10%
MuRata
GRM32ER61E226KE15L
C8
DNP
-
-
C9
4.7uF
C11
DNP
-
C3216X7R1E475K
-
C13
Ceramic, 1.0uF 100V X7R 1206
Murata
GRM31CR72A105KA01
C14
Ceramic, X7R, 16V, 10%
MuRata
GRM188R71C474KA88D
C15
Ceramic, 0.1uF, X7R, 16V, 10%
MuRata
GRM188R71C104KA01D
C16
Ceramic, 0.22uF, X7R, 16V, 10%
Murata
GRM188R71E224KA88D
C17
Ceramic, 330pF 100V C0G 0603
Murata
GCM1885C2A331JA16D
D1
DIODE ZENER 225MW 15V SOT23
ON Semiconductor
BZX84C15LT1G
D2, D3, D5, D6, D7
DIODE FAST REC 200V 1A
Rohm Semiconductor
RF071M2STR
D4
DIODE SWITCH SS DUAL 70V SOT323
Fairchild
BAV99WT1G
D8
DIODE SUPER FAST 200V 1A SMB
Diodes Inc
MURS120-13-F
F1
FUSE 1A 125V FAST
Cooper/Bussman
6125FA1A
L2
10mH, FERRITE CHIP POWER 160 OHM
Steward
HI1206T161R-10
MSS1260-105
L3
1mH, Shielded Drum Core,
Coilcraft Inc.
Q1
MOSFET N-CHAN 250V 4.4A DPAK
Fairchild
FDD6N25
Q2, Q3
TRANS NPN 350MW 40V SMD SOT23
Diodes Inc
MMBT4401-7-F
Q4
MOSFET P-CH 50V 130MA SOT-323
Diodes Inc
BSS84W-7-F
Q5
TRANS HIVOLT PNP AMP SOT-23
Fairchild
MMBTA92
Q6
MOSFET N-CHANNEL 100V SOT323
Diodes Inc
BSS123W-7-F
Q8
TRANS PNP LP 100MA 30V SOT23
ON Semiconductor
BC858CLT1G
R2
4.75M, 0805, 1%, 0.125W
Vishay-Dale
CRCW08054M75FKEA
R3
1%, 0.25W
Vishay-Dale
CRCW1206332kFKEA
R4
DNP
-
-
R5, R16
RES 49.9K OHM, 0.1W, 1% 0603
Vishay-Dale
CRCW060349k9FKEA
R6
RES 100K OHM, 0.25W1%, 1206
Vishay-Dale
CRCW1206100kFKEA
R7
RES 7.50K OHM, 0.1W, 1% 0603
Vishay-Dale
CRCW06037k50FKEA
R8
RES 10.0K OHM, 0.1W, 1% 0603
Vishay-Dale
CRCW060310k0FKEA
R9
RES 100 OHM, 0.25W1%, 1206
Vishay-Dale
CRCW1206100RFKEA
R10
RES 124 OHM, 0.25W1%, 1206
Vishay-Dale
CRCW1206124RFKEA
R11
RES 200K OHM, 0.125W, 1%, 0805
Vishay-Dale
CRCW0805200kFKEA
R12, R13
RES 1.0M OHM, 0.125W, 1%, 0805
Vishay-Dale
CRCW08051M00FKEA
R14
RES 576K OHM, 1/10W 1% 0603
Vishay-Dale
CRCW0603576kFKEA
R15
RES 280K OHM, 1/10W 1% 0603
Vishay-Dale
CRCW0603280kFKEA
R17
DNP
-
-
R18
RES 301 OHM, 0.25W1%, 1206
Vishay-Dale
CRCW1206301RFKEA
R19
RES 49.9 OHM, 0.125W, 1%, 0805
Vishay-Dale
CRCW080549R9FKEA
R21
RES 12.1 OHM, 0.25W1%, 1206
Vishay-Dale
CRCW120612R1FKEA
R22
RES 1.8 OHM 1/3W 5% 1210
Vishay-Dale
CRCW12101R80JNEA
R23
RES 499 OHM, 0.25W1%, 1206
Vishay-Dale
CRCW1206499RFKEA
RT1
CURRENT LIM INRUSH 60OHM 20%
Canterm
MF72-060D5
25
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LM3448
DESIGN #1 BILL OF MATERIALS
LM3448
DESIGN #2: 6.5W, 120VAC Non-isolated “A19 Edison” Retrofit with AC-Coupled Line Injection
SPECIFICATIONS:
•
•
•
AC Input Voltage: 120VAC nominal (85VAC – 135VAC)
Output Voltage: 35.7VDC
LED Output Current: 181mA
This TRIAC dimmer compatible design incorporates the following features:
•
•
•
AC coupled line-injection for improved power factor performance and LED current regulation,
Standard VCC start-up and bias circuit,
VCC derived COFF current source.
NOTE: Refer to LM3448 Application Note, AN-2127, for additional information and BOM regarding this design.
30125874
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LM3448
DESIGN #3: 6W, 120VAC Isolated Flyback LED Driver with Direct Line Injection
SPECIFICATIONS:
•
•
•
AC Input Voltage: 120VAC nominal (85VAC – 135VAC)
Flyback Output Voltage: 27.1VDC
LED Output Current: 228mA
This TRIAC dimmer compatible design incorporates the following features:
•
•
•
•
•
Direct line-injection for improved power factor performance,
Standard VCC start-up with auxiliary winding bias circuit for improved system efficiency,
Zener diode derived COFF current source for improved VCC ripple rejection,
Additional TRIAC holding current circuit for improved dimmer performance at low conduction angles,
Output overvoltage protection (OVP).
NOTE: Refer to LM3448 Application Note, AN-2090, for additional information and BOM regarding this design.
30125875
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LM3448
DESIGN #4: 6W, 230VAC Isolated Flyback LED Driver with Direct Line Injection
SPECIFICATIONS:
•
•
•
AC Input Voltage: 230VAC nominal (180VAC – 265VAC)
Flyback Output Voltage: 27.0VDC
LED Output Current: 226mA
This TRIAC dimmer compatible design incorporates the following features:
•
•
•
•
•
Direct line-injection for improved power factor performance
Standard VCC start-up with auxiliary winding bias circuit for improved system efficiency,
VCC derived COFF current source,
Additional TRIAC holding current circuit for improved dimmer performance at low conduction angles,
Output overvoltage protection (OVP).
NOTE: Refer to LM3448 Application Note, AN-2091, for additional information and BOM regarding this design.
30125876
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28
LM3448
Physical Dimensions inches (millimeters) unless otherwise noted
Narrow SOIC-16 Pin Package
For Ordering, Refer to Ordering Information Table
NS Package Number M16A
29
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LM3448 Phase Dimmable Offline LED Driver with Integrated FET
Notes
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Copyright © 2011, Texas Instruments Incorporated
LM3448
Application Note 2091 LM3448 - 230VAC, 6W Isolated Flyback LED Driver
Literature Number: SNOA555B
Texas Instruments
Application Note 2091
Steve Solanyk
November 8, 2011
Introduction
Key Features
This demonstration board highlights the performance of a
LM3448 based Flyback LED driver solution that can be used
to power a single LED string consisting of seven to eleven
series connected LEDs from a 180 VRMS to 265 VRMS, 50 Hz
input power supply.
This is a two-layer board using the bottom and top layer for
component placement. The demonstration board can be
modified to adjust the LED forward current, the number of series connected LEDs that are driven and the switching frequency.
Refer to the LM3448 datasheet for detailed instructions. A
schematic and layout have also been included along with
measured performance characteristics. A bill of materials is
also included that describes the parts used on this demonstration board.
•
•
Drop-in compatibility with TRIAC dimmers
Line injection circuitry enables PFC values greater than
0.90
Adjustable LED current and switching frequency
Flicker free operation
•
•
Applications
•
•
•
•
Retrofit TRIAC Dimming
Solid State Lighting
Industrial and Commercial Lighting
Residential Lighting
Performance Specifications
Based on an LED Vf = 3V
Symbol
Parameter
Min
Typ
Max
VIN
Input voltage
180 VRMS
230 VRMS
265 VRMS
VOUT
LED string voltage
21 V
27 V
33 V
ILED
LED string average current
-
226 mA
-
POUT
Output power
-
6.1 W
-
fsw
Switching frequency
-
73 kHz
-
Demo Board
LM3448 - 230VAC, 6W Isolated Flyback LED Driver
LM3448 - 230VAC, 6W
Isolated Flyback LED Driver
LED Current vs. Line Voltage (using TRIAC Dimmer)
LED CURRENT (mA)
250
200
150
100
50
0
30137968
40 60 80 100 120 140 160 180 200 220 240
INPUT VOLTAGE (VRMS)
30137991
AN-2091
© 2011 Texas Instruments Incorporated
301379
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TJ=25°C and VCC=12V, unless otherwise specified.
Efficiency vs. Line Voltage
86
1.00
82
80
11 LEDS
10 LEDs
9 LEDs
0.95
POWER FACTOR
EFFICIENCY (%)
Power Factor vs. Line Voltage
11 LEDs
10 LEDs
9 LEDs
84
0.90
0.85
78
76
0.80
170180190200210220230240250260270
INPUT VOLTAGE (VRMS)
170 180 190 200 210 220 230 240 250 260 270
INPUT VOLTAGE (VRMS)
30137988
30137989
LED Current vs. Line Voltage
400
350
Output Power vs. Line Voltage
10
11 LEDs
10 LEDs
9 LEDs
8
300
250
POUT (W)
LED CURRENT (mA)
AN-2091
Typical Performance Characteristics
200
150
100
11 LEDs
10 LEDs
9 LEDs
6
4
2
50
0
0
170 180 190 200 210 220 230 240 250 260 270
INPUT VOLTAGE VRMS
170 180 190 200 210 220 230 240 250 260 270
INPUT VOLTAGE (VRMS)
30137987
30137990
SW FET Drain Voltage Waveform
(VIN = 230VRMS, 9 LEDs, ILED = 226mA)
FLTR2 Waveform
(VIN = 230VRMS, 9 LEDs, ILED = 226mA)
30137998
30137996
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AN-2091
EMI Performance
230V, 6W Conducted EMI Scans
LINE – CISPR/FCC Class B Peak Scan
NEUTRAL – CISPR/FCC Class B Peak Scan
30137977
30137978
LINE – CISPR/FCC Class B Average Scan
NEUTRAL – CISPR/FCC Class B Average Scan
30137979
30137980
230V, 6W THD Measurements
EN-61000-3 Class C Limits
30137992
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AN-2091
Circuit Operation With Forward
Phase TRIAC Dimmer
The dimming operation of the circuit was verified using a forward phase TRIAC dimmer. Waveforms captured at different
dimmer settings are shown below:
30137935
Forward phase circuit at full brightness
30137936
Forward phase circuit at 90° firing angle
30137937
Forward phase circuit at 135° firing angle
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4
The board temperature was measured using an IR camera (HIS-3000, Wahl) while running under the following conditions: VIN =
230VRMS, ILED = 226mA, # of LEDs = 9, POUT = 6.12W.
NOTE: Thermal performance is highly dependent on the user's final end-application enclosure, heat-sinking methods, ambient
operating temperature, and PCB board layout in addition to the electrical operating conditions. This LM3448 evaluation board is
optimized to supply 6W of output power at room temperature without exceeding the thermal limitations of the LM3448. However
higher output power levels can be achieved if precautions are taken not to exceed the power dissipation limits of the LM3448
package or die junction temperature. Please see the LM3448 datasheet for additional details regarding its thermal specifications.
Top Side - Thermal Scan
• Cursor 1: 56.2°C
• Cursor 2: 55.1°C
• Cursor 3: 55.4°C
• Cursor 4: 54.8°C
• Cursor 5: 51.1°C
30137975
Bottom Side - Thermal Scan
• Cursor 1: 47.3°C
• Cursor 2: 55.4°C
• Cursor 3: 59.2°C
• Cursor 4: 59.8°C
• Cursor 5: 51.5°C
30137976
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AN-2091
Thermal Performance
AN-2091
LM3448 Device Pin-Out
30137902
Pin Description 16 Pin Narrow SOIC
Pin #
Name
1, 2, 15, 16
SW
Drain connection of internal 600V MOSFET.
3, 14
NC
No connect. Provides clearance between high voltage and low voltage pins. Do not tie to GND.
4
BLDR
Bleeder pin. Provides the input signal to the angle detect circuitry. A 230Ω internal resistor ensures BLDR is
pulled down for proper angle sense detection.
5, 12
GND
Circuit ground connection.
6
VCC
Input voltage pin. This pin provides the power for the internal control circuitry and gate driver. Connect a 22µF
(minimum) bypass capacitor to ground.
7
ASNS
PWM output of the TRIAC dim decoder circuit. Outputs a 0 to 4V PWM signal with a duty cycle proportional to
the TRIAC dimmer on-time.
8
FLTR1
First filter input. The 120Hz PWM signal from ASNS is filtered to a DC signal and compared to a 1 to 3V, 5.85
kHz ramp to generate a higher frequency PWM signal with a duty cycle proportional to the TRIAC dimmer firing
angle. Pull above 4.9V (typical) to TRI-STATE® DIM.
9
DIM
Input/output dual function dim pin. This pin can be driven with an external PWM signal to dim the LEDs. It may
also be used as an output signal and connected to the DIM pin of other LM3448/LM3445 devices or LED drivers
to dim multiple LED circuits simultaneously.
10
COFF
OFF time setting pin. A user set current and capacitor connected from the output to this pin sets the constant
OFF time of the switching controller.
11
FLTR2
Second filter input. A capacitor tied to this pin filters the PWM dimming signal to supply a DC voltage to control
the LED current. Could also be used as an analog dimming input.
13
ISNS
LED current sense pin (internally connected to MOSFET source). Connect a resistor from ISNS to GND to set
the maximum LED current.
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Description
6
AN-2091
Demo Board Wiring Overview
30137943
Wiring Connection Diagram
Test Point
Name
I/O
TP10
LED +
Output
LED Constant Current Supply
Supplies voltage and constant-current to anode of LED string.
TP9
LED -
Output
LED Return Connection (not GND)
Connects to cathode of LED string. Do NOT connect to GND.
J1-1, (or J5)
LINE
Input
AC Line Voltage
Connects directly to AC line or output of TRIAC dimmer of a 230VAC system.
J1-2, (or J6)
NEUTRAL
Input
AC Neutral
Connects directly to AC neutral of a 230VAC system.
Description
Demo Board Assembly
30137969
Top View
30137970
Bottom View
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AN-2091
Design Guide
30137901
FIGURE 1. Evaluation Board Schematic
The following section explains how to design an isolated flyback converter using the LM3448. Refer to the LM3448
datasheet for specific details regarding the function of the
LM3448 device. All reference designators refer to the Evaluation Board Schematic in Figure 1 unless otherwise noted.
turned into a constant power flyback converter operating in
discontinuous conduction mode (DCM).
DCM FLYBACK CONVERTER
This LED driver is designed to accurately emulate an incandescent light bulb and therefore behave as an emulated
resistor. The resistor value is determined based on the LED
string configuration and the desired output power. The circuit
then operates in open-loop, with a fixed duty cycle based on
a constant on-time and constant off-time that is set by selecting appropriate circuit components. Like an incandescent
lamp, the driver is compatible with both forward and reverse
phase dimmers. A key aspect of this design is that the converter operates in discontinuous conduction mode (DCM).
DCM is implemented by ensuring that the flyback transformer
current reaches zero before the end of the switching period.
By injecting a voltage proportional to the line voltage at the
FLTR2 pin (see Figure 2), the LM3448 circuit is essentially
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30137917
FIGURE 2. Direct Line-Injection Circuit
8
AN-2091
or,
Therefore a constant on-time (since inductor L is constant)
can be obtained.
By using the line voltage injection technique, the FLTR2 pin
has the voltage wave shape shown in Figure 3 on it with no
TRIAC dimmer in-line. Peak voltage at the FLTR2 pin should
be kept below 1.25V otherwise current limit will be tripped.
Capacitor C18 in conjunction with resistor R20 acts a filter for
noise. Using this technique a power factor greater than 0.90
can be achieved.Figure 4 shows how a constant on-time is
maintained.
30137918
FIGURE 3. FLTR2 Waveform with No Dimmer
The LM3448 normally works as a constant off-time regulator,
but by injecting a 1.0VPK rectified AC voltage into the FLTR2
pin, the on-time can be made to be constant. With a DCM
flyback converter the primary side current, iL(t), needs to increase as the rectified input voltage, V+(t), increases as
shown in the following equations,
30137916
FIGURE 4. Typical Operation of FLTR2 Pin
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AN-2091
Turns Ratio
The first step with an isolated design is to determine the
transformer turns ratio. This can be an iterative process that
will depend on the specified operating conditions, maximum
stresses allowed for the LM3448 SW FET and re-circulating
diode as well as transformer core parameters. For many
LM3448 flyback designs, an integer turns ratio of 4 or 5 is a
good starting point. The next step will be to verify that the
chosen turns ratio results in operating conditions that do not
violate any other component ratings.
Duty Cycle Calculation
The AC mains voltage at the line frequency fL is assumed to
be perfectly sinusoidal and the diode bridge ideal. This yields
a perfect rectified sinusoid at the input to the flyback. The peak
nominal input voltage VIN-PK(NOM)is defined in terms of the input voltage VIN(NOM),
Next the worst-case peak input current iIN-PK(MAX) is calculated. From Figure 5, the area of the triangle (highlighted with
the dashed oval) is the average input current. Therefore,
Duty cycle is calculated at the nominal peak input voltage
VIN-PK(NOM). Note that this is the duty cycle for flyback operation at the boundary of continuous conduction mode (CCM)
operation. In order to ensure that the converter is operating
in DCM, the primary inductance of the transformer will be adjusted lower (refer to "Transformer" section).
30137947
FIGURE 5. DCM Flyback Current Waveforms
Switching MOSFET (SW FET)
From its datasheet, the LM3448’s SW FET voltage breakdown rating VDS(MAX) is 600V. Due to a transformer’s inherent
leakage inductance, some ringing VRING on the drain of the
SW FET will be present and must also be taken into consideration when choosing a turns ratio. VRING will depend on the
design of the transformer. A good starting point is to design
for 50V of ringing while planning for 100V of ringing if additional margin is needed.
The maximum reflected voltage VREFL based on a turns ratio
of “n” at the primary also needs to be calculated,
Peak Input Current Calculation
Due to the direct line-injection, the flyback converter operates
as a constant power converter. Therefore average input power over one line cycle will approximately equal the output
power,
However since the input power has 120Hz ripple, the “peak”
input power PIN-PK will be equal to twice the output power,
The maximum SW FET drain-to-source voltage is then calculated based on the maximum reflected voltage VREFL, ringing on the SW FET drain and the maximum peak input voltage
VIN-PK(MAX),
Figure 5 illustrates the input current going into the primary
side winding of the flyback transformer over one-half of a rectified input voltage line cycle.
The worst-case average input current is calculated at the
minimum peak input voltage and targeted converter efficiency
η,
where,
and the following condition must be met,
where,
Peak and RMS SW FET currents are calculated along with
maximum SW FET power dissipation based on the SW FET
RDS-ON value,
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Current Limit
The peak current limit ILIM should be at least 25% higher than
the maximum peak input current,
The parallel sense resistor combination will need to dissipate
the maximum power,
Given the target operating frequency and the maximum output power, a core size can be chosen using the vendor’s
specifications and recommendations. This choice can then be
validated by calculating the maximum operating flux density
given the core cross-sectional area Ae of the chosen core,
Re-circulating Diode
The main re-circulating diode (D4) should be sized to block
the maximum reverse voltage VRD4(MAX), operate at the maximum average current ID4(MAX), and dissipate the maximum
power PD4(MAX) as determined by the following equations,
With most common core materials, the maximum operating
flux density should be set somewhere between 250mT and
300mT. If the calculation is below this range, then AL should
be increased to the next standard value and the turns and
maximum flux density calculations iterated. If the calculation
is above this range, then AL should be decreased to the next
standard value and the turns and maximum flux density calculations iterated. With the flux density appropriately set, the
core material for the chosen core size can be determined using the vendor’s specifications and recommendations. Note
that there are core materials that can tolerate higher flux densities; however, they are usually more expensive and not
practical for these designs. The rest of the transformer design
can be done with the aid of the manufacturer. There are calculated trade-offs between the different loss mechanisms and
safety constraints that determine how well a transformer performs. This is an iterative process and can ultimately result in
the choice of a new core or switching frequency range. The
previous steps should reduce the number of iterations significantly but a good transformer manufacturer is invaluable for
completion of the process.
Clamp
Figure 6 shows a large ringing (VRING) on the SW FET drain
due to the leakage inductance of the transformer and output
capacitance of SW FET.
TRANSFORMER
Primary Inductance
The maximum peak input current iIN-PK(MAX) occurring at the
minimum AC voltage peak VIN-PK(MIN) determines the worst
case scenario that the converter must be designed for in order
to stay in DCM. Using the equation for inductor voltage,
and rearranging with the previously calculated parameters,
provides an inductance LCRIT where the flyback converter will
operate at the boundary of CCM for a switching frequency
fSW. In order to ensure DCM operation, a general rule of thumb
is to pick a primary inductance LP at 85% of the LCRIT value.
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AN-2091
Transformer Geometries and Materials
The length of the gap necessary for energy storage in the
flyback transformer can be determined numerically; however,
this can lead to non-standard designs. Instead, an appropriate AL core value (a value somewhere between 65nH/turns2
and 160nH/turns2 is a good starting point) can be chosen that
will imply the gap size. AL is an industry standard used to define how much inductance, per turns squared, that a given
core can provide. With the initial chosen AL value, the number
of turns on the primary and secondary are calculated,
AN-2091
When the LM3448’s internal SW FET is on and the drain voltage is low, the blocking diode (D3) is reverse biased and the
clamp is inactive. When the SW FET is turned off, the drain
voltage rises past the nominal voltage (reflected voltage plus
the input voltage). If it reaches the TVS clamp voltage plus
the input voltage, the clamp prevents any further rise. The
TVS diode (D1) voltage is set to prevent the SW FET from
exceeding its maximum rating and should be greater than the
"output voltage x turns ratio" but less than the expected
amount of ringing,
30137913
FIGURE 6. Switch Node Ringing
This clamp method is fairly efficient and very simple compared to other commonly used methods. Note that if the
ringing is large enough that the clamp activates, the ringing
energy is radiated at higher frequencies. Depending on PCB
layout, EMI filtering method, and other application specific
items, the clamp can present problems with regards to meeting radiated EMI standards. If the TVS clamp becomes problematic, there are many other clamp options easily found in a
basic literature search.
A clamp circuit is necessary to prevent damage to SW FET
from excessive voltage. This evaluation board uses a transient voltage suppression (TVS) clamp D1, shown in Figure
7.
BIAS SUPPLIES & CAPACITANCES
The bias supply circuits shown in Figure 8 and Figure 9 enables instant turn-on through Q1 while providing an auxiliary
winding for high efficiency steady state operation. The two
bias paths are each connected to VCC through a diode (D7,
D9) to ensure the higher of the two is providing VCC current.
30137915
FIGURE 7. TVS Diode Clamp
30137993
FIGURE 8. Bias Supply Circuits
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12
30137994
FIGURE 9. Auxiliary Winding Bias Circuit
PassFET Bias Circuit
The passFET (Q1) is used in its linear region to stand-off the
line voltage from the LM3448 regulator. Both the VCC startup
current and discharging of the EMI filter capacitance for proper phase angle detection are handled by Q1. Therefore Q1
has to block the maximum peak input voltage and have both
sufficient surge and power handling capability with regards to
its safe operating area (SOA). The design equations are,
Output Capacitance
C12 should be a high quality electrolytic capacitor with a voltage rating greater than the specified over-voltage protection
threshold VOVP. Given the desired voltage ripple, the minimum output capacitance is calculated,
COFF CURRENT SOURCE
The current source used to establish the constant off-time is
shown in Figure 10.
Note that if additional TRIAC holding current is to be sourced
through Q1, then the transistor will need to be sized appropriately to handle the additional current and power dissipation
requirements.
Auxiliary Winding Bias Circuit
For high efficiency during steady-state operation, an additional winding is used to establish an auxiliary voltage VAUX
used to provide a VCC bias voltage. A minimum value of 13V
is recommended for VAUX. An auxiliary transformer turns ratio
nAUX and corresponding turns calculation is used to size the
primary auxiliary winding NA,
30137911
FIGURE 10. COFF Current Source Circuit
Capacitor C20 will be charged with current from the VCC supply through resistor R23. The COFF pin threshold will therefore be tripped based on the following capacitor equation,
The minimum primary bias supply capacitance (C14||C15),
given a minimum VCC ripple specification at twice the line frequency f2L, is calculated to keep VCC above UVLO at the
worst-case current,
where,
Solving for off-time tOFF results in,
Input Capacitance
The input capacitor of the flyback (C2) has to be able to provide energy during the worst-case switching period at the
13
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AN-2091
peak of the AC voltage input. C2 should be a high frequency,
high stability capacitor (usually a metallized film capacitor, either polypropylene or polyester) with an AC voltage rating
equal to the maximum input voltage. C2 should also have a
DC voltage rating exceeding the maximum peak input voltage
+ half of the peak to peak input voltage ripple specification.
The minimum required input capacitance is calculated given
the same ripple specification,
AN-2091
and we also know that the tOFF is calculated where Ts is the
switching period,
Re-arranging and substituting equations results in the following equation where COFF is typically chosen as value around
330pF,
30137912
TRIAC HOLDING CIRCUIT
An optional TRIAC holding current circuit is also provided on
the evaluation board as shown in Figure 11. The DIM pin signal is applied through an RC filter as a varying DC voltage to
Q4 such that the voltage on the FLTR2 pin is adjusted and
additional holding current can be sinked.
FIGURE 12. OVP Circuit
The OVP threshold is programmable and is set by selecting
appropriate value of zener diode D11. The capacitor C11
across the base of transistor Q3 is used to filter the voltage
ripple present on the auxiliary voltage and prevent false OVP
tripping due to voltage spikes caused by leakage inductance.
The circuit operation is simple and based on biasing of transistor Q3 during fault conditions such that it pulls down the
voltage on the FLTR2 pin to ground. The bias current depends
on how much overdrive voltage is generated above the zener
diode threshold. For proper circuit operation, it is recommended to design for 4V overdrive in order to adequately bias the
transistor. Therefore the zener diode should be selected
based on the expression,
where, VZ is the zener diode threshold, NA and NS are the
number of transformer auxiliary and secondary turns respectively, and VOVP is the maximum specified output voltage.
30137984
FIGURE 11. TRIAC Holding Circuit
INPUT FILTER
Background
Since the LM3448 is used for AC to DC systems, electromagnetic interference (EMI) filtering is critical to pass the
necessary standards for both conducted and radiated EMI.
This filter will vary depending on the output power, the switching frequencies, and the layout of the PCB. There are two
major components to EMI: differential noise and commonmode noise. Differential noise is typically represented in the
EMI spectrum below approximately 500kHz while commonmode noise shows up at higher frequencies.
OVERVOLTAGE PROTECTION
The circuit described in Figure 12 provides over-voltage protection (OVP) in case of LED open circuit failure. The use of
this circuit is recommended for stand-alone LED driver designs where it is essential to recover from a momentary open
circuit without damaging any part of the circuit. In the case of
an integrated LED lamp (where the LED load is permanently
connected to the driver output) a simple zener diode or TVS
based overvoltage protection is suggested as a cost effective
solution. The zener diode/TVS offers protection against a single open circuit event and prevents the output voltage from
exceeding the regulatory limits. Depending on the LED driver
design specifications, either one or both techniques can be
used to meet the target regulatory agency approval
www.ti.com
14
AN-2091
30137967
FIGURE 13. Input EMI Filter
and the TRIAC to limit the effect of this current on the converter and to provide some of the necessary holding current
at the same time. This will degrade efficiency but some inrush
protection is always necessary in any AC system due to startup. The size of R5 and R9 are best found experimentally as
they provide attenuation for the whole system.
Conducted
Figure 13 shows a typical filter used with this LM3448 flyback
design. In order to conform to conducted standards, a fourth
order filter is implemented using inductors and "X" rated AC
capacitors. If sized properly, this filter design can provide ample attenuation of the switching frequency and lower order
harmonics contributing to differential noise. A "Y" rated AC
capacitor (C1) from the primary ground to the secondary
ground is also critical for reduction of common-mode noise
(refer to "Evaluation Board Schematic". This combination of
filters along with any necessary damping can easily provide
a passing conducted EMI signature.
Radiated
Conforming to radiated EMI standards is much more difficult
and is completely dependent on the entire system including
the enclosure. C1 will also help reduce radiated EMI; however, reduction of dV/dt on switching edges and PCB layout
iterations are frequently necessary as well. Consult available
literature and/or an EMI specialist for help with this. Several
iterations of component selection and layout changes may be
necessary before passing a specific radiated EMI standard.
Interaction with Dimmers
In general input filters and forward phase dimmers do not
work well together. The TRIAC needs a minimum amount of
holding current to function. The converter itself is demanding
a certain amount of current from the input to provide to its
output, and the input filter is providing or taking current depending upon the dV/dt of the capacitors. The best way to
deal with this problem is to minimize filter capacitance and
increase the regulated hold current until there is enough current to satisfy the dimmer and filter simultaneously.
30137946
FIGURE 14. Inrush Current Spike
Damper
The inrush spike can also excite a resonance between the
input filter of the TRIAC and the input filter of the converter.
The associated interaction can cause the current to ring negative, as shown in Figure 14, thereby shutting off the TRIAC.
A TRIAC damper can be placed between the dimmer and the
EMI filter to absorb some of the ringing energy and reduce the
potential for misfires. The damper is also best sized experimentally due to the large variance in TRIAC input filters.
Resistors R5 and R9 can also be increased to help dampen
the ringing at the expense of some efficiency and power factor
performance.
INRUSH LIMITING AND DAMPING
Inrush
With a forward phase dimmer, a very steep rising edge causes a large inrush current every cycle as shown in Figure 14.
Series resistance (R5, R9) can be placed between the filter
15
www.ti.com
AN-2091
Design Calculations
The following is a step-by-step procedure with calculations for
a 230V, 6.5W flyback design.
SW FET
Maximum reflected voltage:
SPECIFICATIONS
fL = 50Hz
fSW(MIN) =72kHz
VIN(NOM) = 230VAC
VIN(MIN) = 180VAC
VIN(MAX) = 265VAC
ILED = 245mA
Maximum drain-to-source voltage:
ΔvOUT = 1V
ΔvIN-PK = 35V
SW FET VDS(MAX) = 600V
SW FET RDS-ON = 3.5Ω
Vf(D4) = 0.8V
VRING = 50V
POUT(MAX) = 6.5W
VOUT = 26.5V
VOVP = 47V
VAUX = 13V
Maximum peak MosFET current:
Maximum RMS MosFET current:
η = 85%
n=5
AL = 90nH/turns2
Ae = 19.49mm2
VCC = 12V
VZ(D5)=12V
R11=49.9kΩ
VGS(Q1)=0.7V
Maximum power dissipation:
CURRENT SENSE
Current Limit:
PRELIMINARY CALCULATIONS
Nominal peak input voltage:
Sense resistor:
Maximum peak input voltage:
Power dissipation:
Minimum peak input voltage:
Resulting component choice:
Maximum average input current:
RE-CIRCULATING DIODE
Maximum reverse blocking voltage:
Duty cycle:
Maximum peak diode current:
Maximum peak input current:
Maximum average diode current:
www.ti.com
16
AN-2091
Choose capacitor C20: 330pF
Calculate R23,
Maximum power dissipation:
Resulting component choice:
PassFET
Calculate maximum peak voltage:
TRANSFORMER
Calculated primary inductance:
Calculate current:
Chosen primary inductance:
Calculate power dissipation:
Number of primary turns:
Resulting component choice:
INPUT CAPACITANCE
Minimum capacitance:
Chosen primary turns: 154 turns
Number of secondary turns:
Number of auxiliary turns:
AC Voltage rating:
DC Voltage rating:
Maximum flux density:
Resulting component choice:
Resulting component choice:
OUTPUT CAPACITANCE
Minimum capacitance:
Voltage rating:
COFF CURRENT SOURCE
Calculate off-time,
Resulting component choice:
17
www.ti.com
AN-2091
TRANSIL CLAMP
TVS clamp voltage:
OVERVOLTAGE PROTECTION ZENER DIODE
Calculate Zener diode:
Resulting component choice:
Resulting component choice:
www.ti.com
18
AN-2091
Evaluation Board Schematic
30137901
Warning: The LM3448 evaluation board has exposed high voltage components that present a shock hazard. Caution must be taken when handling the evaluation
board. Avoid touching the evaluation board and removing any cables while the evaluation board is operating. Isolating the evaluation board rather
than the oscilloscope is highly recommended.
Warning: The ground connection on the evaluation board is NOT referenced to earth ground. If an oscilloscope ground lead is connected to the evaluation
board ground test point for analysis and AC power is applied, the fuse (F1) will fail open. The oscilloscope should be powered via an isolation
transformer before an oscilloscope ground lead is connected to the evaluation board.
Warning: The LM3448 evaluation board should not be powered with an open load. For proper operation, ensure that the desired number of LEDs are connected
at the output before applying power to the evaluation board.
19
www.ti.com
AN-2091
Bill of Materials
Part ID
Description
Manufacturer
Part Number
C1
Ceramic, X7R, 250VAC, 10%
Murata Electronics North America
DE1E3KX332MA5BA01
C2
Polypropylene Film Capacitors 400V .
033uF 5% PCM 10
WIMA
MKP1G023303F00JSSD
C3
CAP, CERM, 330pF, 630V, +/-5%, C0G/
NP0, 1206
TDK
C3216C0G2J331J
C4
CAP FILM MKP .0047UF 310VAC X2
Vishay/BC comp
BFC233820472
C5
CAP, Film, 0.033µF, 630V, +/-10%, TH
EPCOS Inc
B32921C3333K
C6, C7
CAP CER 68000PF 630V X7R 1210
TDK
C3225X7R2J683M
C8
DNP
-
-
C9
DNP
-
-
C10
DNP
-
-
C11, C13
CAP, CERM, 1uF, 35V, +/-10%, X7R,
0805
Taiyo Yuden
GMK212B7105KG-T
C12
CAP ALUM 680UF 50V 20% RADIAL
Nichicon
UPW1H681MHD6
C14
CAP, CERM, 0.1µF, 25V, +/-10%, X7R,
0603
MuRata
GRM188R71E104KA01D
C15
CAP, CERM, 22uF, 25V, +/-10%, X5R,
1210
MuRata
GRM32ER61E226KE15L
C16
CAP, CERM, 0.47µF, 16V, +/-10%, X7R,
0603
MuRata
GRM188R71C474KA88D
C17
CAP, CERM, 0.22µF, 16V, +/-10%, X7R,
0603
TDK
C1608X7R1C224K
C18
CAP, CERM, 2200pF, 50V, +/-10%, X7R,
0603
MuRata
GRM188R71H222KA01D
C20
CAP, CERM, 330pF, 50V, +/-5%, C0G/
NP0, 0603
MuRata
GRM1885C1H331JA01D
D1
Diode, TVS, 250V, 600W, UNI, 5%, SMB
Littelfuse Inc
P6SMB250A
D2
Diode, Switching-Bridge, 600V, 0.8A,
MiniDIP
Diodes Inc.
HD06-T
D3
Diode, Silicon, 1000V, 1A, SOD-123
Comchip Technology
CGRM4007-G
D4
Diode, Schottky, 100V, 1A, SMA
STMicroelectronics
STPS1H100A
D5, D10
Diode, Zener, 13V, 200mW, SOD-323
Diodes Inc
DDZ13BS-7
D6
Diode, Zener, 47V, 550mW, SMB
ON Semiconductor
1SMB5941BT3G
STMicroelectronics
BAT46JFILM
DDZ9704-7
D7, D8, D9 Diode, Schottky, 100V, 150 mA, SOD-323
D11
DIODE ZENER 17V 500MW SOD-123
Diodes Inc.
F1
Fuse, 500mA, 250V, Time-Lag, SMT
Littelfuse Inc
RST 500
L1, L2
Inductor, Shielded, 4.7mH, 130mA, 7.5mm
Radial
TDK Corporation
TSL0808RA-472JR17-PF
Q1
MOSFET, N-CH, 600V, 200mA, SOT-223
Fairchild Semiconductor
FQT1N60CTF_WS
Q2
TRANSISTOR NPN 300V SOT23
Diodes Inc.
MMBTA42-7-F
Q3
TRANS GP SS NPN 40V SOT323
ON Semi
MMBT3904WT1G
Q4
MOSFET, N-CH, 60V, 0.24A, SOT-23
Vishay-Siliconix
2N7002E-T1-E3
R1
RES, 221 ohm, 1%, 0.25W, 1206
Vishay-Dale
CRCW1206221RFKEA
R2, R7
RES, 200k ohm, 1%, 0.25W, 1206
Vishay-Dale
CRCW1206200KFKEA
R3, R8
RES, 309k ohm, 1%, 0.25W, 1206
Vishay-Dale
CRCW1206309KFKEA
R4, R12
RES, 10k ohm, 5%, 0.25W, 1206
Vishay-Dale
CRCW120610K0JNEA
R5, R9
RES, 22 ohm, 10%, 2W, Axial, Fusible
WELWYN
EMC2-22RK
R6
RES, 820 ohm, 5%, 1W, 2512
Vishay/Dale
CRCW2512820RJNEG
R10
DNP
-
-
R11
RES, 49.9k ohm, 1%, 0.125W, 0805
Vishay-Dale
CRCW080549K9FKEA
www.ti.com
20
RES, 33 ohm, 5%, 0.25W, 1206
Vishay-Dale
R14
RES, 75 ohm, 5%, 0.125W, 0805
Vishay-Dale
CRCW080575R0JNEA
R15
RES, 10.0k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW060310K0FKEA
R16
RES, 280k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW0603280KFKEA
R17
RES, 475k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW0603475KFKEA
R18
RES, 49.9k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW060349K9FKEA
R20
RES, 1.91k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW06031K91FKEA
R21
RES 3.60 OHM 1/4W 1% 1206 SMD
Vishay/Dale
CRCW12063R60FKEA
R22
RES, 21.0 ohm, 1%, 0.125W, 0805
Vishay-Dale
CRCW080521R0FKEA
R23
RES, 294k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW0603294KFKEA
T1
Transformer
Wurth Electronics Midcom
750815045 Rev 00
U1
LED Driver
NATIONAL SEMI
LM3448
VR1
Varistor 275V 55J 10mm DISC
EPCOS Inc
S10K275E2
21
AN-2091
R13
CRCW120633R0JNEA
www.ti.com
AN-2091
Transformer Design
Mfg: Wurth Electronics Midcom, Part #: 750815045 Rev.00
30137999
www.ti.com
22
NOTE: Spacing between traces and components of this evaluation board are based on high voltage recommendations for designs
that will be potted. Users are cautioned to satisfy themselves as to the suitability of this design for the intended end application
and take any necessary precautions where high voltage layout and spacing rules must be followed.
30137909
Top Layer
30137910
Bottom Layer
23
www.ti.com
AN-2091
PCB Layout
LM3448 - 230VAC, 6W Isolated Flyback LED Driver
Notes
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Copyright © 2011, Texas Instruments Incorporated
LM3448
Application Note 2090 LM3448 -120VAC, 6W Isolated Flyback LED Driver
Literature Number: SNOA554B
Texas Instruments
Application Note 2090
Steve Solanyk
November 8, 2011
Introduction
Key Features
This demonstration board highlights the performance of a
LM3448 based Flyback LED driver solution that can be used
to power a single LED string consisting of seven to eleven
series connected LEDs from a 85 VRMS to 135 VRMS, 60 Hz
input power supply.
This is a two-layer board using the bottom and top layer for
component placement. The demonstration board can be
modified to adjust the LED forward current, the number of series connected LEDs that are driven and the switching frequency.
Refer to the LM3448 datasheet for detailed instructions. A
schematic and layout have also been included along with
measured performance characteristics. A bill of materials is
also included that describes the parts used on this demonstration board.
•
•
Drop-in compatibility with TRIAC dimmers
Line injection circuitry enables PFC values greater than
0.95
Adjustable LED current and switching frequency
Flicker free operation
•
•
Applications
•
•
•
•
Retrofit TRIAC Dimming
Solid State Lighting
Industrial and Commercial Lighting
Residential Lighting
Performance Specifications
Based on an LED Vf = 3V
Symbol
Parameter
Min
Typ
Max
VIN
Input voltage
85 VRMS
120 VRMS
135 VRMS
VOUT
LED string voltage
21 V
27 V
33 V
ILED
LED string average current
-
228 mA
-
POUT
Output power
-
6.2 W
-
fsw
Switching frequency
-
73 kHz
-
LM3448 - 120VAC, 6W Isolated Flyback LED Driver
LM3448 -120VAC, 6W
Isolated Flyback LED Driver
LED Current vs. Line Voltage (using TRIAC Dimmer)
Demo Board
LED CURRENT (mA)
250
200
150
100
50
0
20
30137868
40
60
80
100
INPUT VOLTAGE (VRMS)
120
30137891
AN-2090
© 2011 Texas Instruments Incorporated
301378
www.ti.com
TJ=25°C and VCC=12V, unless otherwise specified.
NOTE: Plots of 10 LED performance based on original schematic except that D1 is a 250V TVS and the OVP circuit has been
removed.
Power Factor vs. Line Voltage
Efficiency vs. Line Voltage
86
0.97
POWER FACTOR
EFFICIENCY (%)
0.98
10 LEDs
9 LEDs
8 LEDs
7 LEDs
84
82
80
10 LEDs
9 LEDs
8 LEDs
7 LEDs
0.96
0.95
78
0.94
76
80
90
100 110 120 130
INPUT VOLTAGE (VRMS)
0.93
80
140
90
100 110 120 130
INPUT VOLTAGE (VRMS)
30137888
400
350
300
Output Power vs. Line Voltage
10
10 LEDs
9 LEDs
8 LEDs
7 LEDs
10 LEDs
9 LEDs
8 LEDs
7 LEDs
8
POUT (W)
250
200
150
100
6
4
2
50
0
0
80
90
100 110 120 130
INPUT VOLTAGE (VRMS)
140
80
90
100 110 120 130
INPUT VOLTAGE (VRMS)
30137887
www.ti.com
140
30137889
LED Current vs. Line Voltage
LED CURRENT (mA)
AN-2090
Typical Performance Characteristics
140
30137890
SW FET Drain Voltage Waveform
(VIN = 120VRMS, 9 LEDs, ILED = 228mA)
FLTR2 Waveform
(VIN = 120VRMS, 9 LEDs, ILED = 228mA)
30137896
30137898
2
AN-2090
EMI Performance
120V, 6W Conducted EMI Scans
LINE – CISPR/FCC Class B Peak Scan
NEUTRAL – CISPR/FCC Class B Peak Scan
30137877
30137878
LINE – CISPR/FCC Class B Average Scan
NEUTRAL – CISPR/FCC Class B Average Scan
30137879
30137880
120V, 6W THD Measurements
EN-61000-3 Class C Limits
Harmonic Current as Percentage of
Fundamental
30%
25%
Measured
Limits
20%
15%
10%
5%
0%
2
3
5
7
9 11 13 15 17 19 21 23 25 27 29 31
Harmonic Order
30137892
3
www.ti.com
AN-2090
Circuit Operation With Forward
Phase TRIAC Dimmer
Circuit Operation With Reverse
Phase TRIAC Dimmer
The dimming operation of the circuit was verified using a forward phase TRIAC dimmer. Waveforms captured at different
dimmer settings are shown below:
The circuit operation was also verified using a reverse phase
dimmer and waveforms captured at different dimmer settings
are shown below:
30137835
30137838
Forward phase circuit at full brightness
Reverse phase circuit at full brightness
30137836
30137839
Forward phase circuit at 90° firing angle
Reverse phase circuit at 90° firing angle
30137837
30137840
Forward phase circuit at 150° firing angle
www.ti.com
Reverse phase circuit at 150° firing angle
4
The board temperature was measured using an IR camera (HIS-3000, Wahl) while running under the following conditions: VIN =
120VRMS, ILED = 228mA, # of LEDs = 9, POUT = 6.2W.
NOTE: Thermal performance is highly dependent on the user's final end-application enclosure, heat-sinking methods, ambient
operating temperature, and PCB board layout in addition to the electrical operating conditions. This LM3448 evaluation board is
optimized to supply 6W of output power at room temperature without exceeding the thermal limitations of the LM3448. However
higher output power levels can be achieved if precautions are taken not to exceed the power dissipation limits of the LM3448
package or die junction temperature. Please see the LM3448 datasheet for additional details regarding its thermal specifications.
Top Side - Thermal Scan
• Cursor 1: 61.5°C
• Cursor 2: 56.2°C
• Cursor 3: 57.7°C
• Cursor 4: 53.8°C
• Cursor 5: 52.9°C
30137875
Bottom Side - Thermal Scan
• Cursor 1: 62.3°C
• Cursor 2: 58.8°C
• Cursor 3: 53.4°C
30137876
5
www.ti.com
AN-2090
Thermal Performance
AN-2090
LM3448 Device Pin-Out
30137802
Pin Description 16 Pin Narrow SOIC
Pin #
Name
1, 2, 15, 16
SW
Drain connection of internal 600V MOSFET.
3, 14
NC
No connect. Provides clearance between high voltage and low voltage pins. Do not tie to GND.
4
BLDR
Bleeder pin. Provides the input signal to the angle detect circuitry. A 230Ω internal resistor ensures BLDR is
pulled down for proper angle sense detection.
5, 12
GND
Circuit ground connection.
6
VCC
Input voltage pin. This pin provides the power for the internal control circuitry and gate driver. Connect a 22µF
(minimum) bypass capacitor to ground.
7
ASNS
PWM output of the TRIAC dim decoder circuit. Outputs a 0 to 4V PWM signal with a duty cycle proportional to
the TRIAC dimmer on-time.
8
FLTR1
First filter input. The 120Hz PWM signal from ASNS is filtered to a DC signal and compared to a 1 to 3V, 5.85
kHz ramp to generate a higher frequency PWM signal with a duty cycle proportional to the TRIAC dimmer firing
angle. Pull above 4.9V (typical) to TRI-STATE® DIM.
9
DIM
Input/output dual function dim pin. This pin can be driven with an external PWM signal to dim the LEDs. It may
also be used as an output signal and connected to the DIM pin of other LM3448/LM3445 devices or LED drivers
to dim multiple LED circuits simultaneously.
10
COFF
OFF time setting pin. A user set current and capacitor connected from the output to this pin sets the constant
OFF time of the switching controller.
11
FLTR2
Second filter input. A capacitor tied to this pin filters the PWM dimming signal to supply a DC voltage to control
the LED current. Could also be used as an analog dimming input.
13
ISNS
LED current sense pin (internally connected to MOSFET source). Connect a resistor from ISNS to GND to set
the maximum LED current.
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Description
6
AN-2090
Demo Board Wiring Overview
30137843
Wiring Connection Diagram
Test Point
Name
I/O
Description
TP3
LED +
Output
LED Constant Current Supply
Supplies voltage and constant-current to anode of LED string.
TP2
LED -
Output
LED Return Connection (not GND)
Connects to cathode of LED string. Do NOT connect to GND.
TP5
LINE
Input
AC Line Voltage
Connects directly to AC line or output of TRIAC dimmer of a 120VAC system.
TP4
NEUTRAL
Input
AC Neutral
Connects directly to AC neutral of a 120VAC system.
Demo Board Assembly
30137869
Top View
30137870
Bottom View
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AN-2090
Design Guide
30137801
FIGURE 1. Evaluation Board Schematic
The following section explains how to design an isolated flyback converter using the LM3448. Refer to the LM3448
datasheet for specific details regarding the function of the
LM3448 device. All reference designators refer to the Evaluation Board Schematic in Figure 1 unless otherwise noted.
verter operates in discontinuous conduction mode (DCM).
DCM is implemented by ensuring that the flyback transformer
current reaches zero before the end of the switching period.
By injecting a voltage proportional to the line voltage at the
FLTR2 pin (see Figure 2), the LM3448 circuit is essentially
turned into a constant power flyback converter operating in
discontinuous conduction mode (DCM).
DCM FLYBACK CONVERTER
This LED driver is designed to accurately emulate an incandescent light bulb and therefore behave as an emulated
resistor. The resistor value is determined based on the LED
string configuration and the desired output power. The circuit
then operates in open-loop, with a fixed duty cycle based on
a constant on-time and constant off-time that is set by selecting appropriate circuit components. Like an incandescent
lamp, the driver is compatible with both forward and reverse
phase dimmers. A key aspect of this design is that the conwww.ti.com
8
or,
30137817
FIGURE 2. Direct Line-Injection Circuit
Therefore a constant on-time (since inductor L is constant)
can be obtained.
By using the line voltage injection technique, the FLTR2 pin
has the voltage wave shape shown in Figure 3 on it with no
TRIAC dimmer in-line. Peak voltage at the FLTR2 pin should
be kept below 1.25V otherwise current limit will be tripped.
Capacitor C11 in conjunction with resistor R15 acts a filter for
noise. Using this technique a power factor greater than 0.95
can be achieved.Figure 4 shows how a constant on-time is
maintained.
30137818
FIGURE 3. FLTR2 Waveform with No Dimmer
30137816
FIGURE 4. Typical Operation of FLTR2 Pin
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The LM3448 normally works as a constant off-time regulator,
but by injecting a 1.0VPK rectified AC voltage into the FLTR2
pin, the on-time can be made to be constant. With a DCM
flyback converter the primary side current, iL(t), needs to increase as the rectified input voltage, V+(t), increases as
shown in the following equations,
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Turns Ratio
The first step with an isolated design is to determine the
transformer turns ratio. This can be an iterative process that
will depend on the specified operating conditions, maximum
stresses allowed for the LM3448 SW FET and re-circulating
diode as well as transformer core parameters. For many
LM3448 flyback designs, an integer turns ratio of 4 or 5 is a
good starting point. The next step will be to verify that the
chosen turns ratio results in operating conditions that do not
violate any other component ratings.
Duty Cycle Calculation
The AC mains voltage at the line frequency fL is assumed to
be perfectly sinusoidal and the diode bridge ideal. This yields
a perfect rectified sinusoid at the input to the flyback. The peak
nominal input voltage VIN-PK(NOM)is defined in terms of the input voltage VIN(NOM),
Next the worst-case peak input current iIN-PK(MAX) is calculated. From Figure 5, the area of the triangle (highlighted with
the dashed oval) is the average input current. Therefore,
Duty cycle is calculated at the nominal peak input voltage
VIN-PK(NOM). Note that this is the duty cycle for flyback operation at the boundary of continuous conduction mode (CCM)
operation. In order to ensure that the converter is operating
in DCM, the primary inductance of the transformer will be adjusted lower (refer to "Transformer" section).
30137847
FIGURE 5. DCM Flyback Current Waveforms
Switching MOSFET (SW FET)
From its datasheet, the LM3448’s SW FET voltage breakdown rating VDS(MAX) is 600V. Due to a transformer’s inherent
leakage inductance, some ringing VRING on the drain of the
SW FET will be present and must also be taken into consideration when choosing a turns ratio. VRING will depend on the
design of the transformer. A good starting point is to design
for 50V of ringing while planning for 100V of ringing if additional margin is needed.
The maximum reflected voltage VREFL based on a turns ratio
of “n” at the primary also needs to be calculated,
Peak Input Current Calculation
Due to the direct line-injection, the flyback converter operates
as a constant power converter. Therefore average input power over one line cycle will approximately equal the output
power,
However since the input power has 120Hz ripple, the “peak”
input power PIN-PK will be equal to twice the output power,
The maximum SW FET drain-to-source voltage is then calculated based on the maximum reflected voltage VREFL, ringing on the SW FET drain and the maximum peak input voltage
VIN-PK(MAX),
Figure 5 illustrates the input current going into the primary
side winding of the flyback transformer over one-half of a rectified input voltage line cycle.
The worst-case average input current is calculated at the
minimum peak input voltage and targeted converter efficiency
η,
where,
and the following condition must be met,
where,
Peak and RMS SW FET currents are calculated along with
maximum SW FET power dissipation based on the SW FET
RDS-ON value,
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10
Current Limit
The peak current limit ILIM should be at least 25% higher than
the maximum peak input current,
The parallel sense resistor combination will need to dissipate
the maximum power,
Given the target operating frequency and the maximum output power, a core size can be chosen using the vendor’s
specifications and recommendations. This choice can then be
validated by calculating the maximum operating flux density
given the core cross-sectional area Ae of the chosen core,
Re-circulating Diode
The main re-circulating diode (D4) should be sized to block
the maximum reverse voltage VRD4(MAX), operate at the maximum average current ID4(MAX), and dissipate the maximum
power PD4(MAX) as determined by the following equations,
With most common core materials, the maximum operating
flux density should be set somewhere between 250mT and
300mT. If the calculation is below this range, then AL should
be increased to the next standard value and the turns and
maximum flux density calculations iterated. If the calculation
is above this range, then AL should be decreased to the next
standard value and the turns and maximum flux density calculations iterated. With the flux density appropriately set, the
core material for the chosen core size can be determined using the vendor’s specifications and recommendations. Note
that there are core materials that can tolerate higher flux densities; however, they are usually more expensive and not
practical for these designs. The rest of the transformer design
can be done with the aid of the manufacturer. There are calculated trade-offs between the different loss mechanisms and
safety constraints that determine how well a transformer performs. This is an iterative process and can ultimately result in
the choice of a new core or switching frequency range. The
previous steps should reduce the number of iterations significantly but a good transformer manufacturer is invaluable for
completion of the process.
Clamp
Figure 6 shows a large ringing (VRING) on the SW FET drain
due to the leakage inductance of the transformer and output
capacitance of SW FET.
TRANSFORMER
Primary Inductance
The maximum peak input current iIN-PK(MAX) occurring at the
minimum AC voltage peak VIN-PK(MIN) determines the worst
case scenario that the converter must be designed for in order
to stay in DCM. Using the equation for inductor voltage,
and rearranging with the previously calculated parameters,
provides an inductance LCRIT where the flyback converter will
operate at the boundary of CCM for a switching frequency
fSW. In order to ensure DCM operation, a general rule of thumb
is to pick a primary inductance LP at 85% of the LCRIT value.
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AN-2090
Transformer Geometries and Materials
The length of the gap necessary for energy storage in the
flyback transformer can be determined numerically; however,
this can lead to non-standard designs. Instead, an appropriate AL core value (a value somewhere between 65nH/turns2
and 160nH/turns2 is a good starting point) can be chosen that
will imply the gap size. AL is an industry standard used to define how much inductance, per turns squared, that a given
core can provide. With the initial chosen AL value, the number
of turns on the primary and secondary are calculated,
AN-2090
When the LM3448’s internal SW FET is on and the drain voltage is low, the blocking diode (D3) is reverse biased and the
clamp is inactive. When the SW FET is turned off, the drain
voltage rises past the nominal voltage (reflected voltage plus
the input voltage). If it reaches the TVS clamp voltage plus
the input voltage, the clamp prevents any further rise. The
TVS diode (D1) voltage is set to prevent the SW FET from
exceeding its maximum rating and should be greater than the
"output voltage x turns ratio" but less than the expected
amount of ringing,
30137813
FIGURE 6. Switch Node Ringing
This clamp method is fairly efficient and very simple compared to other commonly used methods. Note that if the
ringing is large enough that the clamp activates, the ringing
energy is radiated at higher frequencies. Depending on PCB
layout, EMI filtering method, and other application specific
items, the clamp can present problems with regards to meeting radiated EMI standards. If the TVS clamp becomes problematic, there are many other clamp options easily found in a
basic literature search.
A clamp circuit is necessary to prevent damage to SW FET
from excessive voltage. This evaluation board uses a transient voltage suppression (TVS) clamp D1, shown in Figure
7.
BIAS SUPPLIES & CAPACITANCES
The bias supply circuits shown in Figure 8 and Figure 9 enables instant turn-on through Q1 while providing an auxiliary
winding for high efficiency steady state operation. The two
bias paths are each connected to VCC through a diode (D8,
D9) to ensure the higher of the two is providing VCC current.
30137815
FIGURE 7. TVS Diode Clamp
30137893
FIGURE 8. Bias Supply Circuits
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12
30137894
FIGURE 9. Auxiliary Winding Bias Circuit
PassFET Bias Circuit
The passFET (Q1) is used in its linear region to stand-off the
line voltage from the LM3448 regulator. Both the VCC startup
current and discharging of the EMI filter capacitance for proper phase angle detection are handled by Q1. Therefore Q1
has to block the maximum peak input voltage and have both
sufficient surge and power handling capability with regards to
its safe operating area (SOA). The design equations are,
Output Capacitance
C3 should be a high quality electrolytic capacitor with a voltage rating greater than the specified over-voltage protection
threshold VOVP. Given the desired voltage ripple, the minimum output capacitance is calculated,
COFF CURRENT SOURCE
The current source used to establish the constant off-time is
shown in Figure 10. Capacitor C12 will be charged with a
constant current through resistor R16. A zener diode D6 is
placed across R16 which establishes a stable voltage reference for the current source with inherent VCC ripple rejection.
Note that if additional TRIAC holding current is to be sourced
through Q1, then the transistor will need to be sized appropriately to handle the additional current and power dissipation
requirements.
Auxiliary Winding Bias Circuit
For high efficiency during steady-state operation, an additional winding is used to establish an auxiliary voltage VAUX
used to provide a VCC bias voltage. A minimum value of 13V
is recommended for VAUX. An auxiliary transformer turns ratio
nAUX and corresponding turns calculation is used to size the
primary auxiliary winding NA,
30137811
FIGURE 10. COFF Current Source Circuit
The current that charges up capacitor C12 is set up by the
voltage across resistor R16,
The minimum primary bias supply capacitance (C7||C8), given a minimum VCC ripple specification at twice the line frequency f2L, is calculated to keep VCC above UVLO at the
worst-case current,
Typically the current through R16 is a value between 40µA
and 100µA,
Input Capacitance
The input capacitor of the flyback (C1) has to be able to provide energy during the worst-case switching period at the
peak of the AC voltage input. C1 should be a high frequency,
For capacitor C12 it is also known that,
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AN-2090
high stability capacitor (usually a metallized film capacitor, either polypropylene or polyester) with an AC voltage rating
equal to the maximum input voltage. C1 should also have a
DC voltage rating exceeding the maximum peak input voltage
+ half of the peak to peak input voltage ripple specification.
The minimum required input capacitance is calculated given
the same ripple specification,
AN-2090
or,
The off-time tOFF is then calculated where Ts is the switching
period,
30137812
FIGURE 12. OVP Circuit
Re-arranging and substituting equations shows,
The OVP threshold is programmable and is set by selecting
appropriate value of zener diode D13. The resistor capacitor
(R19, C15) combination across the base of transistor Q5 is
used to filter the voltage ripple present on the auxiliary voltage
and prevent false OVP tripping due to voltage spikes caused
by leakage inductance.
The circuit operation is simple and based on biasing of transistor Q5 during fault conditions such that it pulls down the
voltage on the FLTR2 pin to ground. The bias current depends
on how much overdrive voltage is generated above the zener
diode threshold. For proper circuit operation, it is recommended to design for 4V overdrive in order to adequately bias the
transistor. Therefore the zener diode should be selected
based on the expression,
TRIAC HOLDING CIRCUIT
An optional TRIAC holding current circuit is also provided on
the evaluation board as shown in Figure 11. The DIM pin signal is applied through an RC filter as a varying DC voltage to
Q3 such that the voltage on the FLTR2 pin is adjusted and
additional holding current can be sinked.
where, VZ is the zener diode threshold, NA and NS are the
number of transformer auxiliary and secondary turns respectively, and VOVP is the maximum specified output voltage.
INPUT FILTER
Background
Since the LM3448 is used for AC to DC systems, electromagnetic interference (EMI) filtering is critical to pass the
necessary standards for both conducted and radiated EMI.
This filter will vary depending on the output power, the switching frequencies, and the layout of the PCB. There are two
major components to EMI: differential noise and commonmode noise. Differential noise is typically represented in the
EMI spectrum below approximately 500kHz while commonmode noise shows up at higher frequencies.
30137884
FIGURE 11. TRIAC Holding Circuit
OVERVOLTAGE PROTECTION
The circuit described in Figure 12 provides over-voltage protection (OVP) in case of LED open circuit failure. The use of
this circuit is recommended for stand-alone LED driver designs where it is essential to recover from a momentary open
circuit without damaging any part of the circuit. In the case of
an integrated LED lamp (where the LED load is permanently
connected to the driver output) a simple zener diode or TVS
based overvoltage protection is suggested as a cost effective
solution. The zener diode/TVS offers protection against a single open circuit event and prevents the output voltage from
exceeding the regulatory limits. Depending on the LED driver
design specifications, either one or both techniques can be
used to meet the target regulatory agency approval
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14
INRUSH LIMITING AND DAMPING
Inrush
With a forward phase dimmer, a very steep rising edge causes a large inrush current every cycle as shown in Figure 14.
Series resistance (R5, R18) can be placed between the filter
and the TRIAC to limit the effect of this current on the converter and to provide some of the necessary holding current
at the same time. This will degrade efficiency but some inrush
protection is always necessary in any AC system due to startup. The size of R5 and R18 are best found experimentally as
they provide attenuation for the whole system.
30137867
FIGURE 13. Input EMI Filter
Conducted
Figure 13 shows a typical filter used with this LM3448 flyback
design. In order to conform to conducted standards, a fourth
order filter is implemented using inductors and "X" rated AC
capacitors. If sized properly, this filter design can provide ample attenuation of the switching frequency and lower order
harmonics contributing to differential noise. A "Y" rated AC
capacitor (C13) from the primary ground to the secondary
ground is also critical for reduction of common-mode noise
(refer to "Evaluation Board Schematic". This combination of
filters along with any necessary damping can easily provide
a passing conducted EMI signature.
Radiated
Conforming to radiated EMI standards is much more difficult
and is completely dependent on the entire system including
the enclosure. C13 will also help reduce radiated EMI; however, reduction of dV/dt on switching edges and PCB layout
iterations are frequently necessary as well. Consult available
literature and/or an EMI specialist for help with this. Several
iterations of component selection and layout changes may be
necessary before passing a specific radiated EMI standard.
Interaction with Dimmers
In general input filters and forward phase dimmers do not
work well together. The TRIAC needs a minimum amount of
holding current to function. The converter itself is demanding
a certain amount of current from the input to provide to its
output, and the input filter is providing or taking current depending upon the dV/dt of the capacitors. The best way to
deal with this problem is to minimize filter capacitance and
30137846
FIGURE 14. Inrush Current Spike
Damper
The inrush spike can also excite a resonance between the
input filter of the TRIAC and the input filter of the converter.
The associated interaction can cause the current to ring negative, as shown in Figure 14, thereby shutting off the TRIAC.
A TRIAC damper can be placed between the dimmer and the
EMI filter to absorb some of the ringing energy and reduce the
potential for misfires. The damper is also best sized experimentally due to the large variance in TRIAC input filters.
Resistors R5 and R18 can also be increased to help dampen
the ringing at the expense of some efficiency and power factor
performance.
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AN-2090
increase the regulated hold current until there is enough current to satisfy the dimmer and filter simultaneously.
AN-2090
Design Calculations
The following is a step-by-step procedure with calculations for
a 120V, 6.5W flyback design.
SW FET
Maximum reflected voltage:
SPECIFICATIONS
fL = 60Hz
fSW(MIN) =72kHz
VIN(NOM) = 120VAC
VIN(MIN) = 85VAC
VIN(MAX) = 135VAC
ILED = 245mA
Maximum drain-to-source voltage:
ΔvOUT = 1V
ΔvIN-PK = 35V
SW FET VDS(MAX) = 600V
SW FET RDS-ON = 3.5Ω
Vf(D4) = 0.8V
VRING = 50V
POUT(MAX) = 6.5W
VOUT = 26.5V
VOVP = 47V
VAUX = 13V
Maximum peak MosFET current:
Maximum RMS MosFET current:
η = 85%
n=4
AL = 80nH/turns2
Ae = 19.49mm2
VCC = 12V
VZ(D6) = 5.1V
VBE(Q4) = 0.7V
VZ(D7)=12V
R8=49.9kΩ
VGS(Q1)=0.7V
Maximum power dissipation:
CURRENT SENSE
Current Limit:
Sense resistor:
PRELIMINARY CALCULATIONS
Nominal peak input voltage:
Power dissipation:
Maximum peak input voltage:
Resulting component choice:
Minimum peak input voltage:
Maximum average input current:
RE-CIRCULATING DIODE
Maximum reverse blocking voltage:
Duty cycle:
Maximum peak diode current:
Maximum peak input current:
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Maximum average diode current:
16
AN-2090
Choose current through resistor R16: 50µA
Calculate R16,
Maximum power dissipation:
Calculate capacitor C12,
Resulting component choice:
TRANSFORMER
Calculated primary inductance:
PassFET
Calculate maximum peak voltage:
Calculate current:
Chosen primary inductance:
Number of primary turns:
Calculate power dissipation:
Resulting component choice:
Number of secondary turns:
INPUT CAPACITANCE
Minimum capacitance:
Number of auxiliary turns:
AC Voltage rating:
Maximum flux density:
DC Voltage rating:
Resulting component choice:
Resulting component choice:
OUTPUT CAPACITANCE
Minimum capacitance:
COFF CURRENT SOURCE
Calculate off-time,
Voltage rating:
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AN-2090
TRANSIL CLAMP
TVS clamp voltage:
Resulting component choice:
OVERVOLTAGE PROTECTION ZENER DIODE
Calculate Zener diode:
Resulting component choice:
Resulting component choice:
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18
AN-2090
Evaluation Board Schematic
30137801
Warning: The LM3448 evaluation board has exposed high voltage components that present a shock hazard. Caution must be taken when handling the evaluation
board. Avoid touching the evaluation board and removing any cables while the evaluation board is operating. Isolating the evaluation board rather
than the oscilloscope is highly recommended.
Warning: The ground connection on the evaluation board is NOT referenced to earth ground. The oscilloscope should be powered via an isolation transformer
before an oscilloscope ground lead is connected to the evaluation board.
Warning: The LM3448 evaluation board should not be powered with an open load. For proper operation, ensure that the desired number of LEDs are connected
at the output before applying power to the evaluation board.
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AN-2090
Bill of Materials
Part ID
Description
Manufacturer
Part Number
C1
CAP .047UF 400V METAL POLYPRO
EPCOS Inc
B32559C6473K000
C2
CAP FILM MKP .015UF 310VAC X2
Vishay/BC Components
BFC233820153
C3
CAP ALUM 680UF 50V 20% RADIAL
Nichicon
UPW1H681MHD
C4, C15
CAP, CERM, 1uF, 35V, +/-10%, X7R, 0805
Taiyo Yuden
GMK212B7105KG-T
C3225X7R2E154K
C5, C9
CAP CER .15UF 250V X7R 1210
TDK
C6
CAP .10UF 305VAC EMI SUPPRESSION
EPCOS
B32921C3104M
C7
CAP, CERM, 0.1µF, 16V, +/-10%, X7R, 0805
Kemet
C0805C104K4RACTU
C8
CAP CER 47UF 16V X5R 1210
MuRata
GRM32ER61C476ME15L
C10
CAP CER .22UF 16V X7R 0603
MuRata
GRM188R71C224KA01D
C11
Ceramic, X7R, 50V, 10%
MuRata
GRM188R71H222KA01D
C12
CAP CER 330PF 50V 5% C0G 0603
MuRata
GRM1885C1H331JA01D
C13
CAP CER 2200PF 250VAC X1Y1 RAD
TDK Corporation
CD12-E2GA222MYNS
C14
CAP CERM .47UF 10% 25V X5R 0805
AVX
08053D474KAT2A
D1
DIODE TVS 120V 400W UNI 5% SMA
Littlefuse
SMAJ120A
D2
Diode, Switching-Bridge, 400V, 0.8A, MiniDIP
Diodes Inc.
HD04-T
D3
DIODE RECT GP 1A 1000V MINI-SMA
Comchip Technology
CGRM4007-G
D4
DIODE SCHOTTKY 100V 1A SMA
ST Microelectronics
STPS1H100A
D5
DIODE ZENER 47V 3W SMB
ON Semi
1SMB5941BT3G
D6
DIODE ZENER 5.1V 200MW SOD-523F
Fairchild Semiconductor
MM5Z5V1
D7
DIODE ZENER 12V 200MW
Fairchild Semiconductor
MM5Z12V
D8
DIODE SWITCH 200V 200MW
Diodes Inc
BAV20WS-7-F
D9, D10,
D12
IC DIODE SCHOTTKY SS SOD-323
STMicroelectronics
BAT46JFILM
D11
DIODE ZENER 13V 200MW SOD-323
Diodes Inc.
DDZ13BS-7
D13
DIODE ZENER 18V 400MW SOD323
NXP Semi
PDZ18B,115
TSL0808RA-472JR13-PF
L1, L2
INDUCTOR 4700UH .13A RADIAL
TDK Corp
Q1
MOSFET N-CH 240V 260MA SOT-89
Infineon Technologies
BSS87 L6327
Q2
TRANSISTOR NPN 300V SOT23
Diodes Inc
MMBTA42-7-F
Q3
MOSFET, N-CH, 100V, 170A, SOT-323
Diodes Inc.
BSS123W-7-F
Q4
TRANS GP SS PNP 40V SOT323
On Semiconductor
MMBT3906WT1G
Q5
TRANS GP SS NPN 40V SOT323
ON Semi
MMBT3904WT1G
R1, R3
RES, 200k ohm, 1%, 0.25W, 1206
Vishay-Dale
CRCW1206200KFKEA
R2, R7
RES, 309k ohm, 1%, 0.25W, 1206
Vishay-Dale
CRCW1206309KFKEA
R4
RES, 430 ohm, 5%, 0.25W, 1206
Vishay-Dale
CRCW1206430RJNEA
R5, R18
RES 33 OHM 2W 10% AXIAL
TT Electronics/Welwyn
EMC2-33RKI
R6, R24
RES, 10.5k ohm, 1%, 0.125W, 0805
Vishay-Dale
CRCW080510K5FKEA
R8, R11
RES, 49.9k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW060349K9FKEA
R9
RES, 100k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW0603100KFKEA
R10
DNP
-
-
R12
RES, 10.0k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW060310K0FKEA
R13, R17
RES, 10.0 ohm, 1%, 0.125W, 0805
Vishay-Dale
CRCW080510R0FKEA
R14
RES 2.20 OHM 1/4W 1% 1206 SMD
Vishay/Dale
CRCW12062R20FKEA
R15
RES, 3.48k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW06033K48FKEA
R16
RES, 84.5k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW060384K5FKEA
R19
RES, 100 ohm, 1%, 0.125W, 0805
Vishay-Dale
CRCW0805100RFKEA
R20
RES, 30.1k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW060330K1FKEA
R22
RES, 40.2 ohm, 1%, 0.125W, 0805
Vishay-Dale
CRCW080540R2FKEA
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20
Transformer
Wurth Electronics Midcom
750813046 Rev. 00
U1
IC LED Driver
National Semiconductor
LM3448MA
21
AN-2090
T1
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AN-2090
Transformer Design
Mfg: Wurth Electronics Midcom, Part #: 750813046 Rev.00
30137899
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22
NOTE: Spacing between traces and components of this evaluation board are based on high voltage recommendations for designs
that will be potted. Users are cautioned to satisfy themselves as to the suitability of this design for the intended end application
and take any necessary precautions where high voltage layout and spacing rules must be followed.
30137809
Top Layer
30137810
Bottom Layer
23
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AN-2090
PCB Layout
LM3448 - 120VAC, 6W Isolated Flyback LED Driver
Notes
TI/NATIONAL INTERIM IMPORTANT NOTICE
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Copyright © 2011, Texas Instruments Incorporated
LM3448
Application Note 2127 LM3448 A19 Edison Retrofit Evaluation Board
Literature Number: SNOA559A
Texas Instruments
Application Note 2127
Steve Solanyk
November 8, 2011
Introduction
Key Features
This demonstration board highlights the performance of a
LM3448 non-isolated LED driver solution that can be used to
power a single LED string consisting of eight to twelve series
connected LEDs from a 85 VRMS to 135 VRMS, 60 Hz input
power supply.
This is a two-layer board using the bottom and top layer for
component placement. The demonstration board can be
modified to adjust the LED forward current, the number of series connected LEDs that are driven and the switching frequency. The topology used for this evaluation board eliminates the need for passive power factor correction and results
in high power factor with minimal component count which results in a size that can fit in a standard A19 Edison socket.
This board will also operate correctly and dim smoothly using
most standard TRIAC dimmers.
Refer to the LM3448 datasheet for detailed information regarding the LM3448 device. A schematic and layout have also
been included along with measured performance characteristics. A bill of materials is also included that describes the
parts used on this demonstration board.
•
•
Drop-in compatibility with TRIAC dimmers
Line injection circuitry enables PFC values greater than
0.85
Adjustable LED current and switching frequency
Flicker free operation
•
•
Applications
•
•
•
•
Retrofit TRIAC Dimming
Solid State Lighting
Industrial and Commercial Lighting
Residential Lighting
Performance Specifications
LM3448 A19 Edison Retrofit Evaluation Board
LM3448 A19 Edison Retrofit
Evaluation Board
Based on an LED Vf = 3V
Symbol
Parameter
Min
Typ
Max
VIN
Input voltage
85VRMS
120VRMS
135VRMS
VOUT
LED string voltage
-
36V
-
ILED
LED string average current
-
181mA
-
POUT
Output power
-
6.5W
-
LED Current vs. Line Voltage (using TRIAC Dimmer)
Demo Board
LED CURRENT (mA)
200
150
100
50
0
20
30150868
40
60
80
100
INPUT VOLTAGE (VRMS)
120
© 2011 Texas Instruments Incorporated
301508
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AN-2127
30150891
TJ=25°C and VCC=12V, unless otherwise specified.
Efficiency vs. Line Voltage
84
0.90
0.88
POWER FACTOR
EFFICIENCY (%)
Power Factor vs. Line Voltage
12 LEDs
10 LEDs
8 LEDs
82
80
78
76
12 LEDs
10 LEDs
8 LEDs
0.86
0.84
0.82
0.80
74
80
90
100 110 120 130
INPUT VOLTAGE (VRMS)
0.78
80
140
90
100 110 120 130
INPUT VOLTAGE VRMS
30150888
300
140
30150889
LED Current vs. Line Voltage
350
Output Power vs. Line Voltage
8
12 LEDs
10 LEDs
8 LEDs
12 LEDs
10 LEDs
8 LEDs
7
250
POUT (W)
LED CURRENT (mA)
AN-2127
Typical Performance Characteristics
200
6
150
5
100
50
4
80
90
100 110 120 130
INPUT VOLTAGE (VRMS)
140
80
90
100 110 120 130
INPUT VOLTAGE VRMS
30150887
30150890
SW FET Drain Voltage Waveform
(VIN=120VRMS, 12 LEDs, ILED=181mA)
COFF Voltage (CH1), Inductor Current (CH4)
(VIN=120VRMS, 12 LEDs, ILED=181mA)
30150896
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30150898
2
AN-2127
EMI Performance
120V, 6.5W Conducted EMI Scans
NEUTRAL – CISPR/FCC Class B Peak Scan
LINE – CISPR/FCC Class B Peak Scan
30150878
30150877
NEUTRAL – CISPR/FCC Class B Average Scan
LINE – CISPR/FCC Class B Average Scan
30150880
30150879
3
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AN-2127
Circuit Operation With Forward
Phase TRIAC Dimmer
Circuit Operation With Reverse
Phase Dimmer
The dimming operation of the circuit was verified using a forward phase TRIAC dimmer. Waveforms captured at different
dimmer settings are shown below:
The circuit operation was also verified using a reverse phase
dimmer and waveforms captured at different dimmer settings
are shown below:
30150835
30150838
Forward phase circuit at full brightness
Reverse phase circuit at full brightness
30150836
30150839
Forward phase circuit at 90° firing angle
Reverse phase circuit at 90° firing angle
30150837
30150840
Forward phase circuit at 135° firing angle
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Reverse phase circuit at 135° firing angle
4
The board temperature was measured using an IR camera (HIS-3000, Wahl) while running under the following conditions: VIN =
120VRMS, ILED = 181mA, # of LEDs = 12, POUT = 6.5W.
NOTE: Thermal performance is highly dependent on the user's final end-application enclosure, heat-sinking methods, ambient
operating temperature, and PCB board layout in addition to the electrical operating conditions. This LM3448 evaluation board is
optimized to supply 6.5W of output power at room temperature without exceeding the thermal limitations of the LM3448. However
higher output power levels can be achieved if precautions are taken not to exceed the power dissipation limits of the LM3448
package or die junction temperature. Please see the LM3448 datasheet for additional details regarding its thermal specifications.
Top Side - Thermal Scan
• Cursor 1: 65.3°C
• Cursor 2: 60.1°C
• Cursor 3: 67.6°C
• Cursor 4: 64.9°C
• Cursor 5: 65.6°C
30150875
Bottom Side - Thermal Scan
• Cursor 1: 68.1°C
• Cursor 2: 64.7°C
• Cursor 3: 62.6°C
• Cursor 4: 61.7°C
30150876
5
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AN-2127
Thermal Performance
AN-2127
LM3448 Device Pin-Out
30150802
Pin Description 16 Pin Narrow SOIC
Pin #
Name
1, 2, 15, 16
SW
Drain connection of internal 600V MOSFET.
3, 14
NC
No connect. Provides clearance between high voltage and low voltage pins. Do not tie to GND.
4
BLDR
Bleeder pin. Provides the input signal to the angle detect circuitry. A 230Ω internal resistor ensures BLDR is
pulled down for proper angle sense detection.
5, 12
GND
Circuit ground connection.
6
VCC
Input voltage pin. This pin provides the power for the internal control circuitry and gate driver. Connect a 22µF
(minimum) bypass capacitor to ground.
7
ASNS
PWM output of the TRIAC dim decoder circuit. Outputs a 0 to 4V PWM signal with a duty cycle proportional to
the TRIAC dimmer on-time.
8
FLTR1
First filter input. The 120Hz PWM signal from ASNS is filtered to a DC signal and compared to a 1 to 3V, 5.85
kHz ramp to generate a higher frequency PWM signal with a duty cycle proportional to the TRIAC dimmer firing
angle. Pull above 4.9V (typical) to TRI-STATE® DIM.
9
DIM
Input/output dual function dim pin. This pin can be driven with an external PWM signal to dim the LEDs. It may
also be used as an output signal and connected to the DIM pin of other LM3448/LM3445 devices or LED drivers
to dim multiple LED circuits simultaneously.
10
COFF
OFF time setting pin. A user set current and capacitor connected from the output to this pin sets the constant
OFF time of the switching controller.
11
FLTR2
Second filter input. A capacitor tied to this pin filters the PWM dimming signal to supply a DC voltage to control
the LED current. Could also be used as an analog dimming input.
13
ISNS
LED current sense pin (internally connected to MOSFET source). Connect a resistor from ISNS to GND to set
the maximum LED current.
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Description
6
AN-2127
Demo Board Wiring Overview
30150843
Wiring Connection Diagram
Test Point
Name
I/O
Description
TP3
LED +
Output
LED Constant Current Supply
Supplies voltage and constant-current to anode of LED string.
TP4
LED -
Output
LED Return Connection (not GND)
Connects to cathode of LED string. Do NOT connect to GND.
TP1
LINE
Input
AC Line Voltage
Connects directly to AC line or output of TRIAC dimmer of a 120VAC system.
TP2
NEUTRAL
Input
AC Neutral
Connects directly to AC neutral of a 120VAC system.
Demo Board Assembly
30150869
Top View
30150870
Bottom View
7
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AN-2127
Design Guide
30150801
FIGURE 1. Evaluation Board Schematic
BUCK CONVERTER
The following section explains how to design a non-isolated
buck converter using the LM3448. Refer to the LM3448
datasheet for specific details regarding the function of the
LM3448 device. All reference designators refer to the Evaluation Board Schematic in Figure 1 unless otherwise noted.
The circuit operates in open-loop based on a constant off-time
that is set by selecting appropriate circuit components. Like
an incandescent lamp, the driver is compatible with both forward and reverse phase dimmers.
AC-Coupled Line Injection
By injecting a voltage VINJECT which is proportional to the line
voltage into the FLTR2 pin (see Figure 2), input current shaping is obtained which improves power factor performance. By
AC-coupling the VINJECT signal through capacitor C14, improved line-regulation of the LED current is also achieved
(see Figure 3).
30150817
FIGURE 3. AC-Coupled Line-Injection Circuit
Figure 4 shows how line shaping of the input current is implemented. Peak voltage at the FLTR2 pin should be kept
below 1.25V otherwise current limit will be tripped. A good
starting point is to set up the resistor divider consisting of resistors R2, R7 and R15 to provide a VINJECT peak input voltage
of 1.0V at the input of capacitor C14 at the nominal input voltage. Recommended values for the AC-coupling capacitor
C14 is 0.47µF and for the FLTR2 capacitor C15 is 0.1µF.
30150818
FIGURE 2. FLTR2 Waveform with No Dimmer
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8
These VFLTR2 voltages will be used later to determine ripple
and peak inductor currents.
30150816
FIGURE 4. Typical Operation of FLTR2 Pin
Off-time, On-time and Switching Frequency
The AC mains voltage at the line frequency fL is assumed to
be perfectly sinusoidal and the diode bridge ideal. This yields
a perfect rectified sinusoid at the input to the buck converter.
The maximum, nominal and minimum peak input voltages are
defined as follows,
The off-time tOFF is now calculated where TS(MIN) is the minimum switching period,
It is important to note that there is a minimum on-time of 200ns
that needs to be met in order for proper LED driver operation.
Output Power and Current Sense Resistor
Due to the interaction of the AC-coupled line-injection voltage
with the FLTR2 signal, the equations for determining the correct sense resistor RSNS (shown as R14 in the evaluation
board schematic) for a desired output power POUT are complex and beyond the scope of this document. Instead, performance graphs showing the relationship between LED current,
POUT and RSNS are shown in Figure 5, Figure 6 and Figure 7
for common stack voltages of 8, 10 and 12 LEDs. By referring
to these graphs, users can choose R14 values that will meet
their LED current and output power requirements.
The LM3448 will operate as a constant off-time regulator, and
so tOFF will be constant throughout all operating points. The
on-time tON (and subsequently the switching frequency fSW)
will vary depending on input voltage and LED stack voltage
values. For this buck converter operating in continuous conduction mode (CCM), the minimum on-time tON(MIN) can be
determined for a maximum desired switching frequency fSW
(MAX)at the maximum peak input voltage,
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AN-2127
With a 1.0V VINJECT voltage, the voltage at the FLTR2 pin at
the maximum and minimum input voltages can be calculated
using the following equations,
AN-2127
301508f4
FIGURE 5. ILED vs. POUT vs. RSNS for 12 LEDs (Vf=3.0V)
301508f5
FIGURE 6. ILED vs. POUT vs. RSNS for 10 LEDs (Vf=3.0V)
301508f6
FIGURE 7. ILED vs. POUT vs. RSNS for 8 LEDs (Vf=3.0V)
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10
where,
Inductor ripple current will need to be specified by the user
based on desired EMI performance, inductor size and other
operating conditions. The following equations show how to
calculate for maximum and minimum inductor ripple currents
respectively by basing the ripple (i.e.ΔiL(%) as a percentage of
maximum peak inductor currents,
Solving for off-time tOFF results in,
Re-arranging the above equation results in R16 being calculated where C12 is typically chosen as value around 470pF,
It is recommended that this buck converter design operate in
CCM over the full range of operating peak input voltages, and
so the minimum inductor peak current at VIN-PK(MIN) should not
go below zero,
Additionally, the maximum on-time tON(MAX) and corresponding minimum switching frequency fSW(MIN) and maximum
switching period TS(MAX) occur at the minimum peak input
voltage. Using the previously calculated inductor value, these
values can now be calculated as,
The inductor value can be calculated based on the minimum
on-time, LED output voltage and the specified inductor ripple
current ΔiL-PK(VIN-PK-MAX) at the maximum peak input voltage
as described below,
Maximum and minimum duty cycles, DMAX and DMIN, will occur at the minimum and maximum peak input voltages respectively,
COFF Current Source
The current source used to establish the constant off-time is
shown in Figure 8.
Switching MOSFET (SW FET)
Peak and RMS SW FET currents are calculated along with
maximum SW FET power dissipation based on the SW FET
RDS-ON value using the following equations,
30150811
FIGURE 8. COFF Current Source Circuit
11
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AN-2127
Capacitor C12 will be charged with current from the VCC supply through resistor R16. The COFF pin threshold will therefore be tripped based on the following capacitor equation,
Inductor
Peak inductor currents will need to be calculated as shown
below based on the VFLTR2 voltages and chosen sense resistor R14 at the maximum and minimum peak input voltages,
AN-2127
priately to handle the additional current and power dissipation
requirements.
and,
Current Limit
The peak inductor current limit ILIM should be approximately
25% higher than the maximum operating peak inductor current,
The sense resistor will need to be able to dissipate the maximum power,
Re-circulating Diode
The main re-circulating diode (D4) should be sized to block
the maximum reverse voltage VRD4(MAX), operate at the maximum peak IDR-PK(MAX) and RMS currents ID4-RMS(MAX), and
dissipate the maximum power PD4(MAX) as determined by the
following equations,
30150893
FIGURE 9. Bias Supply Circuit
Input Capacitance
The input capacitors C1 and C10 have to be able to provide
energy during the worst-case switching period at the peak of
the AC voltage input. They should be high frequency, high
stability capacitors (usually metallized film capacitors, either
polypropylene or polyester) with an AC voltage rating equal
to the maximum input voltage. They should also have a DC
voltage rating exceeding the maximum peak input voltage
plus half of the peak to peak input voltage ripple specification.
The minimum required input capacitance is calculated given
the same ripple specification,
NOTE: For proper converter operation, the chosen diode
should have a reverse recovery time that is less than the
LM3448's leading edge blanking time of 125ns.
BIAS SUPPLIES & CAPACITANCES
The VCC bias supply circuit is shown in Figure 9. The passFET (Q1) is used in its linear region to stand-off the line
voltage from the LM3448 regulator. Both the VCC startup
current and discharging of the EMI filter capacitance for proper phase angle detection are handled by Q1. Therefore Q1
has to block the maximum peak input voltage and have both
sufficient surge and power handling capability with regards to
its safe operating area (SOA). The design equations are,
Output Capacitance
C3 should be a high quality electrolytic capacitor with a voltage rating greater than the specified LED stack voltage. Given
the desired voltage ripple, the minimum output capacitance is
calculated,
INPUT FILTER
Background
Since the LM3448 is used for AC to DC systems, electromagnetic interference (EMI) filtering is critical to pass the
necessary standards for both conducted and radiated EMI.
This filter will vary depending on the output power, the switching frequencies, and the layout of the PCB. There are two
major components to EMI: differential noise and common-
Note that if additional TRIAC holding current is to be sourced
through Q1, then the transistor will need to be sized appro-
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12
30150867
FIGURE 10. Input EMI Filter
Conducted
Figure 10 shows a typical filter used with this LM3448 flyback
design. In order to conform to conducted standards, a fourth
order filter is implemented using inductors and "X" rated AC
capacitors. If sized properly, this filter design can provide ample attenuation of the switching frequency and lower order
harmonics contributing to differential noise. This combination
of filter components along with any necessary damping can
easily provide a passing conducted EMI signature.
Radiated
Conforming to radiated EMI standards is much more difficult
and is completely dependent on the entire system including
the enclosure. Reduction of dV/dt on switching edges and
PCB layout iterations are frequently necessary. Consult available literature and/or an EMI specialist for help with this.
Several iterations of component selection and layout changes
may be necessary before passing a specific radiated EMI
standard.
Interaction with Dimmers
In general input filters and forward phase dimmers do not
work well together. The TRIAC needs a minimum amount of
holding current to function. The converter itself is demanding
a certain amount of current from the input to provide to its
output, and the input filter is providing or taking current depending upon the dV/dt of the capacitors. The best way to
deal with this problem is to minimize filter capacitance and
increase the regulated hold current until there is enough current to satisfy the dimmer and filter simultaneously.
30150846
FIGURE 11. Inrush Current Spike
Damper
The inrush spike can also excite a resonance between the
input filter of the TRIAC and the input filter of the converter.
The associated interaction can cause the current to ring negative, as shown in Figure 11, thereby shutting off the TRIAC.
A TRIAC damper can be placed between the dimmer and the
EMI filter to absorb some of the ringing energy and reduce the
potential for misfires. The damper is also best sized experimentally due to the large variance in TRIAC input filters.
Resistors R5 and R6 can also be increased to help dampen
the ringing at the expense of some efficiency and power factor
performance.
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AN-2127
INRUSH LIMITING AND DAMPING
Inrush
With a forward phase dimmer, a very steep rising edge causes a large inrush current every cycle as shown in Figure 11.
Series resistance (R5, R6) can be placed between the filter
and the TRIAC to limit the effect of this current on the converter and to provide some of the necessary holding current
at the same time. This will degrade efficiency but some inrush
protection is always necessary in any AC system due to startup. The size of R5 and R6 are best found experimentally as
they provide attenuation for the whole system.
mode noise. Differential noise is typically represented in the
EMI spectrum below approximately 500kHz while commonmode noise shows up at higher frequencies.
AN-2127
Design Calculations
The following is a step-by-step procedure with calculations for
a 120V, 6.5W non-isolated buck converter design.
Calculate maximum FLTR2 pin voltage and verify it is less
than 1.25V:
SPECIFICATIONS
VIN(MAX) = 135VAC
VIN(NOM) = 120VAC
VIN(MIN) = 85VAC
POUT = 6.5W
VOUT = 36V
ILED = 181mA
Efficiency,η = 80%
fL = 60Hz
fSW(MAX) =75kHz
TS(MIN) =13.33µs
Calculate minimum FLTR2 pin voltage:
Inductor
Calculate peak inductor currents at the minimum and maximum peak input voltages:
ΔvOUT = 1V
ΔvIN-PK = 35V
SW FET VDS(MAX) = 600V
SW FET RDS-ON = 3.5Ω
Vf(D4) = 0.8V
VCC = 12V
VZ(D7)=12V
R8=49.9kΩ
VGS(Q1)=0.7V
Calculate inductor ripple currents at the minimum and maximum peak input voltages based on 80% of maximum peak
inductor currents:
PRELIMINARY CALCULATIONS
Nominal peak input voltage:
Verify that converter is in CCM operation at the minimum peak
input voltage:
Calculate minimum on-time and verify it's greater than 200ns:
Calculate inductor value:
Calculate off-time:
COFF Current Source
Choose capacitor C12=470pF.
Calculate resistor R16:
From Figure 5, choose R14=2.0Ω for 6.5W output power with
12 LEDs.
FLTR2 AC-LINE INJECTION
Choose VINJECT(NOM)=1.0V
Choose R2=R7=274kΩ
Calculate R15:
Calculate maximum on-time, minimum switching frequency
and maximum switching period:
or,
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AN-2127
Maximum power dissipation:
Resulting component choice:
Calculate maximum and minimum duty cycles:
PassFET
Calculate maximum peak voltage:
SW FET
Calculate maximum peak SW FET current:
Calculate current:
Calculate maximum RMS SW FET current:
Calculate maximum power dissipation:
Resulting component choice:
Calculate maximum power dissipation:
INPUT CAPACITANCE
Minimum capacitance:
CURRENT LIMIT
Calculate peak inductor current limit:
Power dissipation:
AC Voltage rating:
Resulting component choice:
DC Voltage rating:
RE-CIRCULATING DIODE
Maximum reverse blocking voltage:
Resulting component choice:
Maximum peak diode current:
OUTPUT CAPACITANCE
Minimum capacitance:
Maximum RMS diode current:
Voltage rating:
15
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Resulting component choice:
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16
AN-2127
Evaluation Board Schematic
30150801
Warning: The LM3448 evaluation board has exposed high voltage components that present a shock hazard. Caution must be taken when handling the evaluation
board. Avoid touching the evaluation board and removing any cables while the evaluation board is operating. Isolating the evaluation board rather
than the oscilloscope is highly recommended.
17
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AN-2127
Bill of Materials
Part ID
Description
Manufacturer
Part Number
C1, C10
CAP CER 47000PF 500V X7R 1210
Johanson Dielectrics
501S41W473KV4E
C2, C6
CAP FILM MKP .015UF 310VAC X2
Vishay/BC Comp
BFC233820153
C3
CAP 470UF 50V ELECT PW RADIAL
Nichicon
UPW1H471MHD
C4
DNP
DNP
DNP
C5, C16
CAP CER .15UF 250V X7R 1210
TDK
C3225X7R2E154K
C8
Ceramic, X5R, 16V, 20%
MuRata
GRM32ER61C476ME15L
C12
Ceramic, X7R, 50V, 10%
MuRata
GRM188R71H471KA01D
C13, C15
Ceramic, X7R, 16V, 10%
MuRata
GRM188R71C104KA01D
C14
Ceramic, X7R, 16V, 10%
MuRata
GRM188R71C474KA88D
D1, D8
DIODE SCHOTTKY 1A 200V PWRDI 123
Diodes Inc.
DFLS1200-7
D2
RECT BRIDGE GP 400V 0.5A MINIDIP
Diodes Inc.
RH04DICT-ND
D4
DIODE FAST 1A 300V SMA
Fairchild
ES1F
D7
DIODE ZENER 15V 500MW SOD-123
Fairchild Semi
MMSZ5245B
J5, J10
CONN HEADER .312 VERT 2POS TIN
Tyco Electronics
1-1318301-2
L1, L2
INDUCTOR 4700UH .13A RADIAL
TDK Corp
TSL0808RA-472JR13-PF
L3
820uH, Shielded Drum Core,
Coilcraft Inc.
MSS1038-824KL
Q1
MOSFET N-CH 240V 260MA SOT-89
Infineon Technologies
BSS87 L6327
R1, R3
1%, 0.25W
Vishay-Dale
CRCW1206200kFKEA
R2, R7
1%, 0.25W
Vishay-Dale
CRCW1206274kFKEA
R4
RES 430 OHM 1/2W 5% 2010 SMD
Vishay\Dale
CRCW2010430RJNEF
R5, R6
RES 33 OHM 3W 5% AXIAL
TT Electronics/Welwyn
ULW3-33RJA1
R8
1%, 0.1W
Vishay-Dale
CRCW060349K9FKEA
R9
1%, 0.1W
Vishay-Dale
CRCW060348K7FKEA
R14
RES, 2.00 ohm, 1%, 0.25W, 1206
Vishay-Dale
CRCW12062R00FNEA
R15
RES, 3.16k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW06033K16FKEA
R16
RES, 226k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW0603226KFKEA
R22
1%, 0.125W
Vishay-Dale
CRCW080540R2FKEA
TP1, TP2,
TP3, TP4
Terminal, Turret, TH, Double
Keystone Electronics
1502-2
U1
LM3448 LED Driver
National Semiconductor
LM3448MA Spec: NOPB
www.ti.com
18
NOTE: Spacing between traces and components of this evaluation board are based on high voltage recommendations for designs
that will be potted. Users are cautioned to satisfy themselves as to the suitability of this design for the intended end application
and take any necessary precautions where high voltage layout and spacing rules must be followed.
30150809
Top Layer
30150810
Bottom Layer
19
www.ti.com
AN-2127
PCB Layout
LM3448 A19 Edison Retrofit Evaluation Board
Notes
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