PANJIT 2N7002FN3

2N7002FN3
60V N-CHANNEL ENHANCEMENT MODE MOSFET
Unit : inch(mm)
DFN 3L
FEATURES
0.042(1.05)
0.037(0.95)
0.026(0.65)
0.021(0.55)
• RDS(ON), VGS@10V,IDS@500mA=5Ω
• RDS(ON), [email protected],IDS@50mA=7.5Ω
0.0 22 (0.55)
0.047(0.45)
• Advanced Trench Process Technology
• High Density Cell Design For Ultra Low On-Resistance
• Specially Designed for Battery Operated Systems, Solid-State
Relays Drivers : Relays, Displays, Lamps, Solenoids, Memories, etc.
• In compliance with EU RoHS 2002/95/EC directives
0.013(0.32)
0.008(0.22)
MECHANICAL DATA
0.002(0.05) MAX.
0.013(0.32)
0.008(0.22)
0.014(0.36)
• Marking: AH
3
2
0.004(0.10)
0.0 08 (0.20)
0.004(0.10) 0.0 08 (0.20)
• Terminals: Solderable per MIL-STD-750, Method 2026
0.0 14 (0.20)
0.022(0.55)
0.047(0.45)
• Case: DFN 3L, Plastic
1
Maximum Ratings and Thermal Characteristics (TA=25OC unless otherwise noted )
PARAMETER
SYMBOL
LIMIT
UNITS
Drain-Source Voltage
V DS
60
V
Gats-Source Voltage
V GS
+20
V
Continous Drain Current
I
D
115
mA
DM
800
mA
mW
Pulsed Drain Current (1)
I
Maximum Power Dissipation
PD
150
Junction-to Ambient Thermal Resistance (PCB mounted)2
RθJA
883
T J , T S TG
-55 to +150
O p e ra t i ng J unc t i o n a nd S t o ra g e Te mp e r a tur e Ra ng e
o
C/W
o
C
Note 1 : Maximum DC current limited by the package
2 : Surface mounted on FR4 board,t<10 sec
PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DSEIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE
September 03.2010-REV.00
PAGE . 1
2N7002FN3
ELECTRICAL CHARACTERISTICS
PAR AME T E R
S YMB OL
T E S T C ON D IT ION
MIN .
T YP.
MAX .
U N IT S
60
-
-
V
1
-
2 .5
V
S t a tic
D r a i n- S o urc e B re a k d o wn Vo lta g e
B V DSS
V GS =0 V, I
Ga te Thr e s ho ld Vo lta g e
V GS ( th )
V D S =V G S , I
D r a i n- S o urc e On-S ta te Re s i s ta nc e
R D S ( O N)
V GS =4 .5 V, I
D = 5 0 mA
-
-
7 .5
D r a i n- S o urc e On-S ta te Re s i s ta nc e
R D S ( O N)
V GS =1 0 V, I
D =5 0 0 m A
-
-
5
D=10mA
D = 2 5 0 mA
W
Ze ro Ga te Vo lta g e D ra i n C ur re nt
I
DSS
V D S =6 0 V,V G S = 0 V
-
-
1
mA
Ga te B o d y L e a k a g e
I
GS S
V GS =+ 2 0 V,V D S = 0 V
-
-
+100
nA
100
-
-
mS
-
0 .6
0 .7
-
0 .1
-
-
0 .0 8
-
-
9
15
F o rwa r d Tr a ns c o nd uc ta nc e
gFS
V D S =1 5 V, I
D =2 5 0 m A
D y n a m ic
To ta l Ga te C ha r g e
QG
Ga te -S o urc e C ha rg e
QGS
Ga te -D ra i n C ha r g e
Q GD
Turn-On D e la y Ti m e
TO N
V D S =1 5 V, I
D =5 0 0 m A ,
V GS = 4 . 5 V
nC
V D D = 1 0 V,R L = 2 0 W
I D = 5 0 0 m A ,V GE N = 1 0 V,R G = 1 0 W
ns
Turn-Off D e la y Ti m e
t OFF
-
21
26
Inp ut C a p a c i ta nc e
C IS S
-
-
50
Outp ut C a p a c i ta nc e
C OS S
-
-
25
Re ve rs e Tra ns fe r C a p a c i ta nc e
C RS S
-
-
5
-
-
11 5
-
0 .9 3
1 .2
V D S =2 5 V, V G s = 0 V, f= 1 .0 M Hz
pF
S o u rc e - D r a in D io d e
M a x.D i o d e F o r wa r d C ur re nt
I
D i o d e F o re a rd Vo lta g e
-
S
V SD
I
S = 2 5 0 mA ,V GS = 0 V
VDD
Switching
Test Circuit
VIN
VDD
Gate Charge
Test Circuit
RL
mA
VGS
RL
VOUT
RG
1mA
RG
September 03.2010-REV.00
PAGE . 2
2N7002FN3
MOUNTING PAD LAYOUT
DFN 3L
0.043
(1.10)
0.010
(0.26)
0.010
(0.25)
0.024
(0.60)
0.02 8
(0.70)
0.004
(0.10)
0.017
(0.42)
0.02 7
(0.68)
ORDER INFORMATION
• Packing information
T/R - 8K per 7" plastic Reel
LEGAL STATEMENT
Copyright PanJit International, Inc 2010
The information presented in this document is believed to be accurate and reliable. The specifications and information herein
are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its
products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit
does not convey any license under its patent rights or rights of others.
September 03.2010-REV.00
PAGE . 3