FAIRCHILD 74ABT541

74ABT541
Octal Buffer/Line Driver with 3-STATE Outputs
tm
Features
General Description
■ Non-inverting buffers
The ABT541 is an octal buffer and line driver with
3-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus-oriented transmitter/receiver. The ABT541 is similar to the ABT244
with broadside pinout.
■ Output sink capability of 64mA, source capability of
32mA
■ Guaranteed output skew
■ Guaranteed multiple output switching specifications
■ Output switching specified for both 50pF and 250pF
loads
■ Guaranteed simultaneous switching, noise level and
■
■
■
■
■
dynamic threshold performance
Guaranteed latchup protection
High-impedance, glitch-free bus loading during entire
power up and power down cycle
Nondestructive, hot-insertion capability
Flow-through pinout for ease of PC board layout
Disable time less than enable time to avoid bus
contention
Ordering Information
Package
Number
Package Description
74ABT541CSC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74ABT541CSJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Order Number
74ABT541CMSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74ABT541CMTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix “X” to the ordering number.
Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Pin Descriptions
Pin Names
©1992 Fairchild Semiconductor Corporation
74ABT541 Rev. 1.4
Description
OE1, OE2
Output Enable Input (Active LOW)
I0–I7
Inputs
O0–O7
Outputs
www.fairchildsemi.com
74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs
March 2007
Inputs
OE1
OE2
I
Outputs
L
L
H
H
H
X
X
Z
X
H
X
Z
L
L
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
TSTG
Parameter
Rating
Storage Temperature
–65°C to +150°C
TA
Ambient Temperature Under Bias
–55°C to +125°C
TJ
Junction Temperature Under Bias
–55°C to +150°C
VCC
VCC Pin Potential to Ground Pin
VIN
Input Voltage(1)
–0.5V to +7.0V
–0.5V to +7.0V
IIN
Input Current(1)
–30mA to +5.0mA
VO
Voltage Applied to Any Output
Disabled or Power-Off State
–0.5V to 5.5V
HIGH State
–0.5V to VCC
Current Applied to Output in LOW State (Max.)
twice the rated IOL (mA)
DC Latchup Source Current
–500mA
Over Voltage Latchup (I/O)
10V
Note:
1. Either voltage limit or current limit is sufficient to protect inputs.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
TA
VCC
∆V / ∆t
Parameter
Rating
Free Air Ambient Temperature
–40°C to +85°C
Supply Voltage
+4.5V to +5.5V
Minimum Input Edge Rate
Data Input
50mV/ns
Enable Input
20mV/ns
©1992 Fairchild Semiconductor Corporation
74ABT541 Rev. 1.4
www.fairchildsemi.com
2
74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs
Truth Table
Symbol
Parameter
VCC
Conditions
VIH
Input HIGH Voltage
Recognized HIGH Signal
VIL
Input LOW Voltage
Recognized LOW Signal
Min.
Typ.
Max. Units
2.0
V
0.8
V
VCD
Input Clamp Diode Voltage
Min.
IIN = –18mA
VOH
Output HIGH Voltage
Min.
IOH = –3mA
2.5
V
IOH = –32mA
2.0
V
VOL
IIH
Output LOW Voltage
Input HIGH Current
Min.
Max.
–1.2
IOL = 64mA
VIN =
2.7V(3)
V
0.55
V
1
µA
VIN = VCC
1
IBVI
Input HIGH Current
Breakdown Test
Max.
VIN = 7.0V
7
µA
IIL
Input LOW Current
Max.
VIN = 0.5V(3)
–1
µA
VIN = 0.0V
–1
Input Leakage Test
IOZH
Output Leakage Current
0–5.5V VOUT = 2.7V, OEn = 2.0V
10
µA
IOZL
Output Leakage Current
0–5.5V VOUT = 0.5V, OEn = 2.0V
–10
µA
IOS
Output Short-Circuit Current
Max.
VOUT = 0.0V
–275
mA
ICEX
Output HIGH Leakage
Current
Max.
VOUT = VCC
50
µA
VOUT = 5.5V, All Others GND
100
µA
IZZ
Bus Drainage Test
0.0
IID = 1.9µA, All Other Pins
Grounded
VID
0.0
4.75
–100
V
ICCH
Power Supply Current
Max.
All Outputs HIGH
50
µA
ICCL
Power Supply Current
Max.
All Outputs LOW
30
mA
ICCZ
Power Supply Current
Max.
OEn = VCC, All Others at VCC
or Ground
50
µA
ICCT
Additional Outputs Enabled
ICC/Input Outputs 3-STATE
VI = VCC – 2.1V
2.5
mA
Enable Input VI = VCC – 2.1V
2.5
mA
Data Input VI = VCC – 2.1V,
All Others at VCC or Ground
50
µA
Outputs Open, OEn = GND,
One-Bit Toggling(2),
50% Duty Cycle
0.1
mA/
MHz
Max.
Outputs 3-STATE
ICCD
Dynamic ICC No Load(3)
Max
Notes:
2. For 8-bit toggling, ICCD < 0.8mA/MHz.
3. Guaranteed, but not tested.
©1992 Fairchild Semiconductor Corporation
74ABT541 Rev. 1.4
www.fairchildsemi.com
3
74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs
DC Electrical Characteristics
SOIC package.
Symbol
VOLP
VOLV
Parameter
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
VCC
Conditions
CL = 50pF,
RL = 500Ω
5.0
TA =
25°C(4)
TA =
25°C(4)
–1.3
–0.8
V
25°C(5)
2.7
3.1
V
2.0
1.4
V
5.0
VOHV
Minimum HIGH Level Dynamic Output
Voltage
5.0
TA =
VIHD
Minimum HIGH Level Dynamic Input
Voltage
5.0
TA = 25°C(6)
VILD
Maximum LOW Level Dynamic Input
Voltage
5.0
TA = 25°C(6)
Min.
Typ.
Max.
Units
0.7
1.0
V
1.1
0.6
V
Notes:
4. Max number of outputs defined as (n). n – 1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but
not tested.
5. Max number of outputs defined as (n). n – 1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not
tested.
6. Max number of data inputs (n) switching. n – 1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold
(VILD), 0V to threshold (VIHD). Guaranteed, but not tested.
AC Electrical Characteristics
SOIC and SSOP package.
TA = +25°C,
VCC = +5V,
CL = 50pF
Symbol
tPLH
tPHL
tPZH
Parameter
Min.
Typ.
Max.
Min.
Max.
Units
Propagation Delay,
Data to Outputs
1.0
2.0
3.6
1.0
3.6
ns
1.0
2.4
3.6
1.0
3.6
Output Enable Time
1.5
3.1
6.0
1.5
6.0
1.5
3.7
6.0
1.5
6.0
tPZL
tPHZ
TA = –40°C to +85°C,
VCC = 4.5V–5.5V,
CL = 50pF
Output Disable Time
tPLZ
©1992 Fairchild Semiconductor Corporation
74ABT541 Rev. 1.4
1.7
3.5
6.1
1.7
6.1
1.7
3.1
5.6
1.7
5.6
ns
ns
www.fairchildsemi.com
4
74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs
DC Electrical Characteristics
SOIC package.
TA = –40°C to +85°C, TA = –40°C to +85°C,
VCC = 4.5V to 5.5V, VCC = 4.5V to 5.5V,
CL = 250pF,
CL = 250pF,
1 Output
8 Outputs
Switching(8)
Switching(9)
–40°C to +85°C,
VCC = 4.5V to 5.5V,
CL = 50pF,
8 Outputs
Switching(7)
Symbol
fTOGGLE
tPLH
tPHL
tPZH
Parameter
Max Toggle
Frequency
tPLZ
Typ.
Max.
Min.
Max.
Mi.n
Max.
MHz
1.5
5.0
1.5
6.0
2.5
8.5
1.5
5.0
1.5
6.0
2.5
8.5
Output Enable Time
1.5
6.5
2.5
7.5
2.5
9.5
1.5
6.5
2.5
7.5
2.5
10.5
Output Disable
Time
Units
100
Propagation Delay,
Data to Outputs
tPZL
tPHZ
Min.
1.0
6.1
1.0
5.6
(10)
ns
ns
ns
Notes:
7. This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described
switching in phase (i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
8. This specification is guaranteed but not tested. The limits represent propagation delay with 250pF load capacitors
in place of the 50pF load capacitors in the standard AC load. This specification pertains to single output switching
only.
9. This specification is guaranteed but not tested. The limits represent propagation delays for all paths described
switching in phase (i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250pF load capacitors in place of the 50pF load
capacitors in the standard AC load.
10. The 3-STATE delays are dominated by the RC network (500Ω, 250pF) on the output and have been excluded from
the datasheet.
©1992 Fairchild Semiconductor Corporation
74ABT541 Rev. 1.4
www.fairchildsemi.com
5
74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs
Extended AC Electrical Characteristics
SOIC package.
Symbol
TA = –40°C to +85°C,
VCC = 4.5V to 5.5V,
CL = 50pF,
8 Outputs
Switching(11)
TA = –40°C to +85°C,
VCC = 4.5V to 5.5V,
CL = 250pF,
8 Outputs
Switching(12)
Max.
Max.
Units
Parameter
tOSHL
(13)
Pin to Pin Skew, HL Transitions
1.3
2.3
ns
tOSLH
(13)
Pin to Pin Skew, LH Transitions
1.0
1.8
ns
Duty Cycle, LH/HL Skew
2.0
3.5
ns
Pin to Pin Skew, LH/HL Transitions
2.0
3.5
ns
Device to Device Skew, LH/HL
Transitions
2.0
3.5
ns
tPS
(14)
tOST(13)
tPV
(15)
Notes:
11. This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described
switching in phase (i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.)
12. These specifications guaranteed but not tested. The limits represent propagation delays with 250pF load capacitors
in place of the 50pF load capacitors in the standard AC load.
13. Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate
outputs of the same device. The specification applies to any outputs switching HIGH-to-LOW (tOSHL), LOW-to-HIGH
(tOSLH), or any combination switching LOW-to-HIGH and/or HIGH-to-LOW (tOST). The specification is guaranteed
but not tested.
14. This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same
pin. It is measured across all the outputs (drivers) on the same chip, the worst (largest delta) number is the
guaranteed specification. This specification is guaranteed but not tested.
15. Propagation delay variation for a given set of conditions (i.e., temperature and VCC) from device to device. This
specification is guaranteed but not tested.
Capacitance
Symbol
CIN
COUT
(16)
Conditions
TA = 25°C
Parameter
Typ.
Units
Input Capacitance
VCC = 0.0V
5.0
pF
Output Capacitance
VCC = 5.0V
9.0
pF
Note:
16. COUT is measured at frequency of f = 1 MHz, per MIL-STD-883, Method 3012.
©1992 Fairchild Semiconductor Corporation
74ABT541 Rev. 1.4
www.fairchildsemi.com
6
74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs
Skew
*Includes jig and probe capacitance
Figure 2. Test Input Signal Levels
Figure 1. Standard AC Test Load
Amplitude
Rep. Rate
tW
tr
tf
3.0V
1 MHz
500 ns
2.5 ns
2.5 ns
Figure 3. Test Input Signal Requirements
AC Waveforms
Figure 4. Propagation Delay Waveforms for
Inverting and Non-Inverting Functions
Figure 6. 3-STATE Output HIGH and
LOW Enable and Disable Time
Figure 5. Propagation Delay, Pulse Width Waveforms
©1992 Fairchild Semiconductor Corporation
74ABT541 Rev. 1.4
Figure 7. Setup Time, Hold Time and
Recovery Time Waveforms
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7
74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs
AC Loading
74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs
Physical Dimensions
Dimensions are in inches (millimeters) unless otherwise noted.
Figure 8. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
©1992 Fairchild Semiconductor Corporation
74ABT541 Rev. 1.4
www.fairchildsemi.com
8
74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 9. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
©1992 Fairchild Semiconductor Corporation
74ABT541 Rev. 1.4
www.fairchildsemi.com
9
74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 10. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
Package Number MSA20
©1992 Fairchild Semiconductor Corporation
74ABT541 Rev. 1.4
www.fairchildsemi.com
10
74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 11. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
©1992 Fairchild Semiconductor Corporation
74ABT541 Rev. 1.4
www.fairchildsemi.com
11
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
2. A critical component in any component of a life support,
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Definition
Preliminary
First Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I24
©1992 Fairchild Semiconductor Corporation
74ABT541 Rev. 1.4
www.fairchildsemi.com
12
74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs
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