TI TS5A22366YFCR

TS5A22366
www.ti.com ................................................................................................................................................ SCDS262A – JANUARY 2009 – REVISED AUGUST 2009
0.7-Ω DUAL SPDT ANALOG SWITCH
WITH NEGATIVE RAIL CAPABILITY AND 1.8-V COMPATIBLE INPUT LOGIC
FEATURES
1
•
•
•
•
•
•
•
•
•
Negative Signaling Capability: Maximum
Swing From –2.75 V to 2.75 V (V+ = 2.75 V)
Low ON-State Resistance (0.7 Ω Typ)
Excellent ON-State Resistance Matching
1.8-V Compatible Control Input Threshold
Independent of V+
Control Inputs Are 5.5-V Tolerant
2.25-V to 5.5-V Power Supply (V+)
Low Charge Injection
Specified Break-Before-Make Switching
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2500-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
– 200-V Machine Model (A115-A)
APPLICATIONS
•
•
•
•
•
Cell Phones
PDAs
Portable Instrumentation
Audio Routing
Portable Media Players
YFC PACKAGE TERMINAL ASSIGNMENTS
YFC PACKAGE
D
•
D
C
C
B
B
A
A
3 2 1
Laser Marking View
1 2 3
Bump View
(1)
D
NC1
V+
NC2
C
COM1
GND
COM2
B
NO1
GND
NO2
A
IN1
N.C. (1)
IN2
1
2
3
N.C. –No internal connection
DESCRIPTION/ORDERING INFORMATION
The TS5A22366 is a dual single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V
to 5.5 V. The device features negative signal capability that allows signals below ground to pass through the
switch without distortion.
The break-before-make feature prevents signal distortion during the transferring of a signal from one path to
another. Low ON-state resistance, excellent channel-to-channel ON-state resistance matching, and minimal total
harmonic distortion (THD) performance are ideal for audio applications.
The TS5A22366 is available is a ultra small 1.6 mm × 1.2 mm wafer-chip-scale package (WCSP) (0.4 mm pitch)
and in a 2 mm × 1.5 mm quad flat (QFN) package (0.5 mm pitch).
ORDERING INFORMATION
TA
–40°C to 85°C
(1)
(2)
(3)
PACKAGE
(1) (2)
NanoFree™ – WCSP (DSBGA)
YFC (Pb-free)
ORDERABLE PART NUMBER
Tape and reel
TS5A22366YFCR
TOP-SIDE MARKING (3)
3A_
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
YFC: The actual top-side marking has one additional character to designate the assembly/test site. Pin 1 identifier indicates solder-bump
composition (1 = SnPb, • = Pb-free).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated
TS5A22366
SCDS262A – JANUARY 2009 – REVISED AUGUST 2009 ................................................................................................................................................ www.ti.com
SUMMARY OF CHARACTERISTICS
V+ = 3.3 V, TA = 25°C
2:1 Multiplexer/Demultiplexer
(2 × SPDT)
Configuration
Number of channels
2
ON-state resistance (ron)
0.8 Ω
ON-state resistance match (Δron)
0.08 Ω
0.3 Ω
ON-state resistance flatness (rON(flat))
Turn-on/turn-off time (tON/tOFF)
199 ns/182 ns
Break-before-make time (tBBM)
7.1 ns
Charge injection (QC)
120 pC
Bandwidth (BW)
32 MHz
OFF isolation (OISO)
–70 dB at 100 kHz
Crosstalk (XTALK)
–70 dB at 100 kHz
Total harmonic distortion (THD)
Package option
0.01%
12-pin WCSP (YFC)
FUNCTION TABLE
NC TO COM,
COM TO NC
NO TO COM,
COM TO NO
L
ON
OFF
H
OFF
ON
IN
2
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TS5A22366
www.ti.com ................................................................................................................................................ SCDS262A – JANUARY 2009 – REVISED AUGUST 2009
APPLICATION BLOCK DIAGRAM
OUT+
Audio
Source 1
NC1
OUT–
COM1
NO1
IN1
Input Select
8 Ω Speaker
TS5A22366
IN2
NC2
COM2
OUT+
Audio
Source 2
OUT–
NO2
Figure 1. TS5A22366 Application Block Diagram
Negative Signaling Capacity
The TS5A22366 dual SPDT switch features negative signal capability that allows signals below ground to pass
through without distortion. These analog switches operate from a single +2.3-V to +5.5-V supply. The
input/output signal swing of the device is dependant of the supply voltage V+: the devices pass signals as high as
V+ and as low as V+ – 5.5 V, including signals below ground with minimal distortion.
Table 1 shows the input/output signal swing the user can get with different supply voltages.
Table 1. Input/Output Signal Swing
MINIMUM
(VNC, VNO, VCOM) = V+ – 5.5
MAXIMUM
(VNC, VNO, VCOM) = V+
5.5 V
0V
5.5 V
4.2 V
–1.3 V
4.2 V
3.3 V
–2.2 V
3.3 V
3V
–2.5 V
3V
2.5 V
–3 V
2.5 V
SUPPLY VOLTAGE, V+
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TS5A22366
SCDS262A – JANUARY 2009 – REVISED AUGUST 2009 ................................................................................................................................................ www.ti.com
ABSOLUTE MINIMUM AND MAXIMUM RATINGS (1) (2)
over operating free-air temperature range (unless otherwise noted)
V+
Supply voltage range (3)
VNC
VNO
VCOM
Analog voltage range (3) (4) (5)
IK
Analog port diode current (6)
INC
INO
ICOM
ON-state switch current
VI
Digital input voltage range
V+ < VNC, VNO, VCOM < 0
ON-state peak switch current (7)
(3) (4)
IIK
Digital input clamp current
IGND
I+
Continuous current through V+or GND
Tstg
Storage temperature range
(1)
(2)
(3)
(4)
(5)
(6)
(7)
VNC, VNO, VCOM = 0 to V+
VIO < VI < 0
MIN
MAX
–0.5
6
V
V+ – 6
V+ + 0.5
V
–50
50
V
–150
150
–300
300
–0.5
6.5
–50
UNIT
mA
V
mA
–100
100
mA
–65
150
°C
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All voltages are with respect to ground, unless otherwise specified.
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
This value is limited to 5.5 V maximum.
Requires clamp diodes on analog port to V+.
Pulse at 1-ms duration <10% duty cycle
THERMAL IMPEDANCE RATINGS
UNIT
θJA
(1)
4
Package thermal impedance
(1)
YFC package
106.2
°C/W
The package thermal impedance is calculated in accordance with JESD 51-7.
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TS5A22366
www.ti.com ................................................................................................................................................ SCDS262A – JANUARY 2009 – REVISED AUGUST 2009
ELECTRICAL CHARACTERISTICS FOR 2.5-V SUPPLY (1)
V+ = 2.25 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
Analog Switch
Analog signal
range
ON-state
resistance
ON-state
resistance match
between
channels
ON-state
resistance
flatness
VCOM,
VNO, VNC
ron
V+ – 5.5
VNC or VNO = V+, 1.5 V,
Switch ON,
V+ – 5.5 V
See Figure 15
ICOM = –100 mA,
25°C
Full
1
2.25 V
ron(flat)
VNC or VNO = 1.5 V,
ICOM = –100 mA,
Switch ON,
See Figure 15
Full
VNC or VNO = V+, 1.5 V,
Switch ON,
V+ – 5.5 V
See Figure 16
ICOM = –100 mA,
25°C
25°C
Switch OFF,
See Figure 16
See Figure 17
NC, NO
OFF leakage
current
INC(OFF),
INO(OFF)
VNC = 2.25, V+ – 5.5 V
VCOM = V+ – 5.5 V,
2.25,
VNO = Open,
or
VNO = 2.25, V+ – 5.5 V
VCOM = V+ – 5.5 V,
2.25,
VNC = Open,
COM
ON leakage
current
ICOM(ON)
VNC and VNO = Open,
VCOM = V+,V+ – 5.5 V,
Full
Full
0.05
2.25 V
0.53
2.7 V
25°C
Full
2.7 V
Ω
1
1
2.25 V
Ω
1.8
2
25°C
Δron
V+
Ω
1.5
1.6
–50
50
–375
375
–50
50
–375
375
Ω
nA
nA
Digital Control Inputs (IN, EN) (2)
Input logic high
VIH
Full
Input logic low
VIL
Full
Input leakage
current
IIH, IIL
(1)
(2)
VIN = 1.8 V or GND
25°C
Full
1.05
2.7 V
5.5
V
0.65
V
–700
700
–700
700
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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ELECTRICAL CHARACTERISTICS FOR 2.5-V SUPPLY (continued)
V+ = 2.25 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
25°C
2.5 V
193
297
Full
2.25 V to 2.7
V
350
25°C
2.5 V
266
Full
2.25 V to 2.7
V
320
UNIT
Dynamic
Turn-on time
tON
VCOM = V+,
RL = 300 Ω,
CL = 35 pF,
See Figure 19
Turn-off time
tOFF
VCOM = V+,
RL = 300 Ω,
CL = 35 pF,
See Figure 19
Break-beforemake time
tBBM
VNC = VNO = V+/2
RL = 300 Ω,
CL = 35 pF,
See Figure 20
25°C
2.5 V
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See Figure 24
25°C
1
ns
ns
15.6
ns
2.5 V
91
pC
Charge injection
QC
NC, NO
OFF capacitance
CNC(OFF),
CNO(OFF)
VNC or VNO = V+ or
GND,
Switch OFF,
See Figure 18
25°C
2.5 V
51
pF
NC, NO
ON capacitance
CNC(ON),
CNO(ON)
VNC or VNO = V+ or
GND,
Switch OFF,
See Figure 18
25°C
2.5 V
181
pF
COM
ON capacitance
CCOM(ON)
VCOM = V+ or GND,
Switch ON,
See Figure 18
25°C
2.5 V
181
pF
VI = V+ or GND
See Figure 18
25°C
2.5 V
3
pF
BW
RL = 50 Ω,
Switch ON,
See Figure 20
25°C
2.5 V
32
MHz
OISO
RL = 50 Ω, Switch
OFF,
See Figure 22
Digital input
capacitance
Bandwidth
OFF isolation
Crosstalk
CI
XTALK
RL = 50 Ω, Switch ON,
See Figure 23
f = 100 kHz,
f = 1 MHz,
–70
25°C
2.5 V
–35
f = 100 kHz,
–70
f = 1 MHz,
25°C
2.5 V
f = 5 MHz,
Total harmonic
distortion
THD
f = 20 Hz to 20
kHz,
See Figure 25
RL = 600 Ω,
CL = 50 pF,
–50
f = 5 MHz,
dB
–50
dB
–35
25°C
2.5 V
0.02
Full
2.7 V
6
%
Supply
Positive
supply current
6
I+
VI = 1.8 V or GND,
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µA
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TS5A22366
www.ti.com ................................................................................................................................................ SCDS262A – JANUARY 2009 – REVISED AUGUST 2009
ELECTRICAL CHARACTERISTICS FOR 3.3-V SUPPLY (1)
V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
Analog Switch
Analog signal
range
VCOM,
VNO, VNC
V+ – 0.5
ron
VNC or VNO ≤ V+, 1.5
V,
V+ – 5.5 V,
ICOM = –100 mA,
Switch ON,
See Figure 15
Δron
VNC or VNO = 1.5 V,
ICOM = –100 mA,
Switch ON,
See Figure 15
ron(flat)
VNC or VNO ≤ V+, 1.5
V,
V+ – 5.5 V,
ICOM = –100 mA,
Switch ON,
See Figure 16
NC, NO
OFF leakage
current
INC(OFF),
INO(OFF)
VNC = 3, V+ – 5.5 V
VCOM = V+ – 5.5 V, 3,
VNO = Open,
or
VNO = 3 , V+ – 5.5 V
VCOM = V+ – 5.5 V, 3,
VNC = Open,
COM
ON leakage
current
ICOM(ON)
VNC and VNO = Open, Switch ON,
VCOM = V+,V+ – 5.5 V, See Figure 17
ON-state
resistance
ON-state
resistance match
between
channels
ON-state
resistance
flatness
25°C
Full
0.8
3V
0.08
3V
Full
0.3
3V
25°C
Switch OFF,
See Figure 16
Full
3.6 V
25°C
Full
3.6 V
Ω
0.17
0.3
25°C
Ω
1.3
1.53
25°C
Full
V+
Ω
0.65
0.75
–50
50
–375
375
–50
50
–375
375
Ω
nA
nA
Digital Control Inputs (IN, EN) (2)
Input logic high
VIH
Full
Input logic low
VIL
Full
Input leakage
current
IIH, IIL
(1)
(2)
VIN = 1.8 V or GND
25°C
Full
1.05
3.6 V
5.5
V
0.65
V
–920
920
–920
920
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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ELECTRICAL CHARACTERISTICS FOR 3.3-V SUPPLY (continued)
V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
199
313
UNIT
Dynamic
Turn-on time
tON
VCOM = V+,
RL = 300 Ω,
CL = 35 pF,
See Figure 19
25°C
3.3 V
Full
3 V to 3.6 V
Turn-off time
tOFF
VCOM = V+,
RL = 300 Ω,
CL = 35 pF,
See Figure 19
25°C
3.3 V
Full
3 V to 3.6 V
Break-beforemake time
tBBM
VNC = VNO = V+/2
RL = 300 Ω,
CL = 35 pF,
See Figure 20
25°C
3.3 V
Charge injection
QC
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See Figure 24
25°C
NC, NO
OFF capacitance
CNC(OFF),
CNO(OFF)
VNC or VNO = V+ or V+
– 5.5 V,
See Figure 18
Switch OFF,
NC, NO
ON capacitance
CNC(ON),
CNO(ON)
VNC or VNO = V+ or
GND,
Switch OFF,
COM
ON capacitance
CCOM(ON)
Digital input
capacitance
CI
pC
25°C
3.3 V
50
pF
See Figure 18
25°C
3.3 V
180
pF
VCOM = V+ or GND,
Switch ON,
See Figure 18
25°C
3.3 V
180
pF
VI = V+ or GND
See Figure 18
25°C
3.3 V
3
pF
Switch ON,
See Figure 20
25°C
3.3 V
32
MHz
25°C
3.3 V
OISO
RL = 50 Ω, Switch
OFF,
See Figure 22
RL = 50 Ω, Switch
ON,
See Figure 23
f = 100 kHz,
f = 1 MHz,
–50
dB
–35
f = 100 kHz,
–70
25°C
3.3 V
f = 5 MHz,
f = 20 Hz to 20
kHz,
See Figure 25
RL = 600 Ω,
CL = 50 pF,
–70
f = 5 MHz,
f = 1 MHz,
1
ns
120
OFF isolation
THD
350
3.3 V
RL = 50 Ω,
Total harmonic
distortion
289.9
ns
BW
XTALK
182
ns
7.1
Bandwidth
Crosstalk
370
–50
dB
–35
25°C
3.3 V
0.01
Full
3.6 V
6
%
Supply
Positive
supply current
8
I+
VI = 1.8 V or GND
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ELECTRICAL CHARACTERISTICS FOR 5-V SUPPLY (1)
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX UNIT
Analog Switch
Analog signal
range
ON-state
resistance
ON-state
resistance match
between channels
ON-state
resistance
flatness
VCOM,
VNO, VNC
V+ –
5.5
ron
VNC or VNO = V+,
1.5V, V+ -5.5V
ICOM = –100 mA,
Switch ON,
See Figure 15
Δron
VNC or VNO = 1.5 V,
ICOM = –100 mA,
Switch ON,
See Figure 15
ron(flat)
VNC or VNO = V+,
1.5V, V+ -5.5V
ICOM = –100 mA,
Switch ON,
See Figure 16
NC, NO
OFF leakage
current
INC(OFF),
INO(OFF)
VNC = 4.5, V+ – 5.5 V
VCOM = V+ – 5.5 V,
4.5,
VNO = Open,
or
VNO = 4.5, V+ – 5.5 V
VCOM = V+ – 5.5 V,
4.5,
VNC = Open,
COM
ON leakage
current
ICOM(ON)
VNC and VNO = Open,
VCOM = V+,V+ – 5.5 V,
25°C
Full
0.7
4.5 V
0.1
4.5 V
Full
0.135
4.5 V
25°C
Switch OFF,
See Figure 16
Switch ON,
See Figure 17
Full
5.5 V
25°C
Full
5.5 V
Ω
0.2
0.3
25°C
Ω
1
1.36
25°C
Full
V+
Ω
0.37
0.51
–50
50
–375
375
–50
50
–375
375
Ω
nA
nA
Digital Control Inputs (IN, EN) (2)
Input logic high
VIH
Full
Input logic low
VIL
Full
Input leakage
current
(1)
(2)
IIH, IIL
VIN = 1.8 V or 0
25°C
Full
1.05
5.5 V
5.5
V
0.65
V
–1.5
1.5
–1.5
1.5
µA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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ELECTRICAL CHARACTERISTICS FOR 5-V SUPPLY (continued)
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
25°C
5V
Full
4.5 V to 5.5
V
25°C
5V
Full
4.5 V to 5.5
V
MIN
TYP
MAX UNIT
Dynamic
Turn-on time
tON
VCOM = V+,
RL = 300 Ω,
CL = 35 pF,
See Figure 19
Turn-off time
tOFF
VCOM = V+,
RL = 300 Ω,
CL = 35 pF,
See Figure 19
Break-beforemake time
tBBM
VNC = VNO = V+/2
RL = 300 Ω,
CL = 35 pF,
See Figure 20
25°C
3.3 V
Charge injection
QC
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See Figure 24
25°C
NC, NO
OFF capacitance
CNC(OFF),
CNO(OFF)
VNC or VNO = V+ or V+
– 5.5 V,
Switch OFF,
See Figure 18
NC, NO
ON capacitance
CNC(ON),
CNO(ON)
VNC or VNO = V+ or V+
– 5.5 V,
Switch ON,
COM
ON capacitance
CCOM(ON)
Digital input
capacitance
Bandwidth
OFF isolation
Crosstalk
374
470
206
325
380
ns
ns
5V
168
pC
25°C
5V
48
pF
See Figure 18
25°C
5V
176
pF
VCOM = V+ or GND,
Switch ON,
See Figure 18
25°C
5V
176
pF
VI = V+ or GND
See Figure 18
25°C
5V
3
pF
BW
RL = 50 Ω,
Switch ON,
See Figure 20
25°C
5V
32
MHz
OISO
RL = 50 Ω, Switch
OFF,
See Figure 22
CI
XTALK
RL = 50 Ω, Switch ON,
See Figure 23
f = 100 kHz
f = 1 MHz
THD
RL = 600 Ω,
CL = 50 pF,
1
ns
3
–70
25°C
5V
–50
f = 5 MHz
–35
f = 100 kHz
–70
f = 1 MHz
25°C
5V
f = 5 MHz
Total harmonic
distortion
230
f = 20 Hz to 20 kHz,
See Figure 25
dB
–50
dB
–35
25°C
5V
Full
5.5 V
0.01
%
Supply
Positive
supply current
10
I+
VI = 1.8 V or GND
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14
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TYPICAL PERFORMANCE
1.8
1.6
1.6
1.4
1.4
V+ = 2.25 V
1.0
rON (Ω)
rON (Ω)
1.2
V+ = 3 V
0.8
1.0
0.6
0.4
0.4
V+ = 4.5 V
0.2
TA = 25°C
0.8
0.6
0.0
–4
TA = 85°C
1.2
TA = –40°C
0.2
–3
–2
0
–1
1
2
Input Voltage, VIN (V)
3
4
0.0
–3
5
–2
Figure 2. ron vs VIN
2
3
Figure 3. ron vs VIN (V+ = 2.5 V)
1.2
0.8
0.7
1.0
TA = 85°C
TA = 25°C
rON (Ω)
0.5
0.6
TA = –40°C
0.4
TA = 85°C
0.6
0.8
rON (Ω)
–1
0
1
Input Voltage, VIN (V)
0.4
TA = –40°C
0.3
TA = 25°C
0.2
0.2
0.1
0.0
–3
–2
0
–1
1
2
Input Voltage, VIN (V)
3
0.0
4
–1
0
Figure 4. ron vs VIN (V+ = 3.3 V)
5
200
3.0
Charge Injection (pC)
3.5
Leakage (nA)
4
Figure 5. ron vs VIN (V+ = 5 V)
4.0
NO (ON)
2.5
2.0
1.5
COM (ON)
1.0
150
100
50
0
–50
0.5
0.0
0
0.
3
0.
6
0.
9
1.
2
1.
5
1.
8
2.
1
2.
4
2.
7
3.
0
3.
3
3.
6
3.
9
4.
2
4.
5
4.
8
5.
0
–100
0.
–0.5
1
2
3
Input Voltage, VIN (V)
–40
25
Temperature (°C)
85
Figure 6. Leakage Current vs Temperature
Bias Voltage (V)
Figure 7. Charge Injection (QC) vs VCOM(V+ = 5 V)
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TYPICAL PERFORMANCE (continued)
1
0
–1
–2
–3
–4
–5
–6
–7
–8
–9
–10
–11
–12
–13
0.01
470
455
440
tON
410
Magnitude (dB)
tON/tOFF (ns)
425
395
380
365
350
tOFF
335
320
2.5
3
VCC (V)
5
Figure 8. tON and tOFF vs Supply Voltage
0.1
1
10
Frequency (MHz)
100
1000
Figure 9. Bandwidth (V+ = 2.5 V)
–11
–9
–21
–19
Magnitude (dB)
Magnitude (dB)
–1
–31
–41
–51
–29
–39
–49
–59
–61
–69
–71
–81
0.01
0.1
1
10
Frequency (MHz)
100
1000
–79
0.01
Figure 10. OFF Isolation vs Frequency
10
100
1000
Figure 11. Crosstalk (V+ = 3.3 V)
8
7
0.017
6
V+ = 2.5 V
0.015
5
0.013
I+ (µA)
THD (%)
1
Frequency (MHz)
0.019
0.011
4
3
2
0.009
0.005
0.003
1
V+ = 3.3 V
0.007
0
–1
V+ = 5 V
10
100
1000
10000
Frequency (Hz)
100000
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
V+ (V)
Figure 12. Total Harmonic Distortion vs Frequency
12
0.1
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Figure 13. Power-Supply Current vs V+
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TYPICAL PERFORMANCE (continued)
6
V+ = 5.5 V
5
V+ = 4.5 V
VOUT (V)
4
V+ = 3.6 V
V+ = 3 V
V+ = 2.7 V
V+ = 2.25 V
3
2
1
0
–1
0.0
0.2
0.4
0.6
0.8
1.0 1.2
VIN (V)
1.4
1.6
1.8
2.0
Figure 14. Control Input Thresholds
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PARAMETER MEASUREMENT INFORMATION
+
Ω
IN
+
Figure 15. ON-state Resistance (rON)
+
+
OFF-State Leakage Current
Channel OFF
VI = VIH or VIL
IN
+
Figure 16. OFF-State Leakage Current
(ICOM(OFF), INC(OFF), ICOM(PWROFF), INC(PWROFF))
14
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PARAMETER MEASUREMENT INFORMATION (continued)
ON-State Leakage Current
Channel ON
VI = VIH or VIL
+
IN
+
Figure 17. ON-State Leakage Current
(ICOM(ON), INC(ON))
VNO
NO
Capacitance
Meter
VBIAS = V+ or GND and
VI = VIH or VIL
COM COM
VBIAS
Capacitance is measured at NO,
COM, and IN inputs during ON
and OFF conditions.
Figure 18. Capacitance
(CI, CCOM(OFF), CCOM(ON), CNC(OFF), CNC(ON))
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PARAMETER MEASUREMENT INFORMATION (continued)
TEST
RL
CL
VCOM
tON
300 Ω
35 pF
V+
tOFF
300 Ω
35 pF
V+
IN
Logic
Intput
(VI)
tOFF
tON
90%
Switch
Output
(VNO)
90%
A.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
B.
CL includes probe and jig capacitance.
Figure 19. Turn-On (tON) and Turn-Off Time (tOFF)
VNC or VNO
NC or NO
NC or NO
VOH
VNC or VNO = V+/2
RL = 300 Ω
CL = 35 pF
A.
CL includes probe and jig capacitance.
B.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
Figure 20. Break-Before-Make Time (tBBM)
16
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PARAMETER MEASUREMENT INFORMATION (continued)
Channel ON: NO to COM
VI = VIH or VIL
50 Ω
Network Analyzer Setup
Source Power = 0 dBM
(632-mV P-P at 50-Ω load)
DC Bias = 350 mV
IN
Ω
+
Figure 21. Bandwidth (BW)
Channel OFF: NO to COM
VI = VIH or VIL
50 Ω
Ω
Network Analyzer Setup
Source Power = 0 dBM
(632-mV P-P at 50-Ω load)
DC Bias = 350 mV
IN
Ω
+
Figure 22. OFF Isolation (OISO)
50 Ω
VNC
NC
VNO
NO
Channel ON: NC to COM
Channel OFF: NO to COM
VI = VIH or VIL
Ω
IN
Ω
+
Network Analyzer Setup
Source Power = 0 dBM
(632-mV P-P at 50-Ω load)
DC Bias = 350 mV
Figure 23. Crosstalk (XTALK)
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PARAMETER MEASUREMENT INFORMATION (continued)
Δ
IN
xΔ
A.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
B.
CL includes probe and jig capacitance.
Figure 24. Charge Injection (QC)
Channel ON: COM to NO
VSOURCE = V+ P-P
VI = VIH or VIL
fSOURCE = 20 Hz to 20 kHz
RL = 600 Ω
CL = 50 pF
V+/2
Audio Analyzer
NO
600 Ω
COM
IN
+
600 Ω
–V+/2
A.
CL includes probe and jig capacitance.
Figure 25. Total Harmonic Distortion (THD)
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PACKAGE OPTION ADDENDUM
www.ti.com
26-Feb-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
TS5A22366YFCR
ACTIVE
DSBGA
YFC
Pins Package Eco Plan (2)
Qty
12
3000 Green (RoHS &
no Sb/Br)
Lead/Ball Finish
SNAGCU
MSL Peak Temp (3)
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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