PLL602-89D 12-27 MHz XO IC with 2 Pairs of LVDS Outputs FEATURES • • VDD 1 XIN 2 XOUT 3 GND 4 PLL602-89D • • • • • Low jitter XO for the 12MHz to 27MHz range. Integrated crystal load capacitor: no external load capacitor required. 2 pairs of LVDS outputs. 12-27 MHz fundamental crystal input. Low jitter (RMS): 2.5 ps period jitter (1 sigma). 2.5V to 3.3V operation. Available in 8-Pin SOIC package. PIN CONFIGURATION (Top View) 8 LVDS1_CLK 7 LVDS1BAR_CLK 6 LVDS2_CLK 5 LVDS2BAR_CLK (8 pin SOIC) DESCRIPTION The PLL602-89D is a high performance multiple output XO IC chip. It provides 2 pairs of LVDS outputs. The chip combines a crystal oscillator (XO) with a multiple-output buffer. It accepts a low cost fundamental parallel resonant mode crystal from 12MHz to 27MHz, which is reproduced at the outputs. The very low jitter (2.5 ps RMS period jitter) makes this chip ideal for data and telecommunication applications. BLOCK DIAGRAM LVDS1_CLK XIN XOUT LVDS1BAR_CLK Oscillator Amplifier LVDS2_CLK LVDS2BAR_CLK 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 1 PLL602-89D 12-27 MHz XO IC with 2 Pairs of LVDS Outputs PIN DESCRIPTION Name Pin Number Type Description VDD 1 P XIN 2 I XOUT 3 I GND LVDSBAR_CLK LVDS_CLK 4 5,7 6,8 P O O Power supply. Crystal input. This is the input of the crystal oscillator circuitry. The crystal should be mounted as close to the IC as possible, with minimum parasitic capacitance. Crystal output. This is the output of the crystal oscillator circuitry. The crystal should be mounted as close to the IC as possible, with minimum parasitic capacitance. Ground. LVDS complementary output. LVDS output. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL Supply Voltage Input Voltage, dc Output Voltage, dc Storage Temperature Ambient Operating Temperature* Junction Temperature Lead Temperature (soldering, 10s) ESD Protection, Human Body Model MIN. V DD VI VO TS TA TJ -0.5 -0.5 -65 -40 MAX. UNITS 4.6 V DD +0.5 V DD +0.5 150 85 125 260 2 V V V °C °C °C °C kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 2. Crystal Specifications PARAMETERS Crystal Resonator Frequency Crystal Loading Rating Recommended ESR SYMBOL CONDITIONS MIN. F XIN C L (xtal) RE Parallel Fundamental Mode 12 TYP. MAX. UNITS 27 MHz pF Ω 21.5 30 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 2 PLL602-89D 12-27 MHz XO IC with 2 Pairs of LVDS Outputs 3. General Electrical Specifications PARAMETERS SYMBOL Supply Current, Dynamic (with Loaded Outputs) Operating Voltage Short Circuit Current I DD CONDITIONS LVDS outputs loaded with 100Ω MIN. TYP. MAX. Fout = 12 MHz 15 20 Fout = 25 MHz 20 25 2.25 V DD UNITS mA 3.63 V mA ±50 4. AC Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS MHz 45 2 50 27 1.5 5 1.5 5 55 45 50 55 MIN. TYP. MAX. UNITS 25MHz 2.5 4 ps 25MHz 18 30 ps 12 Input Crystal Frequency Output Clock Rise Time Output Clock Fall Time Output Clock Duty Cycle 0.8V ~ 2.0V with 10 pF load 0.3V ~ 3.0V with 15 pF load 2.0V ~ 0.8V with 10 pF load 3.0V ~ 0.3V with 15pF load Measured @ 1.25 V (LVDS) Measured @ VDD/2 (CMOS) 2 ns % 5. Jitter Specifications PARAMETERS Period jitter RMS Peak to Peak jitter CONDITIONS With capacitive decoupling between VDD and GND. With capacitive decoupling between VDD and GND. Over 10,000 cycles. FREQUENCY 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 3 PLL602-89D 12-27 MHz XO IC with 2 Pairs of LVDS Outputs 6. LVDS Electrical Characteristics PARAMETERS SYMBOL Output Differential Voltage V DD Magnitude Change Output High Voltage Output Low Voltage Offset Voltage Offset Magnitude Change ∆V OD V OH V OL V OS Power-off Leakage I OXD Output Short Circuit Current I OSD CONDITIONS V OD R L = 100 Ω (see figure) MIN. TYP. MAX. UNITS 247 -50 355 454 50 1.6 0.9 1.125 0 ∆V OS V out = V DD or GND V DD = 0V 1.4 1.1 1.2 3 1.375 25 mV mV V V V mV ±1 ±10 uA -5.7 -8 mA 7. LVDS Switching Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Differential Clock Rise Time tr 0.2 0.7 1.0 ns Differential Clock Fall Time tf R L = 100 Ω C L = 10 pF (see figure) 0.2 0.7 1.0 ns LVDS Levels Test Circuit LVDS Switching Test Circuit OUT OUT CL = 10pF 50Ω VOD VDIFF VOS RL = 100Ω 50Ω CL = 10pF OUT OUT LVDS Transistion Time Waveform OUT 0V (Differential) OUT 80% VDIFF 80% 0V 20% 20% tR tF 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 4 PLL602-89D 12-27 MHz XO IC with 2 Pairs of LVDS Outputs PACKAGE INFORMATION 8 PIN SOIC (mm ) Narrow SOIC Symbol Min. Max. A 1.47 1.73 A1 0.10 0.25 B 0.33 0.51 C 0.19 0.25 D 4.80 4.95 E 3.80 4.00 H 5.80 6.20 L 0.38 e E H D 1.27 A A 1 1.27 BSC C L e B ORDERING INFORMATION For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL602-89D PART NUMBER SC TEMPERATURE C=COMMERCIAL I=INDUSTRIAL PACKAGE TYPE S=SOIC Order Number Marking Package Option PLL602-89DSC-R PLL602-89DSC P602-89D SC P602-89D SC SOIC - Tape and Reel SOIC - Tube PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 5