Freescale Semiconductor Technical Data Document Number: MHVIC2114R2 Rev. 4, 8/2006 Replaced by MHVIC2114NR2. There are no form, fit or function changes with this part replacement. N suffix indicates RoHS compliant part. MHVIC2114R2 The MHVIC2114R2 wideband integrated circuit is designed for base station applications. It uses Freescale’s newest High Voltage (26 to 28 Volts) LDMOS IC technology and integrates a multi - stage structure. Its wideband On - Chip matching design makes it usable from 1600 to 2600 MHz. The linearity performances cover all modulation formats for cellular applications: CDMA and W - CDMA. The device is in a PFP - 16 flat pack package that provides excellent thermal performance through a solderable backside contact. 2100 MHz, 27 V, 23 dBm SINGLE W - CDMA RF LDMOS WIDEBAND INTEGRATED POWER AMPLIFIER Final Application • Typical Two - Tone Performance: VDD = 27 Volts, IDQ1 = 95 mA, IDQ2 = 204 mA, IDQ3 = 111 mA, Pout = 15 Watts PEP, Full Frequency Band Power Gain — 32 dB IMD — - 30 dBc Driver Application • Typical Single - Channel W - CDMA Performance: VDD = 27 Volts, IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA, Pout = 23 dBm, 2110 - 2170 MHz, 3GPP Test Model 1, Measured in a 3.84 MHz BW @ 5 MHz Offset, 64 DTCH, Peak/Avg. = 8.5 dB @ 0.01% Probability on CCDF. Power Gain — 32 dB ACPR — - 58 dBc • P1dB = 14 Watts, Gain Flatness = 0.2 dB from 2110 to 2170 MHz • Capable of Handling 3:1 VSWR, @ 27 Vdc, 2140 MHz, 15 Watts CW Output Power • Characterized with Series Equivalent Large - Signal Impedance Parameters and Common Source Scattering Parameters • On - Chip Matching (50 Ohm Input, DC Blocked, >5 Ohm Output) • Integrated Temperature Compensation with Enable/Disable Function • Integrated ESD Protection • In Tape and Reel. R2 Suffix = 1,500 Units per 16 mm, 13 inch Reel. VGS3 VGS2 VGS1 Quiescent Current Temperature Compensation RFin IC VDS1 VDS2 VDS3/RFout 16 1 CASE 978 - 03 PFP - 16 N.C. 1 16 VGS3 2 15 N.C. VDS3/RFout VGS2 3 14 VDS3/RFout VGS1 4 13 VDS3/RFout RFin 5 12 VDS3/RFout RFin 6 11 VDS3/RFout VDS1 VDS2 7 8 10 9 VDS3/RFout N.C. ARCHIVE INFORMATION ARCHIVE INFORMATION RF LDMOS Wideband Integrated Power Amplifier 3 Stages IC (Top View) Note: Exposed backside flag is source terminal for transistors. Figure 1. Block Diagram Figure 2. Pin Connections NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. © Freescale Semiconductor, Inc., 2006. All rights reserved. RF Device Data Freescale Semiconductor MHVIC2114R2 1 Table 1. Maximum Ratings Rating Symbol Value Unit Drain - Source Voltage VDSS - 0.5, +65 Vdc Gate - Source Voltage VGS - 0.5, +15 Vdc Storage Temperature Range Tstg - 65 to +150 °C Operating Junction Temperature TJ 150 °C Input Power Pin 5 dBm Symbol Value Table 2. Thermal Characteristics ARCHIVE INFORMATION Driver Application (Pout = +0.2 W CW) Unit RθJC °C/W Stage 1, 27 Vdc, IDQ1 = 96 mA Stage 2, 27 Vdc, IDQ2 = 204 mA Stage 3, 27 Vdc, IDQ3 = 111 mA 11.5 7.52 5.52 Table 3. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD22 - A114) 0 (Minimum) Machine Model (per EIA/JESD22 - A115) A (Minimum) Charge Device Model (per JESD22 - C101) II (Minimum) Table 4. Moisture Sensitivity Level Test Methodology Rating Package Peak Temperature Unit 3 240 °C Per JESD 22 - A113, IPC/JEDEC J - STD - 020 Table 5. Electrical Characteristics (TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit W - CDMA Characteristics (In Freescale Test Fixture, 50 ohm system) VDD = 27 Vdc, IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA, Pout = 23 dBm, 2110 - 2170 MHz, Single - Carrier W - CDMA, 3.84 MHz Channel Bandwidth Carrier. ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset. Peak/Avg. = 8.5 dB @ 0.01% Probability on CCDF. Power Gain Gps 29 32 36 dB Gain Flatness GF — 0.3 0.5 dB Input Return Loss IRL — - 13 - 10 dB Adjacent Channel Power Ratio ACPR — - 60 - 57 dBc Group Delay Delay — 1.7 — ns — — 0.2 — ° Phase Linearity ARCHIVE INFORMATION Characteristic Thermal Resistance, Junction to Case MHVIC2114R2 2 RF Device Data Freescale Semiconductor 1 16 VDS3 VGS3 + C1 2 C17 VGS2 3 + R2 C5 15 C2 13 + C14 C4 5 ARCHIVE INFORMATION + C13 Z3 RF OUTPUT C9 11 VDS1 C21 Z5 12 6 VDS2 C15 Z2 Z1 + C20 Z4 4 RF INPUT C19 14 C3 VGS1 R1 C18 + C8 C7 8 C11 C22 10 C6 + C12 Quiescent Current Temperature Compensation 7 + C16 9 C10 Z1 Z2 Z3 Z4 Z5 PCB 0.323″ x .055″ 50 Ω Microstrip 0.196″ x .176″ Microstrip 0.286″ x .055″ Microstrip 0.150″ x .018″ Microstrip 0.363″ x .055″ Microstrip Arlon, 0.021″, εr = 2.55 Figure 3. MHVIC2114R2 Test Circuit Schematic Table 6. MHVIC2114R2 Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1, C5, C8, C12, C14, C19 1 μF Tantalum Chip Capacitors TAJA105K035R Kemet C2, C3, C4, C7, C11, C18 0.01 μF Chip Capacitors 0805C103K5RACTR Vishay C6, C10, C17 6.8 pF Chip Capacitors (ACCU - P) AVX08051J6R8BBT AVX C9 1.5 pF Chip Capacitor (ACCU - P) AVX08051J1R5BBT AVX C15, C16 2.2 pF Chip Capacitors (ACCU - P) AVX08051J2R2BBT AVX C22 1.0 pF Chip Capacitor (ACCU - P) AVX08051J1R0BBT AVX C13, C20, C21 330 μF Electrolytic Capacitors MCR35V337M10X16 Multicomp R1, R2, R3 1 kW Chip Resistors (0805) P1.00KCCT - ND Panasonic ARCHIVE INFORMATION R3 + MHVIC2114R2 RF Device Data Freescale Semiconductor 3 VGS1 VGS2 R1 R2 R3 VGS3 C14 C5 C2 C1 C3 C4 C15 C22 C9 MHVIC2114R2 C6 Rev 1 C10 C17 C18 C19 C11 C12 C7 VDD2 C8 VDD3 VDD1 C21 C13 C20 Freescale has begun the transition of marking Printed Circuit Boards (PCBs) with the Freescale Semiconductor signature/logo. PCBs may have either Motorola or Freescale markings during the transition period. These changes will have no impact on form, fit or function of the current product. Figure 4. MHVIC2114R2 Test Circuit Component Layout ARCHIVE INFORMATION ARCHIVE INFORMATION C16 MHVIC2114R2 4 RF Device Data Freescale Semiconductor TYPICAL CHARACTERISTICS 0 S21 30 2.2 2.1 −5 TC = 85_C 2.0 10 −15 S11 0 −20 −10 −25 S11 (dB) −10 DELAY, (nSEC) S21 (dB) 20 1.9 1.8 1.7 25_C 1.6 1.5 −30_C 1.4 −20 −30 VDD = 27 Vdc, Pout = 23 dBm CW 1.3 IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA −30 −35 1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000 2110 2120 2130 2140 2150 2160 f, FEQUENCY (MHz) f, FREQUENCY (MHz) Figure 5. Broadband Frequency Response Figure 6. Delay versus Frequency 2170 2180 2170 2180 −18 36 TC = −30_C 32 25_C 28 85_C 24 VDD = 27 Vdc, Pout = 23 dBm CW 20 2100 2120 2130 2140 VDD = 27 Vdc, Pout = 23 dBm CW −17 IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA −16 TC = 85_C −15 25_C −14 −13 −12 −30_C −11 IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA 2110 IRL, INPUT RETURN LOSS (dB) G ps , POWER GAIN (dB) IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA 1.2 2100 40 2150 2160 2170 2180 −10 2100 2110 2120 2130 2140 2150 2160 f, FREQUENCY (MHz) f, FREQUENCY, (MHz) Figure 7. Power Gain versus Frequency Figure 8. Input Return Loss versus Frequency 40 −10 38 36 −20 TC = −30_C 34 TC = −30_C 25_C 32 30 S21 PHASE(_) G ps , POWER GAIN (dB) ARCHIVE INFORMATION VDD = 27 Vdc, Pout = 23 dBm CW 85_C 28 ARCHIVE INFORMATION 40 −30 25_C 40 26 24 85_C −50 VDD = 27 Vdc, f = 2140 MHz VDD = 27 Vdc, f = 2140 MHz 22 IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA 20 15 17.5 20 22.5 25 27.5 30 32.5 IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA −60 35 37.5 40 15 20 25 30 35 40 Pout, OUTPUT POWER (dBm) Pout, OUTPUT POWER (dBm) Figure 9. Power Gain versus Output Power Figure 10. S21 Phase versus Output Power 45 MHVIC2114R2 RF Device Data Freescale Semiconductor 5 VDD = 27 Vdc 3GPP Test Model 1 64 DPCH −35 −40 −45 2110 MHz −50 2170 MHz −55 2140 MHz −60 −65 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 −20 −30 VDD = 27 Vdc Pout = 23 dBm Two−Tone Avg. Tone Spacing = 100 kHz IDQ3 = 100 mA −40 111 mA 122 mA 3rd Order −50 122 mA −60 100 mA 111 mA −70 5th Order −80 −90 2000 2050 2100 2150 2200 2250 Pout, OUTPUT POWER (dBm) f, FREQUENCY (MHz) Figure 11. W - CDMA ACPR versus Output Power Figure 12. Two - Tone Intermodulation Distortion Products versus Frequency −10 −20 3rd Order −30 5th Order −40 −50 7th Order −60 VDD = 27 Vdc, f = 2140 MHz Pout = 7.5 W, Two−Tone Avg. IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA −80 0 10 20 30 40 50 60 70 80 90 100 110 VBIAS1 VBIAS2 VDD = 27 Vdc, f = 2140 MHz R1 = R2 = R3 = 1000 Ohms VBIAS3 −20 0 TONE SPACING (MHz) 40 2 4.4 IGS1 & IGS2 4.3 4.2 1.8 1.6 1.4 4.1 1.2 3.9 VGS3 VDD = 27 Vdc, f = 2140 MHz R1 = R2 = R3 = 1000 Ohms VGS1 & VGS2 1 0.8 3.8 0.6 3.7 0.4 3.6 IGS3 0.2 3.5 −40 −30 −20 −10 80 Figure 14. Fixture Bias versus Temperature 4.5 4 60 T, TEMPERATURE (C) Figure 13. Two - Tone Intermodulation Distortion Products versus Tone Spacing VGS, IC GATE BIAS VOLTAGE (V) 20 IGS, GATE BIAS CURRENT (A) −70 7 6.75 6.5 6.25 6 5.75 5.5 5.25 5 4.75 4.5 4.25 4 3.75 3.5 3.25 3 −40 2300 100 ARCHIVE INFORMATION IMD, INTERMODULATION DISTORTION (dBc) −30 VBIAS, FIXTURE BIAS VOLTAGE (V) IMD, INTERMODULATION DISTORTION (dBc) ARCHIVE INFORMATION ACPR, ADJACENT CHANNEL POWER RATIO (dBc) TYPICAL CHARACTERISTICS 0 0 10 20 30 40 50 60 70 80 90 100 T, TEMPERATURE (C) Figure 15. Gate Bias versus Temperature MHVIC2114R2 6 RF Device Data Freescale Semiconductor f = 2170 MHz Zload f = 2110 MHz f = 2110 MHz Zin ARCHIVE INFORMATION Zo = 50 Ω VDD = 27 Vdc, IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA, Pout = 23 dBm Zin f MHz Zin Ω Zload Ω 2110 57.9 - j12.1 1.1 + j2.7 2140 50.6 - j18.9 1.1 + j3.4 2170 42.3 - j21.1 1.2 + j3.7 = Device input impedance as measured from gate to ground. Zload = Test circuit impedance as measured from drain to ground. Output Matching Network Device Under Test Z in ARCHIVE INFORMATION f = 2170 MHz Z load Figure 16. Series Equivalent Input and Load Impedance MHVIC2114R2 RF Device Data Freescale Semiconductor 7 PACKAGE DIMENSIONS h X 45 _ A 1 14 x e 16 D e/2 D1 8 9 E1 8X ARCHIVE INFORMATION bbb M B BOTTOM VIEW E C B S ÉÉ ÇÇ ÇÇ ÉÉ b1 Y c A A2 c1 b DATUM PLANE SEATING PLANE H M ccc C q W GAUGE PLANE W L 1.000 0.039 DETAIL Y C A SECT W - W L1 C aaa A1 CASE 978 - 03 ISSUE C PFP- 16 S NOTES: 1. CONTROLLING DIMENSION: MILLIMETER. 2. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DATUM PLANE −H− IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 PER SIDE. DIMENSIONS D AND E1 DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE −H−. 5. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION IS 0.127 TOTAL IN EXCESS OF THE b DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. DATUMS −A− AND −B− TO BE DETERMINED AT DATUM PLANE −H−. DIM A A1 A2 D D1 E E1 E2 L L1 b b1 c c1 e h q aaa bbb ccc MILLIMETERS MIN MAX 2.000 2.300 0.025 0.100 1.950 2.100 6.950 7.100 4.372 5.180 8.850 9.150 6.950 7.100 4.372 5.180 0.466 0.720 0.250 BSC 0.300 0.432 0.300 0.375 0.180 0.279 0.180 0.230 0.800 BSC −−− 0.600 0_ 7_ 0.200 0.200 0.100 ARCHIVE INFORMATION E2 MHVIC2114R2 8 RF Device Data Freescale Semiconductor Home Page: www.freescale.com E - mail: [email protected] USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. 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ARCHIVE INFORMATION ARCHIVE INFORMATION How to Reach Us: Freescalet and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006. All rights reserved. RoHS-compliant and/or Pb-free versions of Freescale products have the functionality and electrical characteristics of their non-RoHS-compliant and/or non-Pb-free counterparts. For further information, see http://www.freescale.com or contact your Freescale sales representative. For information on Freescale’s Environmental Products program, go to http://www.freescale.com/epp. MHVIC2114R2 Document Number:Data MHVIC2114R2 RF Device Rev. 4, 8/2006 Freescale Semiconductor 9