FAIRCHILD HCPL0600V

HCPL0600, HCPL0601, HCPL0611,
HCPL0630, HCPL0631, HCPL0661
High Speed-10 MBit/s Logic Gate Optocouplers
Single Channel: HCPL0600, HCPL0601, HCPL0611
Dual Channel: HCPL0630, HCPL0631, HCPL0661
■ Switching power supplies
■ Pulse transformer replacement
■ Computer-peripheral interface
Features
■
■
■
■
■
■
■
■
■
Compact SO8 package
Very high speed-10 MBit/s
Superior CMR
Fan-out of 8 over -40°C to +85°C
Logic gate output
Strobable output (single channel devices)
Wired OR-open collector
U.L. recognized (File # E90700)
VDE approval pending
Description
The HCPL06XX optocouplers consist of an AlGaAS LED, optically coupled to a very high speed integrated photo-detector
logic gate with a strobable output (single channel devices). The
devices are housed in a compact small-outline package. This
output features an open collector, thereby permitting wired OR
outputs. The HCPL0600 and HCPL0601 output consists of
bipolar transistors on a bipolar process while the HCPL0611,
HCPL0630 and HCPL0631 output consists of bipolar transistors
on a CMOS process for reduced power consumption. The coupled parameters are guaranteed over the temperature range of 40°C to +85°C. A maximum input signal of 5 mA will provide a
minimum output sink current of 13 mA (fan out of 8). An internal
noise shield provides superior common mode rejection.
Applications
■
■
■
■
Ground loop elimination
LSTTL to TTL, LSTTL or 5-volt CMOS
Line receiver, data transmission
Data multiplexing
Package Dimensions
SEATING PLANE
0.164 (4.16)
0.144 (3.66)
Pin 1
0.202 (5.13)
0.182 (4.63)
0.019 (0.48)
0.010 (0.25)
0.006 (0.16)
0.143 (3.63)
0.123 (3.13)
0.021 (0.53)
0.011 (0.28)
0.008 (0.20)
0.003 (0.08)
0.244 (6.19)
0.224 (5.69)
0.050 (1.27)
TYP
Lead Coplanarity : 0.004 (0.10) MAX
NOTE
All dimensions are in inches (millimeters)
©2005 Fairchild Semiconductor Corporation
1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
July 2005
+ 1
8 VCC
V
F1
+ 2
7 VE
+ 2
_ 2
6 VO
_
7 V01
VF
VF
_
7 VE
_
6 VO
3
3
V
N/C 4
5 GND
N/C 4
Single-channel circuit
drawing (HCPL0600 and
HCPL0601)
5 GND
Single-channel circuit
drawing (HCPL0611)
3
6 V02
F2
+ 4
5 GND
Dual-channel circuit
drawing (HCPL0630, HCPL0631
and HCPL0661)
TRUTH TABLE (Positive Logic)
Input
Enable
Output
H
H
L
L
H
H
H
L
H
L
L
H
H*
NC*
L*
L*
NC*
H*
*Dual channel devices or single channel devices with pin 7 not connected.
A 0.1 µF bypass capacitor must be connected between pins 8 and 5. (See note 1)
2
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
8 VCC
N/C 1
8 VCC
N/C 1
Parameter
Symbol
Value
Units
Storage Temperature
TSTG
-40 to +125
°C
Operating Temperature
TOPR
-40 to +85
°C
IF
50
mA
VE
5.5
V
VR
5.0
V
PI
45
mW
VCC
(1 minute max)
7.0
V
EMITTER
Single Channel
DC/Average Forward Input Current (each channel)
Enable Input Voltage
Not to exceed VCC by more than 500 mV
Dual Channel
Single Channel
Reverse Input Voltage (each channel)
Power Dissipation
Single Channel
Dual Channel
DETECTOR
Supply Voltage
Output Current (each channel)
IO
50
mA
Output Voltage (each channel)
VO
7.0
V
PO
85
mW
Symbol
Min
Max
Units
IFL
0
250
µA
Input Current, High Level
IFH
*6.3
15
mA
Supply Voltage, Output
VCC
4.5
5.5
V
Collector Output Power Dissipation
Single Channel
Dual Channel
Recommended Operating Conditions
Parameter
Input Current, Low Level
Enable Voltage, Low Level
VEL
0
0.8
V
Enable Voltage, High Level
VEH
2.0
VCC
V
Operating Temperature
TA
-40
+85
°C
Fan Out (TTL load)
N
8
TTL Loads
Output Pull-up
RL
4K
Ω
330
*6.3 mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0 mA or less
3
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Absolute Maximum Ratings (No derating required up to 85°C)
Parameter
Test Conditions Symbol Min Typ** Max
EMITTER
(IF = 10 mA)
Input Forward Voltage
Input Reverse Breakdown Voltage
Input Capacitance
(IR = 10 µA)
BVR
CIN
(IF = 10 mA)
(VE = 0.5 V)
Single Channel
High Level Supply Current
(IF = 0 mA, VCC = 5.5 V)
Dual Channel
Low Level Supply Current
(VE = 0.5 V)
Single Channel
Low Level Enable Current
1.8
(IF = 10 mA, VCC = 5.5V)
Dual Channel
(VCC = 5.5 V, VE = 0.5 V)
Single Channel
V
1.75
(VF = 0, f = 1 MHz)
Input Diode Temperature Coefficient
DETECTOR
VF
TA =25°C
Unit
5.0
V
pF
∆VF/∆TA
mV/°C
ICCH
10
mA
15
ICCL
13
mA
IEL
-1.6
mA
-1.6
mA
21
High Level Enable Current
(VCC = 5.5 V, VE = 2.0 V)
Single Channel
IEH
High Level Enable Voltage
(VCC = 5.5 V, IF = 10 mA)
Single Channel
VEH
Low Level Enable Voltage
(VCC = 5.5 V, IF = 10 mA)(Note 2)
Single Channel
VEL
2.0
V
0.8
V
Switching Characteristics (TA = -40°C to +85°C, VCC = 5 V, IF = 7.5 mA Unless otherwise specified.)
AC Characteristics
Propagation Delay Time
to Output High Level
Propagation Delay Time
to Output Low Level
Test Conditions Device
(Note 3)
(TA =25°C)
All
Symbol
Min
TPLH
20
Typ Max Unit
75
(RL = 350Ω, CL = 15 pF) (Fig. 12)
(Note 4)
(TA =25°C)
ns
100
All
TPHL
25
75
(RL = 350Ω, CL = 15 pF) (Fig. 12)
ns
100
(RL = 350Ω, CL = 15 pF) (Fig. 12)
All
|TPHL-TPLH|
Output Rise Time (10-90%)
(RL = 350Ω, CL = 15 pF)(Note 5) (Fig. 12)
All
tr
50
ns
Output Fall Time (90-10%)
(RL = 350Ω, CL = 15 pF)(Note 6) (Fig. 12)
All
tf
12
ns
Enable Propagation Delay
Time to Output High Level
(IF = 7.5 mA, VEH = 3.5 V) HCPL0600
(RL = 350Ω, CL = 15 pF) (Note 7) (Fig. 13) HCPL0601
HCPL0611
tELH
20
ns
Enable Propagation Delay
Time to Output Low Level
(IF = 7.5 mA, VEH = 3.5 V) HCPL0600
(RL = 350Ω, CL = 15 pF) (Note 8) (Fig. 13) HCPL0601
HCPL0611
tEHL
20
ns
Pulse Width Distortion
Common Mode
Transient Immunity
(at Output High Level)
(RL = 350Ω) (TA =25°C)
(IF = 0 mA, VOH (Min.) =
2.0 V) (Note 9)(Fig. 14)
|VCM| = 10 V HCPL0600
HCPL0630
|CMH|
|VCM| = 50 V HCPL0601
HCPL0631
(RL = 350Ω) (TA =25°C)
(IF = 7.5 mA, VOL (Max.) =
0.8 V) (Note 10)(Fig. 14)
|VCM| = 10 V HCPL0600
HCPL0630
|VCM| = 50 V HCPL0601
HCPL0631
|VCM| = 1,000 V HCPL0611
HCPL0661
4
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
ns
V/µs
5000
|VCM| = 1,000 V HCPL0611
HCPL0661
Common Mode
Transient Immunity
(at Output Low Level)
35
25,000
|CMH|
V/µs
5000
25,000
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Electrical Characteristics (TA = -40°C to +85°C Unless otherwise specified.)
Individual Component Characteristics
DC Characteristics
Test Conditions Symbol
Min
Typ**
Max
Unit
High Level Output Current
(VCC = 5.5 V, VO = 5.5 V)
(IF = 250 µA, VE = 2.0 V) (Note 2)
IOH
100
µA
Low Level Output Voltage
(VCC = 5.5 V, IF = 5 mA)
(VE = 2.0 V, IOL = 13 mA) (Note 2)
VOL
0.6
V
(VCC = 5.5 V, VO = 0.6 V,
VE = 2.0 V, IOL = 13 mA)
IFT
5
mA
Max
Unit
1.0*
µA
Input Threshold Current
Isolation Characteristics (TA = -40°C to +85°C Unless otherwise specified.)
Characteristics
Input-Output
Insulation Leakage Current
Withstand Insulation Test Voltage
Resistance (Input to Output)
Capacitance (Input to Output)
Test Conditions
(Relative humidity = 45%)
(TA = 25°C, t = 5 s)
(VI-O = 3000 VDC)
(Note 11)
Symbol
Min
Typ**
II-O
(RH < 50%, TA = 25°C)
(Note 11) ( t = 1 min.)
VISO
2500
VRMS
(VI-O = 500 V) (Note 11)
RI-O
1012
Ω
(f = 1 MHz) (Note 11)
CI-O
0.6
pF
** All typical values are at VCC = 5 V, TA = 25°C
NOTES
1. The VCC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic or solid
tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package V CC and
GND pins of each device.
2. Enable Input - No pull up resistor required as the device has an internal pull up resistor.
3. tPLH - Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5V
level on the LOW to HIGH transition of the output voltage pulse.
4. tPHL - Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5V
level on the HIGH to LOW transition of the output voltage pulse.
5. tr - Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
6. tf - Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
7. tELH - Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input voltage pulse to
the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
8. tEHL - Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input voltage pulse to
the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
9. CMH - The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., V OUT
> 2.0 V). Measured in volts per microsecond (V/µs).
10. CML - The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state (i.e.,
VOUT < 0.8 V). Measured in volts per microsecond (V/µs).
11. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together.
5
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Transfer Characteristics (TA = -40°C to +85°C Unless otherwise specified.)
Fig. 1 Forward Current vs. Input Forward Voltage
Fig. 2 Output Voltage vs. Forward Current
100
6
5
10
Vo - OUTPUT VOLTAGE (V)
IF - FORWARD CURRENT (mA)
TA = 25°C
VCC = 5V
TA = 85°C
TA = -40°C
TA = 70°C
1
TA = 25°C
TA = 0°C
0.1
0.01
4
RL = 350Ω
3
RL = 1kΩ
2
1
0
0.001
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
0
1.7
VF - FORWARD VOLTAGE (V)
2
3
4
5
IF - FORWARD INPUT CURRENT (mA)
Fig. 4 High Level Output Current vs. Temperature
Fig. 3 Input Threshold Current vs. Temperature
16
IOH - HIGH LEVEL OUTPUT CURRENT (µA)
5
ITH - INPUT THRESHOLD CURRENT (mA)
1
VCC = 5V
VO = 0.6V
4
3
RL = 350Ω
2
RL = 1KΩ
1
14
12
10
8
6
4
VO = VCC = 5.5V
VE = 2V
IF = 250 µA
2
0
0
-40
-20
0
20
40
60
80
100
-40
TA - TEMPERATURE (˚C)
6
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
-20
0
20
40
60
80
100
TA - TEMPERATURE (˚C)
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0600 and HCPL0601 only)
Fig. 5 Low Level Output Voltage vs. Temperature
Fig. 6 Low Level Output Current vs. Temperature
60
0.8
CC
= 5.5V
IOL - LOW LEVEL OUTPUT CURRENT (mA)
VOL - LOW LEVEL OUTPUT VOLTAGE (V)
V
VE = 2V
IF = 5mA
0.7
0.6
0.5
IO = 12.8mA
0.4
IO = 16mA
0.3
IO = 6.4mA
0.2
IO = 9.6mA
0.1
V
CC
= 5V
VE = 2V
VOL = 0.6V
55
50
IF = 10-15mA
45
40
IF = 5mA
35
30
25
20
0.0
-40
-20
0
20
40
60
80
-40
100
-20
0
Fig. 7 Propagation Delay vs. Temperature
40
60
80
100
Fig. 8 Propagation Delay vs. Pulse Input Current
100
90
V
CC
= 5V
V
TP - PROPAGATION DELAY (ns)
IF = 7.5mA
90
TP - PROPAGATION DELAY (ns)
20
TA - TEMPERATURE (˚C)
TA - TEMPERATURE (˚C)
80
tPLH
RL = 1kΩ
70
60
tPLH
RL = 350Ω
50
tPHL
RL = 350Ω & 1kΩ
40
CC
= 5V
TA = 25°C
80
tPLH
RL = 1kΩ
70
60
tPLH
RL = 350Ω
50
40
tPHL
RL = 350Ω & 1kΩ
30
30
20
20
-40
-20
0
20
40
60
80
100
TA - TEMPERATURE (˚C)
7
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
5
7
9
11
13
15
IF - PULSE INPUT CURRENT (mA)
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0600 and HCPL0601 only)
Fig. 9 Typical Enable Propagation Delay vs. Temparature
Fig. 10 Typical Rise and Fall Time vs. Temperature
240
90
CC
= 5V
V
70
CC
= 5V
IF = 7.5mA
200
tELH
RL = 1kΩ
tf - FALL TIME (ns)
tE - ENABLE PROPAGATION DELAY (ns)
V
VEH = 3V
VEL = 0V
IF = 7.5mA
80
60
50
tELH
RL = 350Ω
40
30
tr
RL = 1kΩ
160
120
80
tr
RL = 350Ω
tEHL
RL = 350Ω & 1kΩ
20
40
tf
RL = 350Ω & 1kΩ
10
0
0
-40
-20
0
20
40
60
80
100
-40
-20
TA - TEMPERATURE (˚C)
0
20
40
60
80
100
TA - TEMPERATURE (˚C)
Fig. 11 Typical Pulse Width Distortion vs. Temperature
40
PWD - PULSE WIDTH DISTORTION (ns)
V
CC
= 5V
IF = 7.5mA
35
30
25
RL = 1kΩ
20
15
10
RL = 350Ω
5
0
-40
-20
0
20
40
60
80
100
TA - TEMPERATURE (˚C)
8
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0600 and HCPL0601 only)
Fig. 13 Input Threshold Current vs.
Ambient Temperature (HCPL0611 only)
Fig. 12 Input Forward Current vs. Forward Voltage
2.5
ITH - INPUT THRESHOLD CURRENT (mA)
IF - FORWARD CURRENT (mA)
100
10
TA = 100°C
1
TA = -40°C
TA = 85°C
0.1
TA = 0°C
TA = 25°C
0.01
0.001
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
VCC = 5.5V
VO = 0.6V
VE = 2V
2.0
RL = 350Ω
1.5
RL = 1kΩ
1.0
RL = 4kΩ
0.5
0.0
-40
1.7
-20
VF - FORWARD VOLTAGE (V)
Fig. 14 Input Threshold Current vs. Ambient Temperature
(HCPL0630, HCPL0631 and HCPL0661 only)
IOH - HIGH LEVEL OUTPUT CURRENT (nA)
ITH - INPUT THRESHOLD CURRENT (mA)
2.0
RL = 350Ω
1.5
1.0
RL = 1kΩ
RL = 4kΩ
0.5
60
80
100
16
VO = VCC = 5.5V
VE = 2V (Single Channel Only)
IF = 250 µA
12
8
4
0
0.0
-40
-20
0
20
40
60
80
-40
100
-20
0
20
40
60
80
100
TA - AMBIENT TEMPERATURE (°C)
TA - AMBIENT TEMPERATURE (°C)
Fig. 17 Low Level Output Voltage vs.
Ambient Temperature
Fig. 16 Low Level Output Current vs.
Ambient Temperature
40
0.6
V
CC
= 5.5V
VOL - LOW LEVEL OUTPUT VOLTAGE (V)
IOL - LOW LEVEL OUTPUT CURRENT (mA)
40
20
VCC = 5.5V
VO = 0.6V
VE = 2V (Single Channel Only)
VOL = 0.6V
IF = 5 - 15mA
30
25
20
15
10
-40
20
Fig. 15 High Level Output Current vs.
Ambient Temperature
2.5
35
0
TA - AMBIENT TEMPERATURE (°C)
-20
0
20
40
60
80
100
V
0.5
CC
= 5.5V
VE = 2V (Single Channel Only)
IF = 5mA
0.4
IO = 16mA
IO = 12.8mA
0.3
0.2
IO = 6.4mA
IO = 9.6mA
0.1
0.0
-40
TA - AMBIENT TEMPERATURE (°C)
9
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
-20
0
20
40
60
80
100
TA - AMBIENT TEMPERATURE (°C)
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0611, HCPL0630, HCPL0631 and HCPL0661 only)
Fig. 19 Propagation Delay vs.
Ambient Temperature
Fig. 18 Pulse Width Distortion vs.
Ambient Temperature
120
70
60
CC
= 5V
V
IF = 7.5mA
50
TP - PROPAGATION DELAY (ns)
PWD - PULSE WIDTH DISTORTION (ns)
V
RL = 4kΩ
40
30
20
RL = 1kΩ
100
RL = 350Ω
10
0
CC
= 5V
IF = 7.5mA
80
tPLH
tPLH
RL = 4kΩ
RL = 1kΩ
60
40
tPLH
RL = 350Ω
tPHL
RL = 350Ω, 1kΩ, 4kΩ
20
0
-40
-20
0
20
40
60
80
100
-40
-20
TA - AMBIENT TEMPERATURE (°C)
0
20
40
60
80
100
TA - AMBIENT TEMPERATURE (°C)
Fig. 20 Rise and Fall Times vs.
Ambient Temperature
7
350
V
300
CC
= 5V
IF = 7.5mA
6
250
5
200
4
3
150
tf - RL = 350Ω, 1kΩ, 4kΩ
tf - FALL TIME (ns)
tr - RISE TIME (ns)
tr - RL = 4kΩ
2
100
tr - RL = 1kΩ
1
50
tr - RL = 350Ω
0
0
-40
-20
0
20
40
60
80
100
TA - AMBIENT TEMPERATURE (°C)
10
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0611, HCPL0630, HCPL0631 and HCPL0661 only)
Pulse Gen.
ZO = 50 Ω
tf = tr = 5 ns
+5V
I F = 7.5 mA
Dual Channel
IF
1
Input
Monitor
(IF)
47Ω
VCC
8
2
.1µf
7
Bypass
3
6
4
GND 5
RL
Output
(VO)
1
VCC 8
2
7
3
6
Output VO
Monitoring
Node
0.1µF
Bypass
RM
CL
t PHL
RL
Input
Monitoring
Node
CL*
4
GND
I F = 3.75 mA
Input
(I F)
+5 V
5
tPLH
Output
(VO )
1.5 V
90%
Output
(VO )
10%
tf
Test Circuit for HCPL0600,
HCPL0601 and HCPL0611
tr
Test Circuit for HCPL0630,
HCPL0631 and HCPL0661
Fig. 21 Test Circuit and Waveforms for tPLH, tPHL, tr and tf.
Pulse
Generator
tr = 5ns
Z O = 50Ω
Input
Monitor
(V E)
+5V
3.0 V
Input
(VE )
VCC
1
8
2
7
1.5 V
t EHL
7.5 mA
3
.1µf
bypass
t ELH
Output
(VO )
RL
1.5 V
Output
(VO )
6
CL
4
GND
5
Fig. 22 Test Circuit tEHL and tELH.
11
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Pulse Gen.
tf = tr = 5 ns
ZO = 50 Ω
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
VCC
IF
A
1
8
2
7
3
6
+5V
0.1µf
bypass
350Ω
B
VFF
4
GND
Output
(VO)
5
VCM
Pulse Gen
Test Circuit for HCPL0600, and HCPL0601
Peak
VCM
0V
CM H
5V
Switching Pos. (A), IF = 0
VO
VO (Min)
VO (Max)
VO
0.5 V
Switching Pos. (B), IF = 7.5 mA
CM L
Fig. 23 Test Circuit Common Mode Transient Immunity
(HCPL0600 and HCPL0601)
12
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
www.fairchildsemi.com
VCC
1
Dual Channel
+3.3V
8
B
A
IF
A
2
7
3
6
4
5
0.1µf
bypass
GND
+3.3V
VCC 8
RL
350Ω
2
7
3
6
VFF
B
VFF
1
Output
(VO)
4
GND
0.1µF
Bypass
Output VO
Monitoring
Node
5
VCM
+
–
Pulse
Generator
ZO = 50 Ω
VCM
Pulse Gen
Test Circuit for HCPL0611
Test Circuit for HCPL0630, HCPL0631 and HCPL0661
VCM
0V
Peak
CM H
3.3V
Switching Pos. (A), IF = 0
VO
VO (Min)
VO (Max)
VO
0.5 V
Switching Pos. (B), IF = 7.5 mA
CM L
Fig. 24 Test Circuit Common Mode Transient Immunity
(HCPL0611, HCPL0630, HCPL0631 and HCPL0661)
13
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
IF
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
8-Pin Small Outline
0.024 (0.61)
0.060 (1.52)
0.275 (6.99)
0.155 (3.94)
0.050 (1.27)
14
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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Option
Order Entry Identifier
Description
No Suffix
HCPL0600
Shipped in tubes (50 units per tube)
V
HCPL0600V
VDE0884 (pending approval)
R1
HCPL0600R1
Tape and Reel (500 units per reel)
R1V
HCPL0600R1V
VDE0884 (pending approval), Tape and Reel (500 units per reel)
R2
HCPL0600R2
Tape and Reel (2500 units per reel)
R2V
HCPL0600R2V
VDE0884 (pending approval), Tape and Reel (2500 units per reel)
Marking Information
1
0600
V
3
X YY S
4
2
6
5
Definitions
1
Fairchild logo
2
Device number
3
VDE mark (Note: Only appears on parts ordered with VDE option –
See order entry table)
4
One digit year code, e.g., ‘3’
5
Two digit work week ranging from ‘01’ to ‘53’
6
Assembly package code
15
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Ordering Information
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Carrier Tape Specifications
8.0 ± 0.10
3.50 ± 0.20
2.0 ± 0.05
Ø1.5 MIN
4.0 ± 0.10
0.30 MAX
1.75 ± 0.10
5.5 ± 0.05
12.0 ± 0.3
8.3 ± 0.10
5.20 ± 0.20
Ø1.5 ± 0.1/-0
6.40 ± 0.20
0.1 MAX
User Direction of Feed
Reflow Profile
300
260°C
280
260
>245°C = 42 Sec
240
220
200
180
°C
Time above
183°C = 90 Sec
160
140
120
1.822°C/Sec Ramp up rate
100
80
60
40
33 Sec
20
0
0
60
120
180
270
360
Time (s)
16
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
FAST
ActiveArray™
FASTr™
Bottomless™
FPS™
Build it Now™
FRFET™
CoolFET™
GlobalOptoisolator™
CROSSVOLT™ GTO™
DOME™
HiSeC™
EcoSPARK™
I2C™
2
E CMOS™
i-Lo™
EnSigna™
ImpliedDisconnect™
FACT™
IntelliMAX™
FACT Quiet Series™
Across the board. Around the world.™
The Power Franchise
Programmable Active Droop™
ISOPLANAR™
LittleFET™
MICROCOUPLER™
MicroFET™
MicroPak™
MICROWIRE™
MSX™
MSXPro™
OCX™
OCXPro™
OPTOLOGIC
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerEdge™
PowerSaver™
PowerTrench
QFET
QS™
QT Optoelectronics™
Quiet Series™
RapidConfigure™
RapidConnect™
µSerDes™
SILENT SWITCHER
SMART START™
SPM™
Stealth™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic
TINYOPTO™
TruTranslation™
UHC™
UltraFET
UniFET™
VCX™
Wire™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I16
17
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
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