TS3300 0.6-4.5VIN, Low Input Input Voltage, Voltage, High-Efficiency High-Efficiency Boost Boost ++ LDO LDO 0.6-4.5VIN, 1.8-5.25VOUT, 1.8-5.25VOUT, 3.5-µA, 3.5uA, Low FEATURES DESCRIPTION t The TS3300 is a 1st-generation Touchstone Semi power management product that combines a high-efficiency boost regulator and a low dropout linear regulator (LDO) in one package. The boost regulator operates from a supply voltage as low as 0.6V and can deliver at least 75mA at 1.2VBI to 3VBO, an industry first. The TS3300 LDO’s input is connected to the output of the boost regulator, serving as a post-regulator for the boost, enabling a number of useful functions such as a buck-boost function. In power harvesting or peak load buffering applications, the LDO may post-regulate voltage buffered in a large capacitor or supercapacitor at boost’s output. Finally, the LDO may be operated simply as an on/off load switch. The LDO can deliver up to 100mA output current at a dropout voltage of 255mV and reduce the ripple voltage out of the boost regulator by a factor of 3. t t t t t Combines Low-power Boost + Low Dropout Linear Regulator (LDO) Boost Regulator · Input Voltage: 0.6V- 4.5V · Output Voltage: 1.8V- 5.25V · Efficiency: Up to 84% · No-Load Supply Current: 3.5µA · Delivers >100mA at 1.8VBO from 1.2VBI · Shutdown Control Anti-Crush Capability · Prevents Input Voltage Collapse when powered with Weak/High Impedance power Sources Single-Inductor, Discontinuous Conduction Mode Scheme with Automatic Peak Current Adjustment LDO · Adjustable LDO Output Voltage: 1.8V- 5V · Dropout Voltage: 255mV @ 100mA 16-Pin, Low-Profile, Thermally-Enhanced 3mm x 3mm TQFN Package TM The TS3300’s boost section includes an anti-crush feature to prevent the collapse of the input voltage to the boost regulator when the input is a weak (high impedance) source. If the input voltage drops below a determined voltage threshold (settable by a resistor divider), the boost regulator switching cycles are paused, effectively limiting the minimum input TM voltage. Anti-crush is useful in applications where a buffer capacitor at the boost’s output can service burst loads, and the input source exhibits substantial source impedance (such as with an old battery, or at cold temperatures). APPLICATIONS Coin Cell-Powered Portable Equipment Single Cell Li-ion or Alkaline Powered Equipment Solar or Mechanical Energy Harvesting Wireless Microphones Wireless Remote Sensors RFID Tags Blood Glucose Meters Personal Health-Monitoring Devices The TS3300 is fully specified over the -40°C to +85°C temperature range and is available in a low-profile, thermally-enhanced 16-pin 3x3mm TQFN package with an exposed back-side paddle. TYPICAL APPLICATION CIRCUIT Boost Regulator Efficiency vs Load Current 100 1.2VBI to 1.8VBO 90 80 EFFICIENCY - % 70 1.2VBI to 3VBO 60 50 40 30 20 10 L: LPS4018-103ML 0 The Touchstone Semiconductor logo and “NanoWatt Analog” are registered trademarks of Touchstone Semiconductor, Incorporated. 0.01 0.1 1 IBO - mA 10 100 Page 1 © 2013 Touchstone Semiconductor, Inc. All rights reserved. TS3300 ABSOLUTE MAXIMUM RATINGS BI to GND ........................................................... -0.3V to VBO +0.1V CCP ......................................................................... -0.3V to +2.5V തതതതതത to GND ........................................................... -0.3V to +5.75V BEN BI FB, REG FB, BO FB to GND .............................. -0.3V to +5.75V SW EN, REG EN to GND ....................................... -0.3V to +5.75V BO, REG OUT, REG IN to GND ............................. -0.3V to +5.75V LSW to GND........................................................... -0.3V to +5.75V Continuous Power Dissipation (TA = +70°C) 16-Pin TQFN (Derate at 17.5mW/°C above +70°C) ..... 1398mW Operating Temperature Range ................................ -40°C to +85°C Storage Temperature Range ................................. -65°C to +150°C Lead Temperature (Soldering, 10s) ..................................... +300°C Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and lifetime. PACKAGE/ORDERING INFORMATION ORDER NUMBER PART CARRIER QUANTITY MARKING TS3300ITQ1633TP Tape & Reel ----- Tape & Reel 3000 3300I TS3300ITQ1633T Lead-free Program: Touchstone Semiconductor supplies only lead-free packaging. Consult Touchstone Semiconductor for products specified with wider operating temperature ranges. Page 2 TS3300DS r1p0 RTFDS TS3300 ELECTRICAL CHARACTERISTICS VBI = 1.2V, VBO = 3V, VBEN തതതതതതത = LOW, IBO= 20mA, L = 10µH, CBO = 22µF unless otherwise noted. Values are at TA = 25°C unless otherwise noted. See Note 1. PARAMETER Minimum Input Boost Voltage Maximum Input Boost Voltage Output Boost Voltage Range Current Measured at BO Current Measured at BI Current Measured at BO Current Measured at BI Efficiency Boost Shutdown Supply Current Boost Feedback Voltage during operation Boost Feedback Pin Current Anti-Crush Feedback Voltage Anti-Crush Feedback Voltage Hysteresis Boost Enable Threshold Boost Enable Hysteresis Inductor Peak Current Inductor Valley Current N-channel ON Resistance P-channel ON Resistance TS3300DS r1p0 SYMBOL CONDITIONS BOOST REGULATOR VBI_MIN IBO = 0mA. TA=25ºC VBI_MAX Guaranteed by design VBO IB_Q Eff ISHUTDOWN VBO FB MIN VBEN തതതതതത_HYST IPK IV RdsN-CH RdsP-CH UNITS 0.6 0.75 V V 1.8 IBO = 0mA, VBO FB = 0.6V TA =25°C IBO = 0mA, -40°C < TA < +85°C VBO FB = 0.6V VBI= 1.2V, VBO=1.8, IBO=30mA Measured at BI. VBEN തതതതതതത = VBI VBEN തതതതതതത = 0V TA =25°C Output voltage accuracy: ± 4% VBI ≥ 0.6V 5.25 0.489 0.363 3.5 µA µA 6 0.9 µA µA % 100 nA 0.505 0.521 V ±0.1 ±1 nA 0.392 0.425 V 50 VIL VIH No Load V 0.07 84 VBI FB_HYST Vതതതതതതത BEN MAX 4.5 IBO FB VBI FB TYP mV 0.2 VBI -0.05 V V 200 mV 10 0.27 0.48 mA mA Ω Ω 365 Page 3 RTFDS TS3300 ELECTRICAL CHARACTERISTICS VREGIN = VBO = 3V, VREGOUT = 1.8V, VREG EN = HIGH, IREGOUT = 20mA, CREGOUT = 10µF unless otherwise noted. Values are at TA = 25°C unless otherwise noted. See Note 1. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS LINEAR REGULATOR DC Output Accuracy Input Voltage Range Output Voltage Range Input Supply Current Line Regulation Load Regulation Drop Out Voltage Output Current Limit Power Supply Rejection Ratio Startup Time Linear Regulator Enable Voltage Linear Regulator Enable Hysteresis Enable Pin Current SWITCH RdsON SWITCH Enable Voltage VREGOUT 2.3V ≤ VREGIN ≤ 5V 0mA ≤ IREGOUT ≤ 20mA VREG FB = 505mV VREGIN VREGOUT IREGIN ΔVREGOUT/ ΔVREGIN Guaranteed by design ΔVREGOUT/ ΔIREGOUT 10mA ≤ IREGOUT ≤ 20mA 0mA ≤ IREGOUT ≤ 20mA 2.5 -40ºC ≤ TA ≤ 85ºC -3.5 3.5 % 1.8 1.8 5.25 5 1 V V µA IREGOUT = 0mA, VREG EN = VREGIN VREGOUT +0.5V ≤ VREGIN ≤ 5V 0.4 -1 1 % -1 -1.5 1 1.5 % % mV mA dB dB dB ms V V VDO ICL PSRR CREGOUT = 22µF IREGOUT = 100mA 40 150 -70 -50 -36 f = 10Hz f = 100Hz f = 1kHz tSTR VREG EN VIL (CMOS logic) VIH (CMOS logic) 1 0.2 x VREGIN 0.8 xVREGIN VREG EN_HYST 100 IREG EN RSW VSW EN % VSW EN = HIGH. Measured from REGIN to REGOUT VIL (CMOS logic) VIH (CMOS logic) 0.9 mV 10 nA 1.2 Ω 0.2 x VREGIN V V 0.8 xVREGIN Regulator Feedback Pin IREG FB ±0.1 ±1 Current Note 1: All devices are 100% production tested at TA = +25°C and are guaranteed by characterization for TA = TMIN to TMAX, as specified. Page 4 nA TS3300DS r1p0 RTFDS TS3300 TYPICAL PERFORMANCE CHARACTERISTICS VBI = 1.2V, VBO = 3V, VBEN തതതതതത = LOW, IBO = 0A, L = 10µH (LPS4018-103ML), CBO = 22µF, CBI = 22µF, VREGIN = VBO = 3V, VREGOUT = 1.8V, IREGOUT = 0A, CREGOUT = 10µF unless otherwise noted. Values are at TA = 25°C unless otherwise noted. Boost Regulator Maximum Output Current vs VBI ( for VBO to drop 2.5%) Boost Regulator Efficiency vs Load Current 100 300 1.2VBI to 1.8VBO 90 240 1.2VBI to 3VBO 70 180 60 IBO - mA EFFICIENCY - % 80 50 40 120 30 60 20 10 L: LPS4018-103ML 0 0 0.1 0.01 1 IBO - mA 10 100 0.5 1.1 1.5 VBI - V 2 2.5 0.6 VREGOUT set to 1.8V 1 0.9 DROPOUT VOLTAGE - V INDUCTOR PEAK CURRENT - A 1 LDO Dropout Voltage vs Load Current Inductor Peak Current vs Load Current 1.2VBI to 3VBO 0.8 0.7 0.6 0.5 1.2VBI to 1.8VBO 0.4 0.4 40ºC +85ºC 0.2 +25ºC 0.3 0 0.2 0 25 50 IBO - mA 75 100 0 25 50 75 100 IREGOUT - mA LDO Output Voltage Accuracy vs Load Current LDO Dropout Voltage vs Load Current +0.4 0.2 VREGOUT set to 3V PERCENT DEVIATION - % DROPOUT VOLTAGE - V VBO =3V VBO =1.8V +85ºC 0.15 -40ºC 0.1 0.05 +25ºC -0.2 -0.8 -1.4 -2 -2.6 -3.2 0 -3.8 0 25 50 IREGOUT - mA TS3300DS r1p0 75 100 0 25 50 75 100 IREGOUT - mA 125 150 Page 5 RTFDS TS3300 TYPICAL PERFORMANCE CHARACTERISTICS VBI = 1.2V, VBO = 3V, VBEN തതതതതത = LOW, IBO = 0A, L = 10µH (LPS4018-103ML), CBO = 22µF, CBI = 22µF, VREGIN = VBO = 3V, VREGOUT = 1.8V, IREGOUT = 0A, CREGOUT = 10µF unless otherwise noted. Values are at TA = 25°C unless otherwise noted. Boost Minimum Start-Up Voltage vs Source Resistance 1.8 L: 22µH (LPS4018-223ML) 1.1 START-UP VOLTAGE - V START-UP VOLTAGE - V 1.2 Boost Minimum Start-Up Voltage vs Load Current +85ºC 1 -40ºC 0.9 0.8 +25ºC 0.7 1.6 1.4 1.2 1 0.6 L: 10µH (LPS4018-103ML) 0.5 0.8 0 5 10 15 20 25 SOURCE RESISTANCE- Ω 30 0 6 9 12 IBO - mA 15 18 Boost Regulator Output Voltage Ripple VBI = 1.2V, VBO = 1.8V, CBO= 22µF, IBO = 40mA Boost Regulator Output Voltage Ripple VBI = 1.2V, VBO = 1.8V, CBO= 22µF, IBO = 5mA VBO – 50mV/DIV VBO – 50mV/DIV 3 50µs/DIV 20µs/DIV Boost Regulator Output Voltage Ripple VBI = 1.2V, VBO = 3V, CBO= 22µF, IBO = 5mA VBO – 50mV/DIV VBO – 50mV/DIV Boost Regulator Output Voltage Ripple VBI = 1.2V, VBO = 1.8V, CBO= 22µF, IBO = 80mA 50µs/DIV Page 6 50µs/DIV TS3300DS r1p0 RTFDS TS3300 TYPICAL PERFORMANCE CHARACTERISTICS VBI = 1.2V, VBO = 3V, VBEN തതതതതത = LOW, IBO = 0A, L = 10µH (LPS4018-103ML), CBO = 22µF, CBI = 22µF, VREGIN = VBO = 3V, VREGOUT = 1.8V, IREGOUT = 0A, CREGOUT = 10µF unless otherwise noted. Values are at TA = 25°C unless otherwise noted. Boost Regulator Output Voltage Ripple VBI = 1.2V, VBO = 3V, CBO= 22µF, IBO = 80mA IBO 4.17mA/DIV VBO – 50mV/DIV VBO 100mV/DIV Boost Regulator Load Step Response VBI = 1.2V, VBO = 3V, CBO= 10µF, IBO = 5mA 200µs/DIV 50µs/DIV LDO Load Step Response VBI = 1.2V, VBO = 3V, CREGOUT= 10µF, IBO = 5mA IBO 33mA/DIV IREGOUT 4.17mA/DIV VREGOUT 100mV/DIV VBO 100mV/DIV Boost Regulator Load Step Response VBI = 1.2V, VBO = 3V, CBO= 10µF, IBO = 40mA 200µs/DIV 200µs/DIV L: LPS4018-103ML VLSW 1V/DIV VREGOUT 100mV/DIV IREGOUT 33mA/DIV 200µs/DIV TS3300DS r1p0 Boost Regulator Output Voltage Ripple, Inductor Current, and LSW Voltage VBI = 1.2V, VBO = 1.8V, CBO= 22µF, IBO = 5mA IL VBO 100mA/DIV 50mV/DIV LDO Load Step Response VBI = 1.2V, VBO = 3V, CREGOUT= 10µF, IBO = 40mA 2µs/DIV Page 7 RTFDS TS3300 TYPICAL PERFORMANCE CHARACTERISTICS VBI = 1.2V, VBO = 3V, VBEN തതതതതത = LOW, IBO = 0A, L = 10µH (LPS4018-103ML), CBO = 22µF, CBI = 22µF, VREGIN = VBO = 3V, VREGOUT = 1.8V, IREGOUT = 0A, CREGOUT = 10µF unless otherwise noted. Values are at TA = 25°C unless otherwise noted. IBI 50mA/DIV REGOUT 1V/DIV 2µs/DIV Page 8 Large Output Capacitor Start-up with Anti-Crush at 0.9V VBI=1.2V, ESR of VBI =10Ω, VBO=VREGIN=3V, VREGOUT=1.8V, CBO=500µF, CREGOUT=10µF BO 1V/DIV L: LPS4018-103ML VLSW 1V/DIV IL VBO 500mA/DIV 50mV/DIV Boost Regulator Output Voltage Ripple, Inductor Current, and LSW Voltage VBI = 1.2V, VBO = 3V, CBO= 22µF, IBO = 40mA 100ms/DIV TS3300DS r1p0 RTFDS TS3300 PIN FUNCTIONS PIN NAME 1 BIN 2 CCP 3 തതതതതത BEN 4 BI FB 5 FAC 6 SW EN 7 REG EN 8 REG FB 9 GND 10 REGOUT 11 REGIN 12 GND 13 BO FB 14 BO 15 LSW 16 GND EP െ TS3300DS r1p0 FUNCTION Boost Input. Bypass this pin with a 22µF ceramic capacitor in close proximity to the TS3300. Charge Pump Capacitor. Place a 3.3nF capacitor between this pin and GND Boost Enable (active low). To enable the TS3300, connect this to GND. To disable the TS3300, set the voltage to greater than VBI – 50mV. Boost Input Feedback for Anti-Crush Voltage Setting. The BI FB pin voltage is 392mV. To set the anti-crush voltage, refer to the Applications Information section and to Figure 7. Factory use only. Do not connect to GND or VDD. Leave open. Switch Enable. When SW EN is high and REG EN is low, the internal FET/SWITCH connects the LDO output to the LDO input. The internal FET has an RdsON = 1.2Ω. Refer to Table 1. LDO Regulator Enable. When REG EN is high and SW EN is low, the LDO is under normal operation. Refer to Table 1. LDO Regulator Output Feedback. The REG FB pin voltage is 505mV. REG FB coupled with a voltage divider circuit sets the LDO output voltage. Refer to Figure 3. Ground. Connect this pin to the analog ground plane LDO Regulator Output Voltage. A minimum output capacitance of 10µF is recommended to be placed from this pin to GND. To set the LDO output voltage, use a voltage divider circuit along with the REG FB pin as shown in Figure 3. LDO Regulator Input/Boost Output. REGIN should always be connected to the boost regulator output voltage pin BO. BO is always the input to the LDO. Do not apply an external supply voltage to this pin. Ground. Connect this pin to the analog ground plane. Boost Output Feedback. The BO FB pin voltage is 505mV. BO FB coupled with a voltage divider circuit sets the boost regulator output voltage. Refer to Figure 2. Boost Regulator Output Voltage. A minimum output capacitance of 10µF is recommended to be placed from this pin to GND. To set the boost regulator output voltage, use a voltage divider circuit along with the BO FB pin. Refer to Figure 2. Coil is a low-ESR, high-saturation current, shielded inductor. A 10µH inductor is recommended for most applications and is to be placed from this pin to the input of the boost regulator BI. Furthermore, there should exist at least an 8% margin between the saturation current of the inductor and the peak inductor current for a given set of operating conditions. Ground. Connect this pin to the analog ground plane. For best electrical and thermal performance, connect exposed paddle to GND. Page 9 RTFDS TS3300 BLOCK DIAGRAM THEORY OF OPERATION The TS3300 is a power management product that combines a high-efficiency boost regulator and a linear regulator into one package. It is the industry’s st 1 boost regulator + linear regulator where the boost regulator can operate from supply voltages as low as 0.6V and can deliver at least 75mA at 1.2VBI and 3VBO. Under no-load conditions, the boost regulator idles at 3.5µA. The internal, low-dropout linear regulator is driven by the output of the boost regulator. It can deliver up to 100mA output current at a dropout voltage of 255mV and reduce the ripple voltage out of the boost regulator by a factor of 3. BOOST REGULATOR At start-up, an internal low voltage oscillator in the start-up control circuitry drives the gate of the internal FET to charge the load capacitor. Once the output voltage reaches approximately 1.1V, the main control circuitry starts to operate. With an adjustable peak inductor current, the TS3300 can provide up to 84% efficiency with a 1.2VBI and 3VBO. Refer to Figure 1. The input and output supply voltage range for the boost regulator is from 0.6V to 4.5V and 1.8V to 5.25V, respectively. Figure 1: 1.2V Input to 3V Boost Regulator Output Voltage and to 1.8V LDO Output Voltage Circuit Page 10 TS3300DS r1p0 RTFDS TS3300 The output voltage can be set via a voltage divider circuit as shown in Figure 2. The output feedback (BO FB) pin is 505mV. It is recommended to use LDO Post-Regulator The input and output supply voltage range for the LDO is from 2.3V to 5.25V and 1.8V to 5V, respectively, where the LDO input is driven by the output of the boost regulator. The output voltage can be set via a voltage divider circuit as shown in Figure 3. Figure 2: Setting the Boost Output Voltage with a Voltage Divider large resistor values to minimize additional current draw at the output. Resistors values less than 8MΩ are recommended. Using the following equation to solve for R1 for a given R2 value, the output voltage can be set: ሺVBO - 0.505ሻR2 R1= 0.505 To set a 3V output voltage with R2 = 1.37MΩ, R1 is calculated to be 6.77MΩ. A 1% standard resistor value of 6.81MΩ can be selected. This results in an output voltage of 3.02V. തതതതതത) pin is also available to shutdown A shutdown (BEN the boost regulator. The boost regulator is in shutdown mode when തതതതതത BEN is LOW and supply current reduces to 0.1µA. Figure 3: Setting the LDO Output Voltage with a Voltage Divider The output feedback (REG FB) pin is 505mV. It is recommended to use the largest resistor values to minimize additional current draw at the output. Using the following equation to solve for R3 for a given R4 value, the output voltage can be set: R3= ሺVREGOUT - 0.505ሻR4 0.505 To set a 1.8V output voltage with R4 = 2.61MΩ, R3 is calculated to be 6.69MΩ. A 1% standard resistor value of 6.81MΩ can be selected. This results in an output voltage of 1.82V. Figure 4: TS3300 LDO FET/Switch Enabled Circuit TS3300DS r1p0 Page 11 RTFDS TS3300 The LDO was designed to operate in conjunction with the boost regulator where the output of the boost regulator is connected to the input to the linear regulator. The LDO can provide an output voltage based on the resistor divider circuit as shown in Figure 3 or the output voltage can be set to the input voltage where the internal switch/FET is fully enhanced. Table 1 summarizes the settings for pins REG EN and SW EN. Figure 4 shows the configuration where the internal switch/FET is fully enhanced (SW EN =high, REG EN = low) so the boost output is equal to the LDO output. The LDO can be shutdown by connecting the REF FB pin to BO when SW EN = low and REG EN = high. SW EN REG EN CONDITION FUNCTION Connect LDO Normal REG EN pin Operation to BO pin low high Connect LDO REG FB pin Shutdown to BO pin Connect Internal FET high low SW EN pin Hard-on to BO pin Table 1. LDO REG EN and SW EN Settings shows how the inductor peak current varies with load current with a LPS4018-103ML inductor from Coilcraft. Input and Output Capacitor Selection For the boost regulator, a low ESR ceramic input and output capacitor of at least 10μF is recommended to be placed as close as possible to the BI and BO pin. Output voltage ripple can be reduced by increasing the value of the output capacitor while providing improved transient response. Ceramic capacitors with X5R dielectric are recommended. For the LDO, a low ESR ceramic input and output capacitor of at least 10μF is recommended to be placed as close as possible to the REG OUT pin. Refer to Table 2 for a list of inductor and capacitor manufacturers. Buck-Boost Function APPLICATIONS INFORMATION The TS3300 can act as a buck-boost device. For instance, if two 1.5V alkaline cells are used to power the TS3300, the boost output voltage (VBO) can be set to 5V and the LDO output voltage (VREGOUT) can be set to 2.5V. The output voltage for the boost regulator and the LDO can be set according to Figure 2 and 3, respectively. Inductor Selection Boost Input Anti-Crush A low ESR, shielded 10μH inductor is recommended for most applications and provides the best compromise between efficiency and size. A low loss ferrite and low dc resistance (DCR) inductor is best for optimal efficiency. Furthermore, there should exist at least an 8% margin between the saturation current of the inductor and the peak inductor current for a given set of operating conditions. Table 2 provides a list of inductor manufactures. Refer to the Inductor Peak Current vs Load Current plot in the “Typical Performance Characteristics” section. This plot The TS3300 includes an anti-crush feature to prevent the collapse of the input voltage to the boost regulator when the input is a weak (high impedance) source. If the input voltage drops below a determined voltage threshold (settable by a resistor divider), the boost regulator switching cycles are paused, effectively limiting the minimum input voltage. TM Anti-crush is useful in applications where a buffer capacitor at the boost’s output can service burst loads, and the input source exhibits substantial source impedance (such as with an old battery, or at cold temperatures). Supplier Coilcraft Murata Sumida Inductors Website www.coilcraft.com www.murata.com www.sumida.com Capacitors Taiyo www.t-yuden.com Yuden Murata www.murata.com AVX www.avxcorp.com TDK www.component.tdk.com Table 2. Inductor and Capacitor Manufactures Page 12 TM Feature TM TM To set the anti-crush voltage, a feedback pin (BI FB) in conjunction with a voltage divider circuit can be implemented as shown in Figure 7. The feedback pin voltage is 392mV. It is recommended to use large resistor values to minimize additional current draw at the input. TS3300DS r1p0 RTFDS TS3300 Figure 7: Setting the Anti-Crush with a Voltage Divider TM load of 500µF and an input source impedance of 10Ω. A high source impedance is typical of a weak battery source. The measurement was performed TM with the anti-crush voltage set to 0.9V. The purple, blue, and pink trace represent the input current, boost output voltage, and LDO output voltage, respectively. At start-up, the current rises up to 50mA and drops to approximately 30mA for approximately 40ms in order to charge the output capacitor. At this point, the voltage to the input of the TS3300 is 0.9V until the boost output achieves regulation and in turn, the LDO output voltage achieves regulation as well. Voltage Using the following equation to solve for R5 for a given R6 value, the output voltage can be set: R5= Figure 6 shows a scope capture of the load step response. The measurement was performed with the TM anti-crush voltage set to 0.9V. As the output of the LDO is pulsed with a 100mA load every 100ms for 1ms as shown by the pink curve, the input voltage after a battery impedance of 10Ω drops from 1.2V to 0.9V as shown by the blue curve and the boost output voltage drops by only 160mV as shown by the yellow curve. The TS3300 quickly replenishes the 500µF capacitor and the output of the boost regulator returns to 3V. Note that the LDO remains regulated and is unaffected by the load step. ൫VANTI-CRUSHTM - 0.392൯R6 0.392 To set a 0.8V output voltage with R6 = 1.37MΩ, R5 is calculated to be 1.42MΩ. A 1% standard resistor value of 1.37MΩ can be selected. This results in an TM anti-crush voltage of 784mV. The anti-crush voltage is to be set above the minimum input voltage specification of the TS3300. TM Figure 5 shows a scope capture of the anti-crush feature in action at start-up under a heavy capacitive Load Step Response with Anti-CrushTM at 0.9V VBI=1.2V, ESR of VBI =10Ω, VBO=VREGIN=3V, VREGOUT=1.8V, CBO=500µF, CREGOUT=10µF, IREGOUT=100mA pulse REGOUT 1V/DIV BO 1V/DIV BI IREGOUT REGOUT 83mA/DIV 200mV/DIV 500mV/DIV IBI 50mA/DIV BO 200mV/DIV Large Output Capacitor Start-up with Anti-CrushTM at 0.9V VBI=1.2V, ESR of VBI =10Ω, VBO=VREGIN=3V, VREGOUT=1.8V, CBO=500µF, CREGOUT=10µF 2ms/DIV TM 100ms/DIV TM Figure 5: Using the Anti-Crush Feature under a Heavy Capacitive Load (500µF) and a 10Ω Boost Input Source Impedance at Start-up TS3300DS r1p0 Figure 6: Using the Anti-Crush Feature to Maintain Regulation of the Boost Regulator and LDO Output Voltage Page 13 RTFDS TS3300 PACKAGE OUTLINE DRAWING 16-Pin TQFN33 Package Outline Drawing (N.B., Drawings are not to scale) Dap Size 2x2 Pin 1 Indicator CO.25 0.50 Ref. 1.80 ± 0.05 1.50 Ref. 3.00 ± 0.05 1.80 ± 0.05 0.25 ± 0.05 0.25 Ref. 1.50 Ref. 0.35 ± 0.05 3.00 ± 0.05 Terminal Thickness 0.10 Ref. 0.203 Ref. Detail A : Terminal thickness for reference only no measurement purpose Detail A 0.0 – 0.05 Note: 0.75 ± 0.05 1. All Dimensions are in mm 2 Compliant with JEDEC MO-220 0.10 Ref. 0.0 – 0.05 Information furnished by Touchstone Semiconductor is believed to be accurate and reliable. However, Touchstone Semiconductor does not assume any responsibility for its use nor for any infringements of patents or other rights of third parties that may result from its use, and all information provided by Touchstone Semiconductor and its suppliers is provided on an AS IS basis, WITHOUT WARRANTY OF ANY KIND. Touchstone Semiconductor reserves the right to change product specifications and product descriptions at any time without any advance notice. No license is granted by implication or otherwise under any patent or patent rights of Touchstone Semiconductor. Touchstone Semiconductor assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using Touchstone Semiconductor components. To minimize the risk associated with customer products and applications, customers should provide adequate design and operating safeguards. Trademarks and registered trademarks are the property of their respective owners. Page 14 Touchstone Semiconductor, Inc. 630 Alder Drive, Milpitas, CA 95035 +1 (408) 215 - 1220 ▪ www.touchstonesemi.com TS3300DS r1p0 RTFDS