TI TPS2212IDB

TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
D
D
D
D
D
D
D
D
D
D
Fully Integrated VCC and Vpp Switching for
Low Power Single-Slot PC Card Interface
DB PACKAGE
(TOP VIEW)
Low rDS(on) (160-mΩ VCC Switches)
Low Current Limit, 450 mA (VCC) Typ
3.3-V Low-Voltage Mode
12-V Supply Can Be Disabled Except
During 12-V Flash Programming
Short-Circuit and Thermal Protection
Space-Saving 16-Pin SSOP (DB)
Compatible With 3.3-V, 5-V, and 12-V PC
Cards
Break-Before-Make Switching
Typical Applications Include: PCMCIA PC
Card Sockets in PDAs, PBXs, Bar Code
Scanners, Compact Flash and Smart Cards
VCCD0
VCCD1
3.3V
3.3V
5V
5V
GND
OC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SHDN
VPPD0
VPPD1
VCC
VCC
VCC
VPP
VPPI
description
The TPS2212 PC Card power-interface switch provides an integrated power-management solution for a single
low power PC Card. All of the discrete power MOSFETs, a logic section, current limiting, and thermal protection
for PC Card control are combined on a single integrated circuit, using the Texas Instruments LinBiCMOS
process. The circuit allows the distribution of 3.3-V, 5-V, and/or 12-V card power, and is compatible with many
PCMCIA controllers. The current-limiting feature eliminates the need for fuses, which reduces component count
and improves reliability. Current-limit reporting can help the user isolate a system fault to the PC Card.
The TPS2212 features a 3.3-V low-voltage mode that allows for 3.3-V switching without the need for 5 V. Bias
power can be derived from either the 3.3-V or 5-V inputs. This facilitates low-power system designs such as
sleep mode and pager mode, where only 3.3 V is available.
End equipment for the TPS2212 includes notebook computers, desktop computers, personal digital assistants
(PDAs), digital cameras, and bar-code scanners. This device is well suited for those applications that need to
limit the power provided to the PC card because of power-supply constraints. In many applications, such as
palm computers, the system cannot allocate more than 200 mA of current to a PC card slot. For these lowerpower applications, the TPS2212 provides the same advanced level of protection that the TPS2211 provides for
higher-power applications.
AVAILABLE OPTIONS
PACKAGED DEVICE
TA
SMALL OUTLINE
(DB)
–40°C to 85°C
TPS2212IDB
The DB package is available taped and reeled.
Add an R suffix to the device type (e.g.,
TPS2212IDBR) for taped and reeled.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PC Card is a trademark of PCMCIA (Personal Computer Memory Card International Association).
LinBiCMOS is a trademark of Texas Instruments.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
typical PC-card power-distribution application
TPS2212
VCC
VCC
VCC
0.1 µF
VPP
3.3 V–12 V
5V
VCC1
VCC2
PC Card
Vpp1 Connector
Vpp2
0.1 µF
VPPI
5V
0.1 µF
1 µF
5V
PCMCIA
Controller
3.3 V
0.1 µF
1 µF
3.3V
VCCD0
VCC_EN0
3.3V
VCCD1
VCC_EN1
VPPD0
VPPD1
VPP_EN0
OC
GND
VPP_EN1
To CPU
SHDN
Shutdown Signal From CPU
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
CS
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
Terminal Functions
TERMINAL
NAME
I/O
NO.
DESCRIPTION
3.3V
3, 4
I
3.3-V VCC input for card power and/or chip power if 5 V is not present
5V
5, 6
I
5-V VCC input for card power and/or chip power
VPPI
9
I
Main Vpp input, typically 12 V, allows 3.3 V–12 V.
VCC
11, 12, 13
O
Switched output that delivers 0 V, 3.3-V, 5-V, or high impedance to card
VPP
10
O
Switched output that delivers 0 V 3.3-V, 5-V, VPPI (12V), or high impedance to card
GND
7
Ground
OC
8
O
Logic-level overcurrent reporting output that goes low when an overcurrent conditions exists
SHDN
16
I
Logic input that shuts down the TPS2212 and sets all power outputs to high-impedance state
VCCD0
1
I
Logic input that controls voltage of VCC (see control-logic table)
VCCD1
2
I
Logic input that controls voltage of VCC (see control-logic table)
VPPD0
15
I
Logic input that controls voltage of VPP (see control-logic table)
VPPD1
14
I
Logic input that controls voltage of VPP (see control-logic table)
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
VI(5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
VI(3.3V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
VI(VPPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 14 V
Logic input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Output current (each card): IO(VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited
IO(VPP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 150°C
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 150°C
Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Input voltage range for card power:
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
DB
775 mW
6.2 mW/°C
496 mW
403 mW
These devices are mounted on an FR4 board with no special thermal considerations.
recommended operating conditions
Input voltage, VI
Output current
MIN
MAX
UNIT
VI(5V)
VI(3.3V)
0
5.25
V
0
5.25
V
VI(VPPI)
IO(VCC)
0
13.5
V
250
mA
150
mA
125
°C
IO(VPP)
Operating virtual junction temperature, TJ
–40
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
electrical characteristics, TA = –40°C to 85°C (unless otherwise noted)
power switch
TEST CONDITIONS†
PARAMETER
5 V to VCC
VI(5V) = 5 V
VI(5V) = 5 V,
3.3 V to VCC
Switch resistance
3.3 V to VCC
VI(5V) = 0 V,
TJ=25°C
5 V to VPP
3.3 V to VPP
Ilkg
lk
II
IOS
Clamp low voltage
210
160
210
160
210
VI(3.3V) = 3.3 V
VI(3.3V) = 3.3 V
6
mΩ
Ω
1
Ipp high
high-impedance
impedance state
1
ICC high-impedance
high impedance state
TA = 25°C
TA=85°C
1
0.8
V
0.8
V
10
50
10
µA
50
VI(5V) = 5 V
VI(5V) = 0 V,
VI(3.3V) = 3.3 V
VO(VCC) = 5 V, VO(VPP) = 12 V
40
150
VO(VCC) = 3.3 V, VO(VPP) = 12 V
40
150
Shutdown mode
VO(VCC) = VO(VPP) = Hi-Z
IO(VCC)
IO(VPP)
UNIT
6
TA = 25°C
TA= 85°C
Leakage current
Short-circuit
output-current limit
MAX
160
Ipp at 10 mA
ICC at 10 mA
Clamp low voltage
Input current
TYP
TJ=25°C
TJ=25°C
12 V to VPP
VO(VPP)
VO(VCC)
MIN
µA
1
TJ = 85°C, output powered into a
short to GND
300
600
mA
120
400
mA
† Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
logic section
TEST CONDITIONS†
PARAMETER
MIN
MAX
Logic input current
1
Logic input high level
2
0.8
VI(5V) = 5 V,
VI(5V) = 0 V,
IO = 1 mA
IO = 1 mA,
VI(3.3V) = 3.3 V
µA
V
Logic input low level
Logic output high level
UNIT
VI(5V) – 0.4
VI(3.3V) – 0.4
V
V
Logic output low level
IO = 1 mA
0.4
V
† Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
switching characteristics‡
TEST CONDITIONS§
PARAMETER
tr
tf
tpd
d
TYP
Rise times,
times output
VO(VCC)
VO(VPP)
2.8
Fall times
times, output
VO(VCC)
VO(VPP)
4.5
Propagation delay (see Figure1)
6.4
VI(VPPD0) to VO(VPP)
(3 3V)
VI(VCCD
I(VCCD1)) to VO(VCC) (3.3V)
ton
toff
VI(VCCD0) to VO(VCC) (5V)
ton
toff
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MAX
UNIT
ms
12
ton
toff
‡ Switching Characteristics are with CL = 150 µF.
§ Refer to Parameter Measurement Information
4
MIN
6.8
18
4
17
6.6
17
ms
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
PARAMETER MEASUREMENT INFORMATION
AVPP
AVCC
CL
CL
LOAD CIRCUIT
VI(VPPD0)
(VI(VPPD1) = 0 V)
LOAD CIRCUIT
VI(VCCD1)
VDD
(VI(VCCD0) = VDD)
GND
50%
50%
VDD
GND
toff
toff
ton
VO(VPP)
50%
50%
ton
VI(VPPI)
90%
10%
VI(3.3V)
90%
VO(VCC)
10%
GND
VOLTAGE WAVEFORMS
GND
VOLTAGE WAVEFORMS
Figure 1. Test Circuits and Voltage Waveforms
Table of Timing Diagrams
FIGURE
VCC Propagation Delay and Rise Time With 1-µF Load, 3.3-V Switch
2
VCC Propagation Delay and Fall Time With 1-µF Load, 3.3-V Switch
3
VCC Propagation Delay and Rise Time With 150-µF Load, 3.3-V Switch
4
VCC Propagation Delay and Fall Time With 150-µF Load, 3.3-V Switch
5
VCC Propagation Delay and Rise Time With 1-µF Load, 5-V Switch
6
VCC Propagation Delay and Fall Time With 1-µF Load, 5-V Switch
7
VCC Propagation Delay and Rise Time With 150-µF Load, 5-V Switch
8
VCC Propagation Delay and Fall Time With 150-µF Load, 5-V Switch
9
VPP Propagation Delay and Rise Time With 1-µF Load, 12-V Switch
10
VPP Propagation Delay and Fall Time With 1-µF Load, 12-V Switch
11
VPP Propagation Delay and Rise Time With 150-µF Load, 12-V Switch
12
VPP Propagation Delay and Fall Time With 150-µF Load, 12-V Switch
13
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
PARAMETER MEASUREMENT INFORMATION
VCCD0 = 3.3 V
VCCD0 = 3.3 V
VCCD1
(2 V/div)
VCCD1
(2 V/div)
VCC
(2 V/div)
VCC
(2 V/div)
0
1
2
3
4
5
6
7
8
9
10
0
5
10
15
Figure 2. VCC Propagation Delay and Rise Time
With 1-µF Load, 3.3-V Switch
VCCD1
(2 V/div)
VCC
(2 V/div)
VCC
(2 V/div)
3
4
5
6
7
8
9
10
0
5
40
45
50
10
15
20
25
30
35
40
45
50
t – Time – ms
t – Time – ms
Figure 4. VCC Propagation Delay and Rise Time
With 150-µF Load, 3.3-V Switch
6
35
VCCD0 = 3.3 V
VCCD1
(2 V/div)
2
30
Figure 3. VCC Propagation Delay and Fall Time
With 1-µF Load, 3.3-V Switch
VCCD0 = 3.3 V
1
25
t – Time – ms
t – Time – ms
0
20
POST OFFICE BOX 655303
Figure 5. VCC Propagation Delay and Fall Time
With 150-µF Load, 3.3-V Switch
• DALLAS, TEXAS 75265
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
PARAMETER MEASUREMENT INFORMATION
VCCD0
(2 V/div)
VCCD0
(2 V/div)
VCC
(2 V/div)
VCC
(2 V/div)
VCCD1 = 5 V
0
2
4
6
8
10
12
14
16
18
VCCD1 = 5 V
0
20
5
10
15
20
25
30
35
40
45
50
t – Time – ms
t – Time – ms
Figure 6. VCC Propagation Delay and Rise Time
With 1-µF Load, 5-V Switch
Figure 7. VCC Propagation Delay and Fall Time
With 1-µF Load, 5-V Switch
VCCD0
(2 V/div)
VCCD0
(2 V/div)
VCC
(2 V/div)
VCC
(2 V/div)
VCCD1 = 5 V
VCCD1 = 5 V
0
2
4
6
8
10
12
14
16
18
20
0
5
10
15
20
25
30
35
40
45
50
t – Time – ms
t – Time – ms
Figure 8. VCC Propagation Delay and Rise Time
With 150-µF Load, 5-V Switch
POST OFFICE BOX 655303
Figure 9. VCC Propagation Delay and Fall Time
With 150-µF Load, 5-V Switch
• DALLAS, TEXAS 75265
7
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
PARAMETER MEASUREMENT INFORMATION
VPPD0
(2 V/div)
VPPD0
(2 V/div)
VPP
(5 V/div)
VPP
(5 V/div)
VPPD1 = 0 V
0
0.2 0.4
0.6 0.8
1
1.2 1.4
1.6 1.8
2
VPPD1 = 0 V
0
1
2
3
t – Time – ms
VPPD0
(2 V/div)
VPP
(5 V/div)
VPP
(5 V/div)
VPPD1 = 0 V
4
6
8
10
12
14
16
18
20
7
8
9
10
VPPD1 = 0 V
0
5
10
15
20
25
30
35
40
45
50
t – Time – ms
t – Time – ms
Figure 12. VPP Propagation Delay and Rise Time
With 150-µF Load, 12-V Switch
8
6
Figure 11. VPP Propagation Delay and Fall Time
With 1-µF Load, 12-V Switch
VPPD0
(2 V/div)
2
5
t – Time – ms
Figure 10. VPP Propagation Delay and Rise Time
With 1-µF Load, 12-V Switch
0
4
POST OFFICE BOX 655303
Figure 13. VPP Propagation Delay and Fall Time
With 150-µF Load, 12-V Switch
• DALLAS, TEXAS 75265
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
ICC(5V)
ICC(3.3V)
Supply current
vs Junction Temperature
14
Supply current
vs Junction Temperature
15
rDS(on)
Static drain-source on-state resistance, 5-V VCC switch
vs Junction Temperature
16
rDS(on)
Static drain-source on-state resistance, 3.3-V VCC switch
vs Junction Temperature
17
rDS(on)
Static drain-source on-state resistance, 12-V VPP switch
vs Junction Temperature
18
VO(VCC)
VO(VCC)
Output voltage, 5-V VCC switch
vs Output current
19
Output voltage, 3.3-V VCC switch
vs Output current
20
VO(VPP)
IOS(VCC)
Output voltage, 12-V VPP switch
vs Output current
21
Short-circuit current, 5-V VCC switch
vs Junction Temperature
22
IOS(VCC)
IOS(VPP)
Short-circuit current, 3.3-V VCC switch
vs Junction Temperature
23
Short-circuit current, 12-V VPP switch
vs Junction Temperature
24
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
JUNCTION TEMPERATURE
SUPPLY CURRENT
vs
JUNCTION TEMPERATURE
45
45
VO(VCC) = 5 V
VO(VPP) = 12 V
No Load
VO(VCC) = 3.3 V
VO(VPP) = 12 V
No Load
43
I CC – Supply Current – µ A
I CC – Supply Current – µ A
43
41
39
37
35
–50
41
39
37
75
100
–25
0
25
50
TJ – Junction Temperature – °C
35
–50
125
75
100
–25
0
25
50
TJ – Junction Temperature – °C
Figure 15
5-V VCC SWITCH
3.31–V VCC SWITCH
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
JUNCTION TEMPERATURE
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
JUNCTION TEMPERATURE
200
180
160
140
120
100
80
–50
–25
0
25
50
75
100
125
r DS(on) – Static Drain-Source On-State Resistance – mΩ
r DS(on) – Static Drain-Source On-State Resistance – mΩ
Figure 14
200
180
160
140
120
100
80
–50
–25
TJ – Junction Temperature – °C
0
25
Figure 17
POST OFFICE BOX 655303
50
75
TJ – Junction Temperature – °C
Figure 16
10
125
• DALLAS, TEXAS 75265
100
125
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
12-V VPP SWITCH
5-V VCC SWITCH
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
JUNCTION TEMPERATURE
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
1200
5
VI(5V) = 5 V
VI(VPP) = 12 V
1100
4.99
VO(VCC) – Output Voltage – V
r
DS(on) – Static Drain-Source On-State Resistance – mΩ
TYPICAL CHARACTERISTICS
1000
900
800
700
–40°C
25°C
4.98
4.97
85°C
4.96
125°C
4.95
600
–50
4.94
–25
75
100
0
25
50
TJ – Junction Temperature – °C
125
0.2
0.05
0.1
0.15
IO(VCC) – Output Current – A
0
Figure 18
Figure 19
3.3-V VCC SWITCH
12-V VPP SWITCH
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
3.3
12
11.98
3.29
–40°C
VO(VPP) – Output Voltage – V
VO(VCC) – Output Voltage – V
0.25
25°C
3.28
3.27
85°C
125°C
3.26
–40°C
11.96
25°C
11.94
11.92
85°C
11.9
125°C
11.88
11.86
3.25
11.84
0
0.05
0.1
0.15
0.2
IO(VCC) – Output Current – A
0.25
0
Figure 20
0.03
0.06
0.09
IO(VPP) – Output Current – A
0.12
Figure 21
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
TYPICAL CHARACTERISTICS
5-V VCC SWITCH
3.3-V VCC SWITCH
SHORT-CIRCUIT CURRENT
vs
JUNCTION TEMPERATURE
SHORT-CIRCUIT CURRENT
vs
JUNCTION TEMPERATURE
0.5
I OS(VCC) – Short-Circuit Output Current – A
I OS(VCC) – Short-Circuit Output Current – A
0.54
0.52
0.5
0.48
0.46
0.44
0.42
0.4
–50
–25
0
25
50
75
100
TJ – Junction Temperature – °C
0.48
0.46
0.44
0.42
0.4
0.38
0.36
–50
125
–25
Figure 22
0
25
50
75
100
TJ – Junction Temperature – °C
Figure 23
12-V VPP SWITCH
SHORT-CIRCUIT CURRENT
vs
JUNCTION TEMPERATURE
I OS(VPP) – Short-Circuit Output Current – A
0.28
0.26
0.24
0.22
0.2
0.18
–50
–25
75
100
0
25
50
TJ – Junction Temperature – °C
Figure 24
12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
125
125
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
APPLICATION INFORMATION
overview
PC Cards were initially introduced as a means to add EEPROM (flash memory) to portable computers with
limited on-board memory. The idea of add-in cards quickly took hold; modems, wireless LANs, GPS systems,
multimedia, and hard-disk versions were soon available. As the number of PC Card applications grew, the
engineering community quickly recognized the need for a standard to ensure compatibility across platforms.
To this end, the PCMCIA (Personal Computer Memory Card International Association) was established,
comprised of members from leading computer, software, PC Card, and semiconductor manufacturers. One key
goal was to realize the plug-and-play concept, i.e. cards and hosts from different vendors should be compatible.
PC Card power specification
System compatibility also means power compatibility. The most current set of specifications (PC Card Standard)
set forth by the PCMCIA committee states that power is to be transferred between the host and the card through
eight of the 68 terminals of the PC Card connectors. This power interface consists of two VCC, two VPP, and
four ground terminals. Multiple VCC and ground terminals minimize connector-terminal and line resistance. The
two VPP terminals were originally specified as separate signals, but are commonly tied together in the host to
form a single node to minimize voltage losses. Card primary power is supplied through the VCC terminals;
flash-memory programming and erase voltage is supplied through the VPP terminals.
designing for voltage regulation
The current PCMCIA specification for output voltage regulation of the 5-V output is 5% (250 mV). In a typical
PC power-system design, the power supply will have an output voltage regulation (VPS(reg)) of 2% (100 mV).
Also, a voltage drop from the power supply to the PC Card will result from resistive losses (VPCB) in the PCB
traces and the PCMCIA connector. A typical design would limit the total of these resistive losses to less than
1% (50 mV) of the output voltage. Therefore the allowable voltage drop (VDS) for the TPS2212 is the PCMCIA
voltage regulation less the power supply regulation and less the PCB and connector resistive drops:
V DS
+ VOǒregǓ – VPSǒregǓ
– V PCB
Typically, this would leave 100 mV for the allowable voltage drop across the TPS2212. The voltage drop is the
output current multiplied by the switch resistance of the TPS2212. Therefore, the maximum output current that
can be delivered to the PC Card in regulation is the allowable voltage drop across the TPS2212 divided by the
output switch resistance.
I Omax
V DS
+ rDS
ǒonǓ
The VCC outputs deliver 250 mA continuous at 5 V and 3.3 V within regulation over the operating temperature
range. Using the same equations, the PCMCIA specification for output voltage regulation of the 3.3 V output
is 300 mV. Using the voltage drop percentages for power supply regulation (2%) and PCB resistive loss (1%),
the allowable voltage drop for the 3.3 V switch is 200 mV. The 12-V outputs (VPP) of the TPS2212 can deliver
150 mA continuously.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
13
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
APPLICATION INFORMATION
overcurrent and overtemperature protection
PC Cards are inherently subject to damage from mishandling. Host systems require protection against
short-circuited cards that could lead to power supply or PCB trace damage. Even systems sufficiently robust
to withstand a short circuit would still undergo rapid battery discharge into the damaged PC Card, resulting in
a sudden loss of system power. Most hosts include fuses for protection. The reliability of fused systems is poor
and requires troubleshooting and repair, usually by the manufacturer, when fuses are blown.
The TPS2212 uses sense FETs to check for overcurrent conditions in each of the VCC and VPP outputs. Unlike
sense resistors or polyfuses, these FETs do not add to the series resistance of the switch; therefore voltage and
power losses are reduced. Overcurrent sensing is applied to each output separately. When an overcurrent
condition is detected, only the power output affected is limited; all other power outputs continue to function
normally. The OC indicator, normally a logic high, is a logic low when an overcurrent condition is detected
providing for initiation of system diagnostics and/or sending a warning message to the user.
During power up, the TPS2212 controls the rise time of the VCC and VPP outputs and limits the current into
a faulty card or connector. If a short circuit is applied after power is established (e.g., hot insertion of a bad card),
current is initially limited only by the impedance between the short and the power supply. In extreme cases, as
much as 5 A to 10 A may flow into the short before the current limiting of the TPS2212 engages. If the VCC or
VPP outputs are driven below ground, the TPS2212 may latch nondestructively in an off state. Cycling power
will reestablish normal operation.
Overcurrent limiting for the VCC outputs is designed to activate if powered up into a short in the range of
300 mA to 600 mA, typically at about 450 mA. The VPP outputs limit from 120 mA to 400 mA, typically around
280 mA. The protection circuitry acts by linearly limiting the current passing through the switch rather than
initiating a full shutdown of the supply. Shutdown occurs only during thermal limiting.
Thermal limiting prevents destruction of the IC from overheating if the package power dissipation ratings are
exceeded. Thermal limiting disables power output until the device has cooled.
12-V supply not required
Most PC Card switches use the externally supplied 12 V to power gate drive and other chip functions, which
requires that power be present at all times. The TPS2212 offers considerable power savings by using an internal
charge pump to generate the required higher voltages from the 5-V input. Therefore, the external 12-V supply
can be disabled except when needed for flash-memory functions, thereby extending battery lifetime. Do not
ground the VPPI switch input when the VPPI input is not used. Additional power savings are realized by the
TPS2212 during a software shutdown in which quiescent current drops to a maximum of 1 µA.
3.3-V low-voltage mode
The TPS2212 will operate in a 3.3-V low-voltage mode when 3.3 V is the only available input voltage
(VI(5V) = 0). This allows host and PC Cards to be operated in low-power 3.3-volts-only modes such as sleep or
pager modes. Note that in these operation modes, the TPS2212 will derive its bias current from the 3.3-V input
pin and only 3.3 V can be delivered to the PC Card.
14
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
APPLICATION INFORMATION
voltage transitioning requirement
PC Cards are migrating from 5 V to 3.3 V to minimize power consumption, optimize board space, and increase
logic speeds. The TPS2212 meets all combinations of power delivery as currently defined in the PCMCIA
standard. The latest protocol accommodates mixed 3.3-V/5-V systems by first powering the card with 5 V, then
polling it to determine its 3.3-V compatibility. The PCMCIA specification requires that the capacitors on 3.3-V
compatible cards be discharged to below 0.8 V before applying 3.3-V power. This functions as a power reset
and ensures that sensitive 3.3-V circuitry is not subjected to any residual 5-V charge. The TPS2212 offers a
selectable VCC and VPP ground state, in accordance with PCMCIA 3.3-V/5-V switching specifications.
output ground switches
PC Card specification requires that VCC be discharged within 100 ms. PC Card resistance can not be relied on
to provide a discharge path for voltages stored on PC Card capacitance because of possible high-impedance
isolation by power-management schemes.
power-supply considerations
The TPS2212 has multiple pins for each of its 3.3-V and 5-V power inputs and for the switched VCC outputs.
Any individual pin can conduct the rated input or output current. Unless all pins are connected in parallel, the
series resistance is significantly higher than that specified, resulting in increased voltage drops and lost power.
It is recommended that all input and output power pins be paralleled for optimum operation.
To increase the noise immunity of the TPS2212, the power supply inputs should be bypassed with a 1-µF
electrolytic or tantalum capacitor paralleled by a 0.047-µF to 0.1-µF ceramic capacitor. It is strongly
recommended that the switched outputs be bypassed with a 0.1-µF, or larger, ceramic capacitor; doing so
improves the immunity of the TPS2212 to electrostatic discharge (ESD). Care should be taken to minimize the
inductance of PCB traces between the TPS2212 and the load. High switching currents can produce large
negative voltage transients, which forward biases substrate diodes, resulting in unpredictable performance.
Similarly, no pin should be taken below – 0.3 V.
calculating junction temperature
The switch resistance, rDS(on), is dependent on the junction temperature, TJ, of the die and the current through
the switch. To calculate TJ, first find rDS(on) from Figures 16 through 18 using an initial temperature estimate
about 50°C above ambient. Then calculate the power dissipation for each switch, using the formula:
PD
+ rDSǒonǓ
ǒȍ
I2
Ǔ)
Next, sum the power dissipation and calculate the junction temperature:
TJ
+
PD
R qJA
T A, R qJA
+ 108°CńW
Compare the calculated junction temperature with the initial temperature estimate. If the temperatures are not
within a few degrees of each other, recalculate using the calculated temperature as the initial estimate.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
15
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
APPLICATION INFORMATION
ESD protection
All TPS2212 inputs and outputs incorporate ESD-protection circuitry designed to withstand a 2-kV human-bodymodel discharge as defined in MIL-STD-883C, Method 3015. The VCC and VPP outputs can be exposed to potentially higher discharges from the external environment through the PC Card connector. Bypassing the outputs
with 0.1-µF capacitors protects the devices from discharges up to 10 kV.
TPS2212
Card B
3.3 V
3.3 V
5V
5V
3.3 V to 12 V
VPPI
3
S1
4
S2
5
S3
13
12
11
CS
VCC1
51
VCC2
S4
6
S5
9
17
S6
CS
18
10
52
Vpp1
Vpp2
See Note A
CPU
16
15
Controller
14
1
2
8
Internal
Current Monitor
SHDN
Thermal
VPPD0
VPPD1
VCCD0
VCCD1
OC
GND
7
NOTE A: MOSFET switch S6 has a back-gate diode from the source to the drain. Unused switch inputs should never be grounded.
Figure 25. Internal Switching Matrix, TPS2212 Control Logic
16
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
APPLICATION INFORMATION
TPS2212 control logic
VPP
CONTROL SIGNALS
INTERNAL SWITCH SETTINGS
SHDN
VPPD0
VPPD1
S4
1
0
0
1
0
1
1
1
OUTPUT
S5
S6
VPP
CLOSED
OPEN
OPEN
0V
OPEN
CLOSED
OPEN
VCC†
0
OPEN
OPEN
CLOSED
VPPI
1
1
1
OPEN
OPEN
OPEN
Hi-Z
0
X
X
OPEN
OPEN
OPEN
Hi-Z
† Output depends on AVCC
VCC
CONTROL SIGNALS
INTERNAL SWITCH SETTINGS
OUTPUT
SHDN
VCCD1
VCCD0
S1
S2
S3
VCC
1
0
0
CLOSED
OPEN
OPEN
0V
1
0
1
OPEN
CLOSED
OPEN
3.3 V
1
1
0
OPEN
OPEN
CLOSED
5V
1
1
1
CLOSED
OPEN
OPEN
0V
0
X
X
OPEN
OPEN
OPEN
Hi-Z
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
17
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
APPLICATION INFORMATION
12-V flash memory supply
The TPS6734 is a fixed 12-V output boost converter capable of delivering 120 mA from inputs as low as
2.7 V. The device is pin-for-pin compatible with the MAX734 regulator and offers the following advantages: lower
supply current, wider operating input-voltage range, and higher output currents. As shown in Figure 26, the only
external components required are: an inductor, a Schottky rectifier, an output filter capacitor, an input filter
capacitor, and a small capacitor for loop compensation. The entire converter occupies less than 0.7 in2 of PCB
space when implemented with surface-mount components. An enable input is provided to shut the converter
down and reduce the supply current to 3 µA when 12 V is not needed.
The TPS6734 is a 170-kHz current-mode PWM ( pulse-width modulation) controller with an n-channel MOSFET
power switch. Gate drive for the switch is derived from the 12-V output after start-up to minimize the die area
needed to realize the 0.7-Ω MOSFET and improve efficiency at input voltages below 5 V. Soft start is
accomplished with the addition of one small capacitor. A 1.22-V reference (pin 2) is brought out for external use.
For additional information, see the TPS6734 data sheet (SLVS127).
3.3 V or 5 V
R1
10 kΩ
ENABLE
(see Note A)
C1
33 µF, 20 V
TPS6734
1
VCC
EN
+
2
REF
3
SS
FB
8
7
U1
OUT
4
D1
6
5
COMP
L1
18 µH
GND
C2
0.01 µF
12 V
TPS2212
VCC
C5
+
33 µF, 20 V
12V
VCC
VCC
VPPI
0.1 µF
C4 0.001 µF
VPP
0.1 µF
5V
5V
0.1 µF
1 µF
0.1 µF
1 µF
3.3 V
5V
3.3V
VCCD0
3.3V
VCCD1
VPPD0
VPPD1
OC
GND
SHDN
NOTE A: The enable terminal can be tied to a generall purpose I/O terminal on the PCMCIA controller or tied high.
Figure 26. TPS2212 With TPS6734 12-V, 120-mA Supply
18
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
To CPU
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193A – APRIL 1999 – REVISED JANUARY 2001
MECHANICAL DATA
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
28 PIN SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,15 NOM
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°– 8°
1,03
0,63
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
8
14
16
20
24
28
30
38
A MAX
3,30
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
2,70
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 / C 10/95
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
19
PACKAGE OPTION ADDENDUM
www.ti.com
27-Feb-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS2212IDB
ACTIVE
SSOP
DB
16
80
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2212IDBG4
ACTIVE
SSOP
DB
16
80
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2212IDBR
ACTIVE
SSOP
DB
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2212IDBRG4
ACTIVE
SSOP
DB
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TPS2212IDBR
Package Package Pins
Type Drawing
SSOP
DB
16
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
2000
330.0
16.4
Pack Materials-Page 1
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
8.2
6.6
2.5
12.0
16.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS2212IDBR
SSOP
DB
16
2000
346.0
346.0
33.0
Pack Materials-Page 2
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