19-2833; Rev 1; 9/03 MAX9760/MAX9761 Evaluation System/Evaluation Kit Features ♦ 4.5V to 5.5V Single-Supply Operation ♦ 3W Stereo Bridge-Tied-Load (BTL) Amplifier ♦ 100dB Power-Supply Rejection Ratio ♦ SMBus/I2C-Compatible 2-Wire Serial Interface ♦ 2:1 Stereo Input MUX ♦ Selectable Bass-Boost Circuitry ♦ No Detectable Clicks or Pops ♦ Easy-to-Use, Menu-Driven Software ♦ Assembled and Tested ♦ Software-Controlled Mute, Shutdown, Input Selection, and Gain ♦ Automatic Headphone-Sensing Circuitry ♦ Includes Windows 98/2000/XP-Compatible Software and Demo PC Board ♦ Evaluates the MAX9760–MAX9763 The MAX9760EVSYS includes both the EV kit and the MAXSMBUS interface board. Order the MAX9760EVKIT if you already have an SMBus interface. The MAX9761 EV kit functions as a stand-alone unit, the MAXSMBUS interface is not required. SMBus is a trademark of Intel Corp. Windows is a registered trademark of Microsoft Corp. I2C is a trademark of Philips Corp. Purchase of I2C components of Maxim Integrated Products, Inc., or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. Ordering Information IC PACKAGE SMBus INTERFACE TYPE 28 QFN Not included PART TEMP RANGE MAX9760EVKIT 0°C to +70°C MAX9760EVSYS 0°C to +70°C 28 QFN MAXSMBUS MAX9761EVKIT 0°C to +70°C 28 QFN Not required Block Diagram SINGLE SUPPLY 4.5V TO 5.5V INPUT L1 INPUT L2 LEFT INPUT R1 INPUT R2 RIGHT HPS SE/ BTL I2C COMPATIBLE SMBUS/I2CCOMPATIBLE INTERFACE Note: To evaluate the MAX9762, or MAX9763, request a MAX9762ETI or MAX9763ETI free sample with the MAX9760EVKIT. To evaluate the MAX9761, order the MAX9761EVKIT. The MAX9760 EV kit software is provided with the MAX9760EVKIT; however, the MAXSMBUS board is Figure 1. MAX9760/61 EV Kit Block Diagram required to interface the EV kit to the computer when using the included software. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 Evaluates: MAX9760—MAX9763 General Description The MAX9760 evaluation system (EV system) consists of a MAX9760 evaluation kit (EV kit) and a companion Maxim System Management Bus (SMBus™) interface board. The MAX9760 EV kit is also capable of evaluating the MAX9761/MAX9762/MAX9763. The MAX9760 EV kit is a fully assembled and tested surface-mount circuit board that evaluates the MAX9760 3W stereo audio power amplifier plus headphone driver. The EV kit is designed to be driven by any stereo audio source such as a CD player. The EV kit includes RCA jacks on the inputs, a 3.5mm headphone jack, and terminal blocks on the outputs to facilitate easy connections to the circuit board. The EV kit includes Windows®98/2000/XP-compatible software, which provides a user interface for exercising the MAX9760’s features. The Maxim SMBus interface board (MAXSMBUS) allows an IBM-compatible PC to use its parallel port to emulate an SMBus/I2C™ 2-wire interface. Windows 98/2000/XPcompatible software provides a user-friendly interface to exercise the MAX9760 features. The program is menu driven and offers a graphical user interface (GUI) with control buttons and a status display. MAX9760/MAX9761 Evaluation System/Evaluation Kit Evaluates: MAX9760—MAX9763 Component List DESIGNATION C1–C4 C5, C6, C16 C7, C8 C9, C10, C11, C14, C15 QTY 4 3 2 5 DESCRIPTION 0.68µF ±10%, 20V tantalum capacitors (R-case) AVX TAJR684K020 100pF ±5%, 50V C0G ceramic capacitors (0402) TDK C1005C0G1H101J 0.047µF ±10%, 16V X7R ceramic capacitors (0402) TDK C1005X7R1C473K DESIGNATION QTY R13, R14 2 DESCRIPTION 1kΩ ±5% resistors (0402) R17 1 680kΩ ±5% resistor (0402) R19 1 47kΩ ±5% resistor (0402) J1, J3 2 Phono jacks, white J2, J4 2 Phono jacks, red J5 1 Switched stereo headphone jack (3.5mm dia) 2 x 10 right-angle female receptacle J6 1 JU1 1 Jumper, dual row, 12-pin header 220µF ±20%, 6.3V tantalum capacitors (C-case) AVX TPSC227M006R0250 JU2–JU5 4 3-pin headers JU6 1 2-pin header JU7 0 Not installed (SIP-3) TB1, TB2 2 2-circuit terminal blocks U1 1 MAX9760ETI (28-pin QFN) None 6 Shunts None 1 MAX9760 PC Board None 1 Software disk (CD-ROM) MAX9760 Evaluation Kit C12, C13 2 1.0µF ±20%, 10V X7R ceramic capacitors (0603) TDK C1608X7R1A105M R1–R6, R18 7 15.0kΩ ±1% resistors (0402) R7, R8 2 33.2kΩ ±1% resistors (0402) R9, R10 2 27.4kΩ ±1% resistors (0402) R11, R12, R15, R16 4 10kΩ ±5% resistors (0402) Component Suppliers SUPPLIER AVX PHONE FAX 843-946-0238 843-626-3123 TDK 847-803-6100 847-390-4405 Note: Please indicate that you are using the MAX9760 when contacting these component suppliers. Quick Start Recommended Equipment • Computer running Windows 98, 2000, or XP • Parallel printer port (this is a 25-pin socket on the back of the computer) • Standard 25-pin, straight-through, male-to-female cable (printer extension cable) to connect the computer’s parallel port to the Maxim SMBus interface board • • • • 9V/100mA DC power supply (for the SMBus card) 5V/4A DC power supply One pair of headphones (16Ω or greater) Two stereo audio sources (to demonstrate the input mux feature) • One pair of speakers (3Ω or greater) 2 WEBSITE www.avxcorp.com www.component.tdk.com Procedure The MAX9760 EV kit is fully assembled and tested. Follow the steps below to verify board operation. Do not turn on the power supply until all connections are completed: 1) Carefully connect the boards by aligning the 20-pin connector of the MAX9760 EV kit with the 20-pin header of the MAXSMBUS interface board. Gently press them together. 2) Ensure that a shunt is placed across pins 1 and 2 of jumpers JU1, JU4, and JU5. 3) Ensure that jumpers JU2 and JU3 do not have a shunt placed on them. 4) Ensure that a shunt is installed on jumper JU6. 5) Connect a cable from the computer’s parallel port to the SMBus interface board. Use a straight-through _______________________________________________________________________________________ MAX9760/MAX9761 Evaluation System/Evaluation Kit 7) Connect the 9V power supply to the pads labeled POS9 and GND1 of the SMBus interface board. 8) Connect the 5.0V power supply to the pads labeled VDD and GND on the MAX9760 EV kit board. 9) Ensure that both stereo audio sources are turned off. 10) Connect the first stereo audio source to the input jacks labeled J1 and J2. 11) Connect the second stereo audio source to the input jacks labeled J3 and J4. 12) Plug the headphones into the 3.5mm headphone jack labeled J5. 13) Connect the speakers to the terminal blocks labeled TB1 and TB2. 14) Turn on the DC power supplies. 15) Enable the stereo audio sources. 16) Start the MAX9760 program by opening its icon in the Start menu. 17) Normal device operation can be verified by the SMBus Status: DUT Board Found text in the Interface box. Figure 2. MAX9760 EV Kit Software Main Window _______________________________________________________________________________________ 3 Evaluates: MAX9760—MAX9763 25-pin male-to-female cable. To avoid damaging the EV kit or your computer, do not use a 25-pin SCSI port or any other connector that is physically similar to the 25-pin parallel printer port. 6) The MAX9760.EXE software program can be run from the CD-ROM or hard drive. Use the Windows program manager to run the program. If desired, you may use the INSTALL.EXE program to copy the files and create icons in the Windows 98/2000/XP Start menu. Do not turn on the power until all connections are made. Evaluates: MAX9760—MAX9763 MAX9760/MAX9761 Evaluation System/Evaluation Kit Detailed Description of Software User-Interface Panel The user interface (shown in Figure 2) is easy to operate; use the mouse, or a combination of the Tab and Arrow keys to manipulate the software. Each of the buttons corresponds to bits in the command and configuration bytes. By clicking on them, the correct SMBus write operation is generated to update the internal registers of the MAX9760. The Interface box indicates the current Device Address, the Register Address, and the Data Sent/Received for the last read/write operation. This data is used to confirm proper device operation. Note: Words in boldface are user-selectable features in the software. Signal Input Selection The MAX9760 EV kit can route one of two independent stereo signals to the speakers or headphones. The input signal is selected by choosing the desired option in the Signal Input Selection box. Choosing Signal Input #1, routes the signal from input jacks J1 and J2. Choosing Signal Input #2, routes the signal from input jacks J3 and J4. MAX9760 Status The program continually polls the device for new status data and monitors the alert conditions. To disable continuous polling of data, uncheck the Automatic Read checkbox. If an interrupt condition is generated by the headphones being inserted, the message INTERRUPT appears. Speaker/Headphone Control Selecting the desired option in the Speaker/Headphone Control box allows the MAX9760 EV kit to operate in one of three independent modes. The Automatic mode (default) detects the insertion of the headphones in jack J5. The speaker outputs are disabled if the headphones are present, and enabled if the headphones are absent. Selecting the Speaker Mode (BTL) provides drive to the speakers and headphones (if both are present). Selecting the Headphone Mode (Single-Ended) provides drive to the headphones only. Software Mute and Shutdown Control Selecting the desired option in the Mute and Shutdown Control box allows the MAX9760 EV kit to disable the left, right, or both output channels. Checking the Mute Left option mutes the left channel. Checking the Mute Right option mutes the right channel. Checking the Mute Left+Right option mutes both channels. Checking the Shutdown all Audio Circuitry places the MAX9760 into a low-power shutdown mode. 4 Output Gain Selection Selecting the desired option in the Output Gain Selection box allows the MAX9760 EV kit to amplify the chosen input signal using one of two different gains. Selecting Gain A (with Bass-Boost) amplifies the input signal using the feedback networks connected to the GAINRA and GAINLA pins of the MAX9760. Selecting Gain B (Flat) amplifies the input signal using the feedback networks connected to the GAINRB and GAINLB pins. When the device is in Automatic mode, the output gain is dependent on the insertion of the headphones. Refer to the MAX9760–MAX9763 data sheet for more details. Simple SMBus Commands There are two methods for communicating with the MAX9760: through the normal user-interface panel or through the SMBus commands available by selecting the 2-Wire Interface Diagnostic item from the Options pulldown menu. A display pops up that allows the SMBus protocols, such as Read Byte and Write Byte, to be executed. To stop normal user-interface execution so that it does not override the manually set values, turn off the update timer by unchecking the Automatic Read checkbox. The SMBus dialog boxes accept numeric data in binary, decimal, or hexadecimal. Hexadecimal numbers should be prefixed by $ or 0x. Binary numbers must be exactly eight digits. See Figure 3 for an example of this tool. Note: In places where the slave address asks for an 8-bit value, it must be the 7-bit slave address of the MAX9760 as determined by ADD with the last bit set to 1 for a read operation or a zero for a write. Refer to the MAX9760 data sheet for a complete list of registers and functions. Detailed Description of Hardware The MAX9760 EV kit is a stereo, single-supply speaker/headphone amplifier. The EV kit is designed to be driven by any stereo audio source. The input impedance is 15kΩ. The EV kit is shipped with components selected to produce a bass-boosted frequency response (6dB, fc = 100Hz) and a 0dB flatfrequency response. The EV kit is powered with a 4.5V to 5.5V supply. A highpass filter is implemented on the MAX9760 EV kit. The lower 16Hz, -3dB corner frequency is dependent on components R1, R4, and C1, C4, C9, and C10. Multiple input and output jacks facilitate easy connections to the board. Connect the speakers to terminal blocks TB1 and TB2. Connect the two stereo input sources through jacks J1, J2 and J3, J4. Connect the headphones through jack J5. _______________________________________________________________________________________ MAX9760/MAX9761 Evaluation System/Evaluation Kit Address Selection Manual Headphone Sense Control Jumper JU1 sets the MAX9760 slave address. The default address is 1001 001Y (ADD = VDD). See Table 1 for a complete list of addresses. Note: The first 7 bits shown are the address. Y (bit 0) is the SMBus read/write bit. This bit is a 1 for a read operation or a zero for a write. To simulate a pair of headphones being inserted into the headphone jack J5, remove the shunt from jumper JU6. Connect the load to the LEFT, RIGHT, and GND pads located by headphone jack J5 (see Table 3 for jumper settings). Hardware Shutdown Control The MAX9760 EV kit includes circuitry to increase the low-frequency (bass) response. To alter the bass response (see Figure 4), follow the steps below: 1) Choose appropriate gains A1 and A2. 2) Choose the center frequency fc. Jumper JU5 controls the shutdown function of the MAX9760 EV kit. Removing the shunt from JU5 allows the shutdown function to be controlled by an external signal source connected to the SHDN pad. See Table 2 for shutdown shunt positions. Bass-Boost Table 1. Shunt Settings for SMBus Address JUMPER JU1 MAX9760 ADDRESS SHUNT POSITION MAX9760 ADDRESS PIN BINARY HEXADECIMAL 1–2* VDD 1001 001Y 0x92 3–4 SDA 1001 010Y 0x94 5–6 SGND 1001 000Y 0x90 7–8 SCL 1001 011Y 0x96 9–10 11–12 Not used for the MAX9760 or the MAX9762 (see the Gain Selection Table for more details). *Default configuration. _______________________________________________________________________________________ 5 Evaluates: MAX9760—MAX9763 Figure 3. The above example shows a simple SMBusWriteByte operation using the included 2-Wire Interface Diagnostics. In this example, the software is writing data (0x18) to Device Address 0x92, Register Address 0x01. The above data sequence mutes both output channels of the MAX9760. Evaluates: MAX9760—MAX9763 MAX9760/MAX9761 Evaluation System/Evaluation Kit 3) Calculate and install components R7–R10, C7, and C8 using equations 1, 2, and 3. OUTPUT MAGNITUDE (dB) A1 R7 = R8 = 10 20 × 15kΩ (Eq1) A1 R × 10 20 × 15kΩ R9 = R10 = 7 A1 R7 − 10 20 × 15kΩ C7 = C8 = 1 2πfC R7 × R9 A1 A1 + A2 2 (Eq2) A2 FREQUENCY (Hz) fC (Eq3) where: A1 = bass-boosted gain (dB) A2 = nonbass-boosted gain (dB) fc = center frequency (Hz). Evaluating the MAX9761 MAX9761 Shutdown Control Jumper JU5 controls the shutdown function of the MAX9761. Removing the shunt from JU5 allows the shutdown function to be controlled by an external signal source connected to the SHDN pad. See Table 4 for shutdown shunt positions. Figure 4. The Bass-Boost Components Create an Output Magnitude Response Similar to the Diagram Shown Above Table 2. MAX9760 Shutdown Selection JUMPER JU5 SHUNT POSITION 1–2* MAX9760 enabled 2–3 MAX9760 shut down *Default configuration. Table 3. MAX9760 Manual Headphone Sense Control JUMPER SHUNT POSITION MAX9761 Gain Selection Jumper JU1 controls the gain selection of the MAX9761. The gain selection function can be set to select gain A or gain B. Alternatively, the gain selection can be controlled by an external signal source through the GAINA/B pad. Gain selection can also be controlled by the headphone sense pin, which enables automatic gain selection. See Table 5 for gain selection shunt positions. MAX9761 Headphone Sense Enable Jumper JU4 controls the HPS_EN pin of the MAX9761. Alternatively, the shunt can be removed from JU4 and the HPS_EN pin can be driven by an external signal source connected to the HPS_EN pad. The HPS_EN pin in conjunction with the HPS pin determines the output mode of the MAX9761. Refer to the MAX9760– MAX9763 data sheet for more details. See Table 6 for headphone sense enable shunt positions. DESCRIPTION Installed* JU6 Not installed DESCRIPTION MAX9760 EV kit headphone sense controlled by the insertion of headphones MAX9760 EV kit headphone sense switch forced open *Default configuration. Table 4. MAX9761 Shutdown Selection JUMPER JU5 SHUNT POSITION DESCRIPTION 1–2* MAX9761 enabled 2–3 MAX9761 shutdown Not installed SHDN function controlled by an external signal source *Default configuration. MAX9761 Mute Control Jumper JU3 controls the Mute function of the MAX9761. Alternatively, the shunt can be removed from JU3 allowing the mute function to be driven by an 6 external signal source connected to the MUTE pad. See Table 7 for mute shunt positions. _______________________________________________________________________________________ MAX9760/MAX9761 Evaluation System/Evaluation Kit JUMPER SHUNT POSITION MAX9761 GAINA/B PIN 1–2* VDD Gain B selected 3–4 SDA Not valid 5–6 DGND 7–8 SCL DESCRIPTION Gain A selected Not valid 9–10 GAINA/B pad Gain selection controlled by an external signal source 11–12 HPS pin of MAX9761 Automatic gain selection mode JU1 *Default configuration. Table 6. MAX9761 Headphone Sense Enable Selection JUMPER JU4 SHUNT POSITION DESCRIPTION 1–2* HPS_EN pin tied high 2–3 HPS_EN pin tied low Not installed HPS_EN pin controlled by an external signal source *Default configuration. Table 7. MAX9761 Mute Control JUMPER SHUNT POSITION 1–2 JU3 2–3* Not installed DESCRIPTION Output disabled Output enabled Mute function controlled by an external signal source *Default configuration. MAX9761 Input Selection Jumper JU2 controls the input selection function of the MAX9761. Alternatively, the shunt can be removed from JU2 allowing the input selection function to be driven by an external signal source connected to the IN1/2 pad. See Table 8 for input selection shunt positions. Evaluating the MAX9762 and MAX9763 The MAX9760 EV kit is also capable of evaluating the SMBus/I2C-compatible MAX9762 and the parallel-drive MAX9763. To evaluate the MAX9762 or MAX9763 mono speaker/headphone driver, follow the directions given below. When evaluating the MAX9763, ensure that the MAX9760 EV kit is not connected to the MAXSMBUS board, as undesirable device operation may occur. Hardware Setup The MAX9760 EV kit must be modified to evaluate the MAX9762 or MAX9763 mono speaker/headphone driver: 1) Replace the MAX9760 with MAX9762 or MAX9763. 2) Cut the trace between pins 2 and 3 of jumper JU7. 3) Install a 3-pin header into the location designated by JU7. 4) Install a shunt on pins 1–2 of jumper JU7. The mono speaker output is accessed through the terminal block designated TB2. Software Control and Gain Selection The MAX9762 can be controlled with the provided MAX9760 EV kit software. Unlike the MAX9760, the MAX9762 and MAX9763 have an additional gain for the mono speaker. The feedback network that controls the mono gain is composed of components R18 and C16. If the output is forced into speaker mode (BTL), the mono gain is selected regardless of the A/B gain. If the output is forced into headphone mode (single ended), the output gain is either A or B. Refer to the MAX9760–MAX9763 data sheet for more details. Table 8. MAX9761 Input Selection JUMPER JU2 SHUNT POSITION DESCRIPTION 1–2 Input 2 selected 2–3* Input 1 selected Not installed Input selection controlled by an external signal source *Default configuration. _______________________________________________________________________________________ 7 Evaluates: MAX9760—MAX9763 Table 5. MAX9761 Gain Selection Evaluates: MAX9760—MAX9763 MAX9760/MAX9761 Evaluation System/Evaluation Kit J6 VDD HEADER 20 PIN J6-2 J6-3 SDA J6-4 J6-7 SCL J6-5 J6-9 J6-6 J6-11 J6-8 J6-13 J6-10 J6-15 J6-12 J6-17 J6-14 J6-20 J6-16 VDD INT C14 220µF 6.3V VDD C13 1µF VDD GND C15 220µF 6.3V SGND C16 100pF R13 1kΩ RPGND LPGND 11 25 RPGND LPGND DGND VDD PVDD 1 J6-1 J6-18 2 R14 1kΩ J6-19 JU2 28 PVDD VDD GND SCL 18 JU7 1 MUTE R18 15kΩ 1% SDA 2 IN1/2 3 3 SCL VDD 1 DGND 2 R15 10kΩ JU3 SCL DGND 1 C8 SGND 0.047µF SDA GAINRA 3 21 VDD 1 2 R16 10kΩ SDA DGND JU4 2 JU5 INT 3 DGND SHDN J1 C1 0.68µF 20V 2 1 SGND J2 C3 0.68µF 20V 2 1 SGND J4 C2 0.68µF 20V 2 1 SGND J3 14 C4 0.68µF 20V 2 1 R1 15kΩ 1% R2 15kΩ 1% R6 15kΩ 1% INL1 OUTR- 19 R4 15kΩ 1% 6 GAINLA SDA JU1-2 JU1-4 JU1-3 JU1-5 JU1-6 SCL JU1-8 JU1-7 DGND GAINA/B JU1-9 JU1-10 HPS 16 JU1-12 JU1-11 20 4 17 HPS 7 INR2 R17 680kΩ 8 RIGHT R5 15kΩ 1% C9 220µF 6.3V ADD SVDD OUTL+ BIAS OUTL- 13 9 23 C12 1µF SGND VDD C5 100pF PGND PGND PGND PGND DGND RPGND R7 33.2kΩ 1% 15 C11 220µF 6.3V TB2-2 R9 27.4kΩ 1% HEADER 12 PIN JU1-1 TB2-1 TERMINAL BLOCK R19 47kΩ SGND JU1 SHDN R12 10kΩ C7 0.047µF GAINLB VDD 26 INR1 INL2 SHDN C10 220µF 6.3V 24 TB2 RIGHT HPS R3 15kΩ 1% HPS HPS 22 SHDN OUTR+ 5 HPS_EN INT C6 100pF GAINRB 2 GAINA/B GAINA/B U1 INT MAX9760 DGND R10 27.4kΩ 1% R8 33.2kΩ 1% 3 1 LPGND 27 JU6 10 12 TB1 LEFT TB1-1 J5 4 3 2 1 GND R11 10kΩ TB1-2 TERMINAL BLOCK SGND LPGND RPGND Figure 5. MAX9760 EV Kit Schematic 8 SGND 3 _______________________________________________________________________________________ LEFT MAX9760/MAX9761 Evaluation System/Evaluation Kit Evaluates: MAX9760—MAX9763 Figure 6. MAX9760 EV Kit Component Placement Guide—Component Side Figure 7. MAX9760 EV Kit PC Board Layout—Component Side _______________________________________________________________________________________ 9 Evaluates: MAX9760—MAX9763 MAX9760/MAX9761 Evaluation System/Evaluation Kit Figure 8. MAX9760 EV Kit PC Board Layout—Inner Layer 2 Figure 9. MAX9760 EV Kit PC Board Layout—Inner Layer 3 10 ______________________________________________________________________________________ MAX9760/MAX9761 Evaluation System/Evaluation Kit Evaluates: MAX9760—MAX9763 Figure 10. MAX9760 EV Kit PC Board Layout—Solder Side ______________________________________________________________________________________ 11 Evaluates: MAX9760—MAX9763 MAX9760/MAX9761 Evaluation System/Evaluation Kit J6 VDD HEADER 20 PIN J6-2 J6-3 SDA J6-4 J6-7 SCL J6-5 J6-9 J6-6 J6-11 J6-8 J6-13 J6-10 J6-15 J6-12 J6-17 J6-14 J6-20 J6-16 VDD INT C14 220µF 6.3V VDD C13 1µF VDD GND C15 220µF 6.3V SGND C16 100pF R13 1kΩ RPGND LPGND 11 25 RPGND LPGND DGND VDD PVDD 1 J6-1 J6-18 2 R14 1kΩ J6-19 JU2 28 PVDD VDD GND IN1/2 18 JU7 1 MUTE R18 15kΩ 1% SDA 2 IN1/2 3 3 SCL VDD 1 DGND 2 R15 10kΩ JU3 SCL DGND 1 C8 SGND 0.047µF MUTE GAINRA 3 21 VDD 1 2 R16 10kΩ SDA DGND JU4 2 JU5 INT 3 DGND SHDN J1 C1 0.68µF 20V 2 1 SGND J2 C3 0.68µF 20V 2 1 SGND J4 C2 0.68µF 20V 2 1 SGND J3 14 C4 0.68µF 20V 2 1 R1 15kΩ 1% R2 15kΩ 1% R6 15kΩ 1% INL1 OUTR- 19 R4 15kΩ 1% 6 GAINLA SDA JU1-2 JU1-4 JU1-3 JU1-5 JU1-6 SCL JU1-8 JU1-7 DGND GAINA/B JU1-9 JU1-10 HPS 16 JU1-12 JU1-11 20 4 17 HPS 7 INR2 R17 680kΩ 8 RIGHT R5 15kΩ 1% C9 220µF 6.3V GAINA/B SVDD OUTL+ BIAS OUTL- 13 9 23 C12 1µF SGND VDD C5 100pF PGND PGND PGND PGND DGND RPGND R7 33.2kΩ 1% 15 C11 220µF 6.3V TB2-2 R9 27.4kΩ 1% HEADER 12 PIN JU1-1 TB2-1 TERMINAL BLOCK R19 47kΩ SGND JU1 SHDN R12 10kΩ C7 0.047µF GAINLB VDD 26 INR1 INL2 SHDN C10 220µF 6.3V 24 TB2 RIGHT HPS R3 15kΩ 1% HPS HPS 22 SHDN OUTR+ 5 HPS_EN INT C6 100pF GAINRB 2 GAINA/B GAINA/B U1 HPS_EN MAX9761 DGND R10 27.4kΩ 1% R8 33.2kΩ 1% 3 1 LPGND 27 JU6 10 12 TB1 LEFT TB1-1 J5 4 3 2 1 GND R11 10kΩ TB1-2 TERMINAL BLOCK SGND LPGND RPGND Figure 11. MAX9761 EV Kit Schematic 12 SGND 3 ______________________________________________________________________________________ LEFT MAX9760/MAX9761 Evaluation System/Evaluation Kit Evaluates: MAX9760—MAX9763 J6 VDD HEADER 20 PIN J6-2 J6-3 SDA J6-4 J6-7 SCL J6-5 J6-9 J6-6 J6-11 J6-8 J6-13 J6-10 J6-15 J6-12 J6-17 J6-14 J6-20 J6-16 VDD INT C14 220µF 6.3V VDD C13 1µF VDD GND C15 220µF 6.3V SGND C16 100pF R13 1kΩ RPGND LPGND 11 25 RPGND LPGND DGND VDD PVDD 1 J6-1 J6-18 2 R14 1kΩ J6-19 JU2 28 PVDD VDD GAINM SCL 18 JU7 1 MUTE R18 15kΩ 1% SDA 2 IN1/2 3 3 SCL VDD 1 DGND 2 R15 10kΩ JU3 SCL DGND 1 C8 SGND 0.047µF SDA GAINRA 3 21 VDD 1 2 R16 10kΩ SDA DGND JU4 2 JU5 INT 3 DGND SHDN J1 C1 0.68µF 20V 2 1 SGND J2 C3 0.68µF 20V 2 1 SGND J4 C2 0.68µF 20V 2 1 SGND J3 14 C4 0.68µF 20V 2 1 R1 15kΩ 1% R2 15kΩ 1% R6 15kΩ 1% INL1 OUTR- 19 R4 15kΩ 1% 6 GAINLA SDA JU1-2 JU1-4 JU1-3 JU1-5 JU1-6 SCL JU1-8 JU1-7 DGND GAINA/B JU1-9 JU1-10 HPS 16 JU1-12 JU1-11 20 4 17 HPS 7 INR2 R17 680kΩ 8 RIGHT R5 15kΩ 1% C9 220µF 6.3V ADD SVDD OUTL+ BIAS N.C. 13 9 23 C12 1µF SGND VDD C5 100pF GND PGND PGND PGND DGND RPGND R7 33.2kΩ 1% 15 C11 220µF 6.3V TB2-2 R9 27.4kΩ 1% HEADER 12 PIN JU1-1 TB2-1 TERMINAL BLOCK R19 47kΩ SGND JU1 SHDN R12 10kΩ C7 0.047µF GAINLB VDD 26 INR1 INL2 SHDN C10 220µF 6.3V 24 TB2 MONO HPS R3 15kΩ 1% HPS HPS 22 SHDN OUTR+ 5 HPS_EN INT C6 100pF GAINRB 2 GAINA/B GAINA/B U1 INT MAX9762 DGND R10 27.4kΩ 1% R8 33.2kΩ 1% 3 1 SGND 3 LPGND 27 JU6 10 12 GND R11 10kΩ TB1 N.C. TB1-1 J5 4 3 2 1 TB1-2 TERMINAL BLOCK SGND LPGND LEFT RPGND Figure 12. MAX9760 EV Kit Schematic (Modified for MAX9762) ______________________________________________________________________________________ 13 Evaluates: MAX9760—MAX9763 MAX9760/MAX9761 Evaluation System/Evaluation Kit J6 VDD HEADER 20 PIN J6-2 J6-3 SDA J6-4 J6-7 SCL J6-5 J6-9 J6-6 J6-11 J6-8 J6-13 J6-10 J6-15 J6-12 J6-17 J6-14 J6-20 J6-16 VDD INT C14 220µF 6.3V VDD C13 1µF VDD GND C15 220µF 6.3V SGND C16 100pF R13 1kΩ RPGND LPGND 11 25 RPGND LPGND DGND VDD PVDD PVDD 1 J6-1 J6-18 2 R14 1kΩ J6-19 JU2 28 VDD GAINM IN1/2 18 JU7 1 MUTE R18 15kΩ 1% SDA 2 IN1/2 3 3 SCL VDD 1 DGND 2 R15 10kΩ JU3 SCL DGND 1 C8 SGND 0.047µF MUTE GAINRA 3 21 VDD 1 2 R16 10kΩ SDA DGND JU4 2 JU5 INT 3 DGND SHDN J1 C1 0.68µF 20V 2 1 SGND J2 C3 0.68µF 20V 2 1 SGND J4 C2 0.68µF 20V 2 1 SGND J3 14 C4 0.68µF 20V 2 1 R1 15kΩ 1% R2 15kΩ 1% R6 15kΩ 1% INL1 OUTR- 19 R4 15kΩ 1% 6 GAINLA SDA JU1-2 JU1-4 JU1-3 JU1-5 JU1-6 SCL JU1-8 JU1-7 DGND GAINA/B JU1-9 JU1-10 HPS 16 JU1-12 JU1-11 20 4 17 HPS 7 INR2 VDD C5 100pF R17 680kΩ 8 RIGHT R5 15kΩ 1% C9 220µF 6.3V GAINA/B SVDD OUTL+ BIAS N.C. GND PGND PGND PGND 13 9 23 C12 1µF DGND RPGND R7 33.2kΩ 1% 15 C11 220µF 6.3V TB2-2 R9 27.4kΩ 1% HEADER 12 PIN JU1-1 TB2-1 TERMINAL BLOCK R19 47kΩ SGND JU1 SHDN R12 10kΩ C7 0.047µF GAINLB VDD 26 INR1 INL2 SHDN C10 220µF 6.3V 24 TB2 MONO HPS R3 15kΩ 1% HPS HPS 22 SHDN OUTR+ 5 HPS_EN INT C6 100pF GAINRB 2 GAINA/B GAINA/B U1 HPS_EN MAX9763 DGND R10 27.4kΩ 1% R8 33.2kΩ 1% 3 1 SGND 3 SGND LPGND 27 JU6 10 12 GND R11 10kΩ TB1 N.C. TB1-1 J5 4 3 2 1 TB1-2 TERMINAL BLOCK SGND LPGND LEFT RPGND Figure 13. MAX9760 EV Kit Schematic (Modified for MAX9763) Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.