SEMTECH E646ATF

Edge646
Pin Electronics Driver, Window
Comparator, and Switch Matrix
TEST AND MEASUREMENT PRODUCTS
Description
Applications
The Edge646 is an integrated trinary driver, window
comparator, and switch matrix pin electronics solution
manufactured in a wide voltage CMOS process. It is
designed for automatic test equipment and
instrumentation where cost, functional density, and power
are all at a premium.
•
Low Cost Automated Test Equipment
The tristatable driver is capable of generating 3 levels one for a logic high, one for a logic low, and one for either
a termination voltage or a special programming voltage.
The on-board window comparator effectively determines
whether the DUT is in a high, low, or intermediate state.
Functional Block Diagram
The switches are included to allow such functions as PMU,
pull up, and pull down connections.
VH VTT VL
The Edge646 is intended to offer an extremely low leakage,
low cost, low power, small footprint, per pin solution for
100 MHz and below pin electronics applications.
DATA
DATA*
DOUT
DVR EN
DVR EN*
VTT EN
VTT EN*
SW0
SW0 EN*
Features
SW1
•
•
•
•
•
•
•
100 MHz Operation
12V I/O Range
Programmable Output Levels
Flex In digital Inputs (Technology Independent)
Three Level Driver
Extremely Low Leakage Currents (typically ~0 nA)
Small Footprint (32 Pin, 7 mm X 7 mm,
TQFP Package)
LOAD
SW1 EN*
SW2
SW2 EN*
VBB
COMPA
CVA
HIGH LEVEL
VINP
LOW LEVEL
COMPB
Revision 2 /October 21, 2002
1
CVB
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Edge646
TEST AND MEASUREMENT PRODUCTS
PIN Description
Pin Name
Pin #
Description
DATA / DATA*
30, 29
Digital input that determines the high/low status of the driver
when it is enabled.
DVR EN / DVR EN*
32, 31
Digital input that enables and disables the driver, or places the
driver in the VTT state.
VTT EN / VTT EN*
2, 1
Digital input that determines whether DVR EN* places the driver
in a high impedance state or actively drives to the VTT level.
DOUT
23
Driver Output.
VH, VL, VTT
24, 25, 26
Unbuffered analog inputs that set the voltage level of a logical
1, 0, or VTT at the driver output.
VBB
10
Analog input pin which establishes the threshold for all singleended digital input signals.
VINP
19
Analog window comparator input.
CVA, CVB
20, 18
COMPA, COMPB
5, 8
LOW LEVEL
HIGH LEVEL
7
6
Driver
Comparator
Analog DC comparator inputs that set the threshold levels for
the window comparator.
Digital comparator outputs.
Voltage inputs that establish the digital low and high levels of
the comparator outputs.
Switch Matrix
SW0 EN*, SW1 EN*
SW2 EN*
11, 13
15
TTL compatible inputs that activate switches 0, 1, 2, and 3.
SW0
SW1
SW2
12
14
16
Switch 0
Switch 1
Switch 2
LOAD
17
Input pin that connects the DUT to the analog switches.
Power Supplies
VCC
3, 22, 27
Positive analog power supply.
VEE
4, 21, 28
Negative analog power supply.
N/C
9
No Connect pin (leave floating).
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Edge646
TEST AND MEASUREMENT PRODUCTS
PIN Description (continued)
VL
VTT
VCC
VEE
DATA*
DATA
DVR EN*
DVR EN
32-Pin, 7mm x 7mm TQFP
25
VTT EN*
1
VH
VTT EN
DOUT
VCC
VCC
VEE
VEE
COMPA
CVA
HIGH LEVEL
VINP
LOW LEVEL
CVB
COMPB
17
LOAD
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3
SW2
SW2 EN*
SW1
SW1 EN*
SW0
SW0 EN*
VBB
N/C
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Edge646
TEST AND MEASUREMENT PRODUCTS
Circuit Description
Driver Description
The Edge646 driver supports three distinct programmable
driver levels; high, low, termination, and high impedance.
There are no restrictions between any of these three levels
in that all three may vary independently over the entire
operating voltage range between VCC and VEE.
The DVR EN*, DATA, and VTT EN pins are digital inputs
that control the driver (see Table 1). With DVR EN* low,
DATA determines whether the driver will force VH or VL at
DOUT. With DVR EN* high, VTT EN* controls whether the
driver goes into high impedance or drives VTT..
DVR EN*
VTT EN
DATA
DOUT
1
0
X
HiZ
1
1
X
VTT
0
X
0
VL
0
X
1
VH
output which series terminates the transmission line to
the DUT. In this environment, the driver can withstand a
short to any legal DUT voltage for an indefinite period.
In a low impedance application with no additional output
series resistance, care must be exercised and systems
should be designed to check for this condition and tristate
the driver if a short is detected.
The driver does NOT have on-chip short circuit protection
or limitation circuitry.
VBB
VBB is an analog input which establishes the threshold
for all single ended digital input signals. If SW0 EN*,
SW1 EN*, or SW2 EN* are more positive than VBB, these
inputs are a digital “1". Conversely, if they are more
negative than VBB, they are a “0".
Table 1. Driver Truth Table
VH, VL, and VTT
VH, VL, and VTT define the logical “1”, “0”, and
“termination” levels of the driver and can be adjusted
anywhere over the range spanned by VCC to VEE. There
is no restriction between VH, VL, and VTT, in that they can
all vary independently over the entire voltage range
determined by the power supply levels.
The VH, VL, and VTT inputs are unbuffered in that they
also provide the driver output current, so the sources of
these voltages must have ample current drive capability.
All digital inputs are wide voltage comparator inputs, so
they are technology independent. By establishing the
appropriate VBB level for the switch control inputs, and
the appropriate differential input levels for the driver digital
control inputs, the Edge646 may be driven by TTL, ECL,
CMOS, or any custom level circuitry.
SW0 EN*
SW1 EN*
SW2 EN*
VBB
While VTT is referred to as the termination voltage, it may
also be used as a very high “programming” level on many
memory devices.
Figure 1. Driver Digital Inputs
DATA
DATA*
Driver Output Protection
DVR EN*
DVR EN
The Edge646 is designed to operate in a functional testing
environment where a controlled impedance (typically 50
Ω) is maintained between the pin electronics and the DUT.
In general, there will be an external resistor at the driver
Revision 2 / October 21, 2002
4
VTT EN
VTT EN*
Figure 2. Driver Differential Digital Inputs
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Edge646
TEST AND MEASUREMENT PRODUCTS
Circuit Description (continued)
Receiver Functionality
Load
The Edge646 supports an on-board window comparator.
CVB and CVA are high impedance analog inputs which
establish the threshold voltages. COMPA and COMPB are
the digital outputs which reflect the real time status of
VINP. Table 2 summarizes the relationship between the
threshold levels, VINP, and the output signals.
The Edge646 provides a total of 3 analog switches.
Individual switches vary in both their on resistance and
their on/off time (see Table 4).
VINP
COMPA
COMPB
VINP < CVA
VINP > CVA
1
0
X
X
VINP < CVB
VINP > CVB
X
X
0
1
Like the driver digital inputs, the switch matrix control inputs
SW0-3 EN* are technology independent as VBB
determines their threshold level. The switch control is
documented in Table 3.
Table 2. Comparator Truth Table
Comparator Outputs
The comparator outputs are 50Ω output impedance nontristatable drivers designed to cleanly drive 50Ω
transmission lines without requiring any external series
termination resistors. Input pins LOW LEVEL and HIGH
LEVEL establish the logic 0 and 1 levels respectively. In
normal operation, LOW LEVEL would be connected to
ground and HIGH LEVEL would be connected to a system
VDD supply, producing CMOS digital swings at the output.
However, the comparator outputs are technology
independent in that they can drive PECL, 3V CMOS, ECL,
LV CMOS, GTL, and custom levels by varying LOW LEVEL
and HIGH LEVEL. For example, should a 3V swing be
desired, HIGH LEVEL could be connected to a 3.0V power
supply.
Control Inputs
Status
SW0 EN* = 1
SW0 EN* = 0
SW0 disconnected
SW0 connected
SW1 EN* = 1
SW1 EN* = 0
SW1 disconnected
SW1 connected
SW2 EN* = 1
SW2 EN* = 0
SW2 disconnected
SW2 connected
Table 3. Switch Matrix Truth Table
Switch
Rout
On/Off Time
SW0
50 Ω
100 ns
SW1
50 Ω
100 ns
SW2
50 Ω
100 ns
Table 4. Switch Matrix Characteristics
Do NOT leave any digital input pins floating.
Notice that HIGH LEVEL and LOW LEVEL provide both the
voltage level and the current for the comparator outputs.
HIGH LEVEL and LOW LEVEL may be varied between +5V
and -2V.
Revision 2 / October 21, 2002
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Edge646
PRELIMINARY
TEST AND MEASUREMENT PRODUCTS
Application Information
Power Supplies
Power Supplies Decoupling
The Edge646 uses two power supplies for circuit opera- A .1 µF capacitor is recommended between VCC and VEE.
tion; VCC and VEE. In order to protect the Edge646 and
avoid damaging it, the following power supply requirements In addition, solid VCC and VEE planes are recommended
must be satisifed at all times:
to provide a low inductance path for the power supply
currents. These planes will reduce any inductive supply
VEE ≤ All Inputs ≤ VCC
drops associated with swtiching currents on the power
supply pins. If solid planes are not possible, then wide
The sequence below can be used as a guideline when power busses are preferable.
operating the Edge646:
Power-On Sequencing
1. VCC (substrate)
2. VEE
3. Inputs
Power-Off Sequencing
1. Inputs
2. VEE
3. VCC
VH, VL, and VTT Decoupling
As the VH, VL, and VTT inputs are unbuffered and must
supply the driver output current, decoupling capacitors for
these inputs are recommended in proportion to the amount
The two diode configuration shown in Figure 3 should be of output current the application requires. In general, a
used on a once-per-board basis to ensure power supply surge current of 50 mA (5V swings series terminated with
sequence and fault tolerance.
50 Ohms into a 50 Ohm transmission line) are the maximum dynamic output currents the driver should see. The
VCC
decoupling capacitors should be able to provide this current for the duration of the round trip time between the
pin electronics and the DUT, and then recharge themselves
before the next such transition would occur. Once this
condition is satisfied, the VH, VL, and VTT supply voltages
1N5820 or
are more responsible for establishing the DC levels assoEquivalent
ciated with each function and recharging the capacitors,
rather than providing the actual dynamic currents required
to drive the DUT transmission line.
VEE
Ideally, VH, VL, and VTT would each have a dedicated power
layer on the PC board for the lowest possible inductance
power supply distribution.
Figure 3. Power Supply Protection Scheme
Warning: It is extremely important that the voltage
on any device pin does not exceed the range of VEE
–0.5V to VCC +0.5V at any time, either during power
up, normal operation, or during power down. Failure
to adhere to this requirement could result in latchup
of the device, which could be destructive if the system power supplies are capable of supplying large
amounts of current. Even if the device is not immediately destroyed, the cumulative damage caused by
the stress of repeated latchup may affect device reliability.
Revision 2 / October 21, 2002
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Edge646
TEST AND MEASUREMENT PRODUCTS
Package Information
PRELIMINARY
TOP VIEW
PIN Descriptions
4
D
D/2
b
3
e
E
N / 4 TIPS
0.20
C
4
E/2
A–B
D
SEE DETAIL "A"
4X
BOTTOM VIEW
5
7
D1
D1 / 2
E1 / 2
5
7
E1
C
OO
4X
Revision 2 / October 21, 2002
0.20
H
A–B
D
7
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Edge646
TEST AND MEASUREMENT PRODUCTS
Package Information (continued)
DETAIL "B"
DETAIL "A"
0 MIN.
3
–
e/2
0.05
S
0.08 / 0.20 R.
DATUM
PLANE
A1
0.25
–H–
GAUGE PLANE
A2
C.08
R. MIN.
0–7
b
0.20 MIN.
L
1.00 REF.
SECTION C–C
;;;
;;;
9
8 PLACES)
11 / 13
b
A
– H –) 2
0.05
//
0.10 C
ccc
– C –)
0.09 / 0.20
M
SEE DETAIL "B"
Revision 2 / October 21, 2002
A
A1
A2
D
D1
E
E1
L
M
N
e
b
b1
ccc
ddd
8
M C A–B S
D S
WITH LEAD FINISH
0.09 / 0.16
b
Notes:
1.
All dimensions and tolerances conform to ANSI
Y14.5-1982.
2.
Datum plane -H- located at mold parting line and
coincident with lead, where lead exits plastic
body at bottom of parting line.
3.
Datums A-B and -D- to be determined at
centerline between leads where leads exit
plastic body at datum plane -H-.
4.
To be determined at seating plane -C-.
5.
Dimensions D1 and E1 do not include mold
protrusion.
6.
“N” is the total # of terminals.
7.
These dimensions to be determined at the
datum plane -H-.
8.
Package top dimensions are smaller than
bottom dimensions and top of package will
not overhang bottom of package.
9.
Dimension b does not include dambar
protrusion. Allowable dambar protrusion
shall be 0.08 mm total in excess of the b
dimension at maximum material condition.
Dambar cannot be located on the lower
radius or the foot.
10. Controlling dimension: millimeter.
11. Maximum allowable die thickness to be
assembled in this package family is 0.30
millimeters.
12. This outline conforms to JEDEC publication 95,
registration MO-136, variations AC, AE, and AF.
ddd
Lead)
Cross Section
1
BASE METAL
JEDEC VARIATION
All Dimensions in Millimeters
AC
Min.
Nom.
Max.
Note
1.60
0.05
0.10
0.15
1.35
1.40
1.45
9.00 BSC.
4
7.00 BSC.
7,8
9.00 BSC.
4
7.00 BSC.
7,8
0.45
0.60
0.75
0.15
32
0.80 BSC.
0.30
0.37
0.45
9
0.30
0.35
0.40
0.10
0.20
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Edge646
TEST AND MEASUREMENT PRODUCTS
Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Max
Units
Positive Analog Power Supply
VCC
6
8
12
V
Negative Analog Power Supply
VEE
-5
-4
-3
V
VCC - VEE
9
12
V
Comparator Output High Level
HIGH LEVEL
-2
+5
V
Comparator Output Low Level
LOW LEVEL
-2
+5
V
+125
oC
Total Analog Power Supply
Junction Temperature
TJ
Absolute Maximum Ratings
Parameter
Symbol
Min
Max
Units
VCC - VEE
0
13
V
Positive Analog Power Supply
VCC
0
13
V
Negative Analog Power Supply
VEE
-6
0
V
Analog Input Voltages
VEE - .5
VCC + .5
V
Digital Inputs
VEE - .5
VCC + .5
V
-55
+125
oC
-65
+150
oC
+150
oC
260
oC
Total Analog Power Supply
Ambient Operating Temperature
TA
Storage Temperature
Junction Temperature
TJ
Soldering Temperature
Typ
Stresses above listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above
those listed in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Edge646
TEST AND MEASUREMENT PRODUCTS
DC Characteristics
Driver/Receiver Characteristics
Parameter
Symbol
Min
VH, VL, VTT
VH - VL
VH - VTT
VTT - VLL
DC Driver Output Current
AC Driver Output Current (Note 1)
Typ
Max
Units
VEE
VEE - VCC
VEE - VCC
VEE - VCC
VCC
VCC - VEE
VCC - VEE
VCC - VEE
V
V
V
V
Iout DC
-50
+50
mA
Iout AC
-220
+220
mA
Output Impedance
Rout
20
32
Ω
DUT Pin Capacitance (Note 1)
Cout
13
HiZ Leakage Current (Notes 1, 2)
Ileak
0
Driver
Programmable Driver Output Voltages
Driver Output Swing
25
pF
4
nA
VCC
V
2
nA
Comparator
Input Voltage
VINP
Input Leakage Current (Notes 1, 2)
IBIAS
0
Input Capacitance (Note 1)
Cin
4
Offset Voltage (Note 3)
VOS
Receiver Threshold (Note 3)
Threshold Bias Current (Note 1)
VEE
pF
0
+200
mV
VEE + 3.0
VCC - 2.0
V
10
nA
CVA, CVB
0
Digital Output High Level
HIGH LEVEL
-2
5
V
Digital Outptu Low Level
LOW LEVEL
-2
5
V
Digital Output Impedance (Note 4)
Rout
31
45
Ω
Digital Output Current Drive
Imax
-50
+50
mA
Ron
30
44
Ω
VCC
V
4
nA
+30
mA
37
Analog Switches (SW0, SW1, SW2)
On Resistance
Voltage Range
VEE
LOAD HiZ Leakage Current (Notes 1, 2)
0
DC Current Rating
-30
SW Capacitance
Total Power Supply
Quiescent Positive Supply Current
Quiescent Negative Supply Current
10
ICC_DC
IEE_DC
Total Leakage (Note 1)
(DOUT + VINP + LOAD)
0
Total Capacitance (Note 1)
(DOUT + VINP + LOAD)
Revision 2 / October 21, 2002
36
27
10
pF
30
30
mA
mA
10
nA
pF
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Edge646
TEST AND MEASUREMENT PRODUCTS
DC Characteristics (continued)
Digital Inputs
DATA / DATA*, DVR EN* / DVR EN, VTT EN / VTT EN*
SW0 EN*, SW1 EN*, SW2 EN*
Parameter
Symbol
Min
Input High Voltage
Input - Input*
Input Low Voltage
Input* - Input
Input Current
Input Capacitance
Digital Input Voltage Range
Digital Input Threshold
Max
Units
.8
5
V
.8
5
V
1.0
µA
8
8
8
pF
pF
pF
IIN
Typ
0
DATA
DRV EN
VTT EN
INPUT, INPUT*
-2.0*
+5.0
V
VBB
-1.4
4.4
V
*-2V or (VEE + 2.0V), whichever is more positive.
Note
Note
Note
Note
1:
2:
3:
4:
This parameter is guaranteed by design and characterization.
Production testing is performed against a ± 250 nA limit.
Measured at 0V.
Measured at HIGH LEVEL = +3V, LOW LEVEL = 0V.
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Edge646
TEST AND MEASUREMENT PRODUCTS
AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
7
7
7
7
-1.2
11
11
11
11
14
14
14
14
1.2
ns
ns
ns
ns
ns
4
5
ns
Driver
P ropag at ion Delay ( Not e 3)
DA T A I N t o DOUT
V T T EN t o DOUT
DV R EN* t o DOUT ( A c t iv e t o HiZ ) ( Not e 5)
DV R EN* t o DOUT ( HiZ t o A c t iv e) ( Not e 5)
DA T A t o V T T P rop Delay M at c hing ( Not e 4)
M inimum P ulse W idt h ( 3V Sw ing )
T og g le R at e ( Not e 6)
F max
DOUT Out put R ise/ F all T imes ( Not es 1, 4)
1V Sw ing ( 20% - 80%)
3V Sw ing ( 10% - 90%)
5V Sw ing ( 10% - 905)
100
1.0
M Hz
1.2
1.5
2.0
1.6
2.0
3.5
ns
ns
ns
1.5
1.5
8
2.5
2.5
11
ns
ns
ns
4
5
ns
Comparator
C omparat or Dig it al Out put s ( Not es 2, 4)
R ise T ime ( 10% - 90%)
F all t ime ( 10% - 90%)
V I NP t o C OM P A , C OM P B
tr
tf
T pd
4
M inimum P ulse W idt h
T og g le R at e ( Not e 6)
F max
100
M Hz
∆T pd v s. Ov erdriv e
400 mV Ov erdriv e
200 mV Ov erdriv e
3.0
5.0
ns
ns
T pd R ise, T pd F all Errors
2.0
ns
50
ns
Sw it c h M at rix
SW 0, 1, 2 EN* t o Sw it c h On/ Off
Note 1:
Note
Note
Note
Note
Note
2:
3:
4:
5:
6:
10
20
Into 1M of 50Ω transmission line terminated with 1KΩ and 5 pF with the proper series termination
resistor.
LOW LEVEL = 0V, HIGH LEVEL = 3.3V.
Measured at 2.5V with VH = +5V, VL = 0V.
Guaranteed by design and characterization. This parameter is not tested in production.
Tested with a 30 mA load.
Guaranteed by characterization. (This parameter is tested in production against 40 MHz limits.)
Revision 2 / October 21, 2002
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Edge646
TEST AND MEASUREMENT PRODUCTS
Ordering Information
Model Number
Package
E646ATF
32-Pin TQFP
EVM646ATF
Edge646 Evaluation
Module
Contact Information
Semtech Corporation
Test and Measurement Division
10021 Willow Creek Rd., San Diego, CA 92131
Phone: (858)695-1801 FAX (858)695-2633
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Edge646
TEST AND MEASUREMENT PRODUCTS
Revision History
Current Revision Date: October 21, 2002
Previous Revision Date: October 27, 2000
Page #
Section Name
6
Latchup Protection
Revision 2 / October 21, 2002
Previous Revision
Current Revision
Change Section name to "Power Supplies"
Update section.
14
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