8-94 1-6HOOl ITAC HYBRID TECHNOLOGY InterFET Features • - 55°C to + 200°C Specifications • 300nA Max Input Bias Current at + 200°C ± 6 mV Max Input Offset Voltage at + 200°C ± 5 IJVJOC Typical Input Offset Voltage Coefficient 12 MHz Bandwidth Typical Hermetic Package with Standard Pinout (741) Type Pin Compatible with Burr Brown OPA 11 HT • • • • • Absolute Maximum Ratings Description The 1-6H001 is a wide-temperature range, general purpose, operational ampl ifier ideally suited for 200°C applications. Model 1-6H001 is internally compensated for stabi I ity at all gains. Pi ns are available for special tailoring of the bandwidth compensation. Inputs are protected against common mode voltages up to the value of the power supplied, while the output is current limited to offer short circuited protection. TO-99 hermetic package has standard 741-type pinout arrangement. Supply Voltage Differential Input Voltage Operating Temperature Range - 55°C to Storange Temperature Range - 65°C to Lead Temperature (soldering, 10 sec) Output Short-Circuit Duration Continuous junction Temperature ± 22 V ± 12 V + 200°C + 250°C + 300°C +250°C 10-99 Package Dimensions in Inches (mm) Pin Configuration Pin 1 Offset Adjustment, Pill 2 Neg In, Pin 3 Pos In, Pin 4 Neg V & Case, Pin 5 Offset Adjustment, Pin 6 Out, Pin 7 Pos V, Pin 8 Bandwidth Control 0.185 (4.70) ~ 8 Leads - Dia. 0.165 (4.19) 0.021 (0.54) -----.-----~~~~_~_t 0.016(0.41) 0.370 (9.40) 0.335 (8.51) c:::=I 0.335 (8.51) 0.305 (7.75) c:::=I 3 [I_ Dia. I Dia. E::::I 0.040 (1.02) 0.010 (.254) I+-----l 0.200(5.08) Dia. ~ 2 * I 0.040 (1 .02) Max. 0.500 (12.70) Min. r-=1 0.045 (1.14) 0.029 (0.74) 7 8 3 ~ x/ 2 ~ 450 5 0.034 (0.86) 0.028 (0.71) 7 8 1 BOnOMVIEW ~ InterFET (972) 238-1287 ~.(214) 487-1287 (972) FAX (214)238-5338 276-3375 1-6HOOl 8-94 ITAC HYBRID TECHNOLOGY InterFET Specifications at ±15VDC and T A =+200°C unless otherwise noted. OPEN LOOP GAIN DC, single-ended No Load R1 = 2kn RATED OUTPUT Voltatge: RI = 2kn I Current: (TA = 25°C) I DYNAMIC RESPONSE (T A = 25°C) Small-Signal Bandwidth (OdB) Full-Power Bandwidth V out = ± 10V Slew Rate RL = 2Kn Settling Time: (0.1%) Rise Time (10% to 90%, small siQnal) INPUT OFFSET VOLTAGE Initial (without adj. at 25°C) Over Temperature (T A = + 200°C) Over Temperature (T A = - 55°C) Average V10 Coefficient Averaue V10 Coefficient vs. Supply voltaue IT t. INPUT BIAS CURRENT Initial at + 25°C Over Temperature (T A = + 200°C) Over Temperature (T A = - 55°C) Averane IIR Coefficient INPUT IMPEDANCE (T A = 25°C) Differential Differential Common Mode Common Mode INPUT VOLTAGE RANGE Common Mode Differential Mode Common Mode Rejection CMR Over Temperature (- 55°C s Tt. ~ + 200°C) POWER SUPPLY (T A = 25°C) Rated Voltage Voltage Range, Derated Current, Quiescent Over Temperature (- 55°C s TA s + 200°C) Power Supply Reiection (Tt. = 200°C) TEMPERATURE RANGE Operating Storage ~ InterFET (972) 12141238-1287 487-1287 Min I Typ Max I Unit I Av 94 103 100 dB dB 10 M ± 10 ±15 ± 12 ± 23 V mA BWfp SR 12 50 ±4 75 ±7 1.5 30 MH kHz V/I,JS I,JS ns VOM ±2 V10 = 25°C) ±5 ±10 11>1 ± 10 ±5 ±6 ±7 ± 200 ± 300 ± 40 ± 0.1 r1 C1 r1 (CM) C1 (CM) 80 100 ±15 ± 8 to ± 22 ±3 10 P~RR FAX (972) (214)238-5338 276-3375 80 ± 4.5 nA nA nA nA/oC V V - V V mA dB 100 - 55 - 55 mV mV mV l,JV/oC INN of ± 11 ±12 dB Vr.r. I Mn pF Mn 300 3 1000 3 100 I + 200 + 200 8-94 1-6HOOl ITAC HYBRID TECHNOLOGY InterFET Specifications at ±15VDC and T A = +200°C unless otherwise noted. Open Loop Frequency Response (1) ~ 120 ,~ 100 'Q; 80 S 60 g §' -J Common Mode Voltage vs, Supply Voltage 5' 20 jj. ~ c: 15 co a:: 40 0 c: "8 10 ~ 5 :2 c: o E 20 a 0-20 10 100 1k 1Ok 100K Frequency (Hz) 1M 1OM o »> ~ ±5 Step Response in Follower Configuration (2) /.. <, f-- f-f-- co " "- / I ,I , ± 20V Supply 1k ,~ 100 C.!:l I'... '" f.---....-' I--- Negative Going I 100 + 20VSupply 'II 10 jj. 0> ~ ~ g 0.1 II Il'o. ~ 85 10 '0 ~ :5 a. 10kHz 100kHz 1MHz Frequency Cl.> ioo"'" I 100MHz 10MHz I'-.. ~ c: ~ " 0> :¥ 10 s ~ <, I'... o ~ v l/ V Jhermal Noise of 10kn Resistor ~ V' III I 80 60 II ~ I I III IIII "1'to.. " I III I..... .... Phase r-.. Gain I"'-. r-...i'. a. !"'--.. B E 0 -50 v"" ;CZ 40 ", V' V"" Open Loop Frequency andPhase Response ~ 100 '2 V ~ 120 <, Cl.> 225 100 1k 1Ok 100k 1M 1OM Upper 2dB Frequency (Hz) (Lower 3dB Frequency == 10Hz) Input Bias Current and Difference Current as a Function of Temperature 20 Resistance 1--"'" S 0.1 0.01 185 V 'r:"" on Source oS . c: '5 ~ 100kn Source Resistance Il - I- z ~ co & II Equivalent Input Noise vs. Bandwidth E I "" Cl.> 0> I r en + 15V Supply + 10V Supply '" =' ~ + 5V Supply ~ ..... ~ r-.....: c: .:.:; I ±5VSupply 25 65 105 145 Ambient Temperature °C -15 (0.5~s/div) Output Voltage Swing YS. Frequency / ± 10VSupply 10 1.0 -55 Time 5' 20 /± 15V Supply :g. ..L / ±20 Open Loop Voltage gainvs. Temperature Positive Going ./ <, f-- ~ ----- ±10 ±15 Supply Voltage 10k f-- [--- ~ l----" S 20 as a. o 0 +50 +100 +150 +200 +250 Gate Source Voltage inVolts Notes: (1) Capacitance values shown are compensation from pin 8 to common. Not required for stability. See Figure 1. (2) See Figure 3. ..... -20 10 100 11<. 101<. 1001<. 1M 10M 100M Upper 2dB Frequency (Hz) (Lower 3dB Frequency == 10Hz) ~ InterFET (972) 238-1287 ~.(214) 487-1287 FAX (972) (214)238-5338 276-3375 8-94 1-6HOOl ITAC HYBRID TECHNOLOGY InterFET Applications Bandwidth Compensation The frequency response of the 1-6H001 can be adjusted by use of an external compensation capacitor from pin 8 to common as show in Figure 1. The open loop frequency response curves illustrate the effect of various values of capacitance. The 1-6H001 is stable at any gain level without the use of compensation, provided that stray wiring capacitance and/or load capacitance are not excessive, and that moderate values of feedback resistance are used (RFB ~ 10 kn). A load capacitance of SOpF is desirable in all feed back configurations. Supply BypaSS~ 1IJF Compensation • V (Optional) o 7+ o Load Figure 1 Stability Because the 1-6H001 is an extremely fast amplifier with high gain, stray wiring capacitance and inductance in power supply leads can cause circuit oscillation. This can be prevented by proper circuit layout (all leads or patterns as short as possible) and properly bypassing the power supply line to common at points close to the amplifier. In addition, it is recommended the the load be bypassed by a SOpF capacitor. See Figure 1. V+ Figure 2 Offset Voltage and Adjustment Although the offset voltage of these amplifiers is only a few millivolts, it may in some cases be desirable to null this offset. This is done by use of a 100kn potentiometer as shown in Figure 2. >---------------0 Test Circuit-Dynamic Response 2kQ The test circuit of Figure 3 is used for measurement of slew rate, settling time, rise time and overshoot. Both rise time and overshoot are measured for a small output signal (V O UT = ± 100mV). Slew rate and settling time are measured by a 10V, peak-to-peak, square wave. A InterFET (972) 238-1287 ~, (214) 487-1287 FAX (972) (214)238-5338 276-3375 Figure 3