SS7646 Touch Screen Controller FEATURES DESCRIPTION Pin compatible with SS7643 The SS7646 touch-screen controller IC is an advanced version of the previous controller, the SS7643. Serial interface Interface for 4-wire touch-screen Embedded touch-screen drivers Internal 2.5V reference Direct battery measurement (0V to 6V) Touch-pressure measurement One auxiliary analog input On-chip temperature sensor Supply voltage from 2.2V to 5.5V 12-bit analog-to-digital converter Programmable 8- or 12-bit resolution Conversion rate up to 125kHz Full power-down control 16 pin SSOP package The SS7646 is a 12-biit SAR analog-to-digital converter (ADC) with SPI serial interface and low-on resistance drivers for 4-wire resistive touch screens. The SS7646 is fully pin-compatible with the SS7643. The SS7646 is a highly-integrated controller for portable applications using 4-wire resistive touch screens, such as PDAs, portable instruments, cell phones, etc. The SS7646 contains all the analog and digital circuitry necessary to complete a pen request, and features temperature, battery monitor and touch-pressure measurements. The SS7646 also features an internal 2.5V reference that can be turned ON or OFF independently of the ADC. The SS7646 consumes only 405 µW (with the internal reference OFF) at a sample rate of 125kHz with a 2.7V supply and consumes less than 2.7 µW in the shutdown mode. The SS7646 will operate with a supply down to 2.2V. APPLICATIONS Touch-screen Monitors Personal Digital Assistants Point-of-Sale Terminals The SS7646 is supplied in a very small 16-lead SSOP package and is guaranteed over the temperature range. Pagers High-Speed Data Acquisition Portable Instruments Low-power Instruments ORDERING INFORMATION SS7646TR SS7646 in SSOP-16 shipped on tape and reel PIN CONFIGURATION VDD 1 16 DCLK X+ 2 15 /CS Y+ 3 14 DIN X- 4 13 BUSY SS7646 Y- 5 12 DOUT GND 6 11 /PENIRQ VBAT 7 10 VDD VIN 8 9 VREF SSOP-16 8/21/2004 Rev.2.01 www.SiliconStandard.com 1 of 5 SS7646 ABSOLUTE MAXIMUM RATINGS PIN DESCRIPTIONS VDD to GND…………………………….……...………. -0.3V to +6V Analog Input to GND…………………………... -0.3V to VDD +0.3V Digital Input to GND………………………...… -0.3V to VDD +0.3V Operating Temperature Range……….……… -40 °C to +85°C Maximum Junction Temperature……….………………… +150°C Storage Temperature Range……………….…..… -60°C to +150°C Lead Temperature (Soldering, 10s)………………..……… +300°C Pin Name 1 VDD Power Supply, 2.2V to 5.5V. 2 X+ X+ Input; ADC Input Channel 1. 3 Y+ Y+ Input; ADC Input Channel 2. 4 X- X- Input. CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. 5 Y- Y- Input; ADC Input Channel 3. 6 GND Ground. 7 VBAT Battery Monitor Input; ADC Input Channel 4. 8 VIN Auxiliary Input; ADC Input Channel 5. 9 VREF Reference Voltage Input / Output. 10 VDD Power Supply, 2.2V to 5.5V. Electrostatic Discharge Sensitivity 11 This device can be damaged by ESD. Silicon Standard recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Description /PENIRQ Pen Interrupt. Requires 10kΩ to 100kΩ external pull-up resistor. 12 DOUT Serial Data Output. This output pin is high impedance when /CS is high. 13 BUSY Busy Output. This output pin is high impedance when /CS is high. 14 DIN Serial Data Input. 15 /CS Chip Select Input. This input is active low. 16 DCLK External Clock Input. BLOCK DIAGRAM VDD /PENIRQ Temperature Sensor DCLK X+ CHARGE REDISTRIBUTION DAC Y+ COMP 6-Channel MUX X- SERIAL INTERFACE /CS DIN BUSY DOUT YSAR CONTROL LOGIC V BAT V IN V REF Battery Monitor Internal 2.5V Reference Figure 1. Block Diagram of SS7646 8/21/2004 Rev.2.01 www.SiliconStandard.com 2 of 5 SS7646 Electrical Specifications (TA = -40°C to +85°C, VDD=+2.7V, VREF=+2.7V, fSample=125KHz, fCLK=24*fSample, 12-bit mode, Digital Inputs= GND or +VDD. Typical values are at TA = +25°C, unless otherwise noted.) PARAMETER Power Supply Requirement VDD Quiescent Current Power Dissipation TEST CONDITIONS MIN. Specified Performance Functional Operating Range Internal Reference OFF Internal Reference ON Shut Down Mode Internal Reference OFF Internal Reference ON Shut Down Mode 2.7 2.2 Battery Monitor Input Voltage Range Accuracy Temperature Measurement Operating Temperature Range Resolution Accuracy 8/21/2004 Rev.2.01 MAX. UNITS 3.6 5.5 V V µA µA µA mW mW µW 150 600 1 0.40 1.62 2.7 System Performance Resolution INL DNL Gain Error Offset Error Digital Input/Output Logic Family VOH VOL VIH VIL /PENIRQ VOL Analog Input Input Span Input Range Capacitance Reference Output Internal Reference Voltage Internal Reference Thermal Drift Quiescent Current Reference Input Input Range Input Current X / Y Switches X+, Y+ X -, Y - TYP. 12 ±2 ±1 ±4 ±6 Bits LSB LSB LSB LSB CMOS Logic VDD*0.8 100kΩ Pull-Up 0.4 VDD + 0.3 0.8 VDD*0.7 -0.3 0. 6 V VREF VDD + 0.2 V V pF 2.55 V ppm/°C µA VDD 15 V µA 5 5 Ω Ω 0 -0.2 25 Internal Reference ON (PD1=”1”) (Functional from 2.7V to 5.5V VDD) 2.45 V V V V 2.50 15 500 Internal Reference OFF (PD1=”0”) 1 Switch On-Resistance Switch On-Resistance Internal Reference 0.5 -3 -40 Differential Method (TEMP1-TEMP0) Single Conversion (TEMP0) Differential Method (TEMP1-TEMP0) Single Conversion (TEMP0) www.SiliconStandard.com 1.5 0.3 ±2 ±3 6.0 +3 V % +85 °C °C °C °C °C 3 of 5 SS7646 Timing Specifications: (TA = -40°C to +85°C, VDD≧+2.7V, CLOAD=50pF. Typical values are at TA = +25°C, unless otherwise noted.) SYMBOL DESCRIPTION MIN TYP MAX UNITS TACQ ADC acquisition time 500 ns TCON ADC conversion time 6.5 µs TCSF /CS falling to first DCLK rising 100 ns TCSR /CS rising to DCLK ignored 0 ns TDOF /CS falling to DOUT enable 200 ns TDOR /CS rising to DOUT disable 200 ns TBSF /CS falling to BUSY enable 200 ns TBSR /CS rising to BUSY disable 200 ns TCKH DCLK High Period 200 ns TCKL DCLK LOW Period 200 ns TDIS DIN valid before DCLK rising 100 ns TDIH DIN hold time after DCLK going high 15 ns TDO DCLK falling to DOUT valid 200 ns TBO DCLK falling to BUSY rising 200 ns Timing Diagram: TCSF TCSR TACQ TCKH /CS TCON TCK/L TBO 1 DCLK 8 TDO 1 1 8 Acquire X/Y SWITCH ON TDIS DIN TBSF BUSY TDIH TBSR Tri-State Tri-State TDOR TDOF DOUT Tri-State 8/21/2004 Rev.2.01 11 0 (MSB) (LSB) www.SiliconStandard.com Tri-State 4 of 5 SS7646 FUNCTIONAL DESCRIPTION OVERVIEW Operation of 24-Clocks The SS7646 is a 12-bit switched-capacitor SAR Analog-to-Digital converter (ADC). The converter is fabricated using a 0.6µm CMOS process and packaged in the very small 16-pin SSOP package. The operation is initiated by a falling signal on Chip Select (/CS) input. After /CS falls, the SS7646 looks for a start bit on the DIN input. The first eight clock cycles are used to provide the control byte. At the end of the operation the /CS pin should be brought high. Bringing /CS high after the conversion also minimizes supply current if DCLK is left running. The typical operation of the SS7646 is shown in Figure 1 2 . The SS7 6 4 6 o p e r a te s o n a s i n g l e s uppl y r a n g ing fro m + 2 .2 V to + 5 .5 V. Th e S S7646 features an internal 2.5V reference and an external clock. The reference voltage directly sets the input range of the converter. The internal 2.5V reference can be turned ON or OFF independently of the ADC. The SS7646 contains six channel inputs, a serial interface and low on-resistance switches for the touch screen (see Block Diagram). The input to the converter is selected via the six-channel multiplexer as shown in Figure 5. SERIAL INTERFACE The typical operation of the SS7646 serial interface (/CS, DCLK, DIN and DOUT) is shown in Figure 2. The SS7646 communicates with microprocessors or digital signal processors via a synchronous serial interf ac e. O ne com plete c onver sion c an be accomplished with three serial communications for a total 24 clock cycles on the DCLK input. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Start A2 A0 Mode1 Mode0 PD1 A1 PD0 Table I. Control Bits in the Control Byte BIT NAME 7 Start 6, 5, 4 A2, A1, A0 3, 2 Mode1, Mode0 DESCRIPTION Start Bit. Input Channel Select Bits. 12-Bit / 8-Bit Resolution and Int. Reference Configuration Bits 1, 0 PD1, PD0 Power Down Control Bits Table II. Description of the Control Bits /CS 1 DCLK 8 1 8 1 Acquire 1 8 Conversion ON X/Y SWITCH START DIN BUSY DOUT A2 A1 A0 MODE1MODE0 PD1 PD0 Tri-State Tri-State Tri-State 11 0 (MSB) (LSB) Tri-State Figure 2. Serial Interface of SS7646 8/21/2004 Rev.2.01 www.SiliconStandard.com 4 of 5 SS7646 The Control Byte : Operation of 16-Clocks Table I and Table II show detailed information of the control byte (on DIN). The control byte provides the start operation, addressing, resolution, reference and power down information to the SS7646. The typical operation of the SS7646 is 24-clocks (three control bytes) per conversion. However the control bits for the next conversion can be overlapped with current conversion for a faster conversion. Figure 3 shows the timing of 16-Clocks per conversion. Start Bit – Initiate Start The control byte starts with the first high bit on DIN. The first bit must always be HIGH (1) to initiate the start of the conversion. The SS7646 will ignore any inputs on the DIN until the start bit is detected. Addressing Bits – Input Channel Selection The next three bits on control byte (A2, A1, A0) select the active input channel of the input multiplexer (see Table III, and Figure 5), and touch screen drivers. Mode Bits – Resolution and Reference Configuration The Mode bits (Mode1, Mode0) set the resolution of the analog-to-digital (ADC) converter. With the Mode1 bit LOW (0) the following conversion will have 12 bits of resolution. With the Mode1 bit HIGH (1) the following conversion will have 8 bits of resolution. The MODE0 bit set the reference input of the ADC (see Reference Input section and Figure 5). Table IV shows detailed information of the Mode Bits. PD0 and PD1 Bits - Power Down Control The last two bits (PD1, PD0) control the power-down mode and pen interrupt request of the SS7646. If both bits are HIGH (1), the ADC is always powered up and pen interrupt will be disabled. If both bits are LOW (0), the ADC enters a power-down mode between conversions. The internal 2.5V voltage reference can be turned ON or OFF independently of the ADC with the PD1 bit. See Table V for more information. 0 0 Input X Switch Y Switch Channel 1 Y-POSITION X+ OFF ON 1 0 1 X-POSITION Y+ ON OFF 0 1 1 Z1-POSITION X+ X- ON Y+ ON 1 0 0 Z2-POSITION Y- X- ON Y+ ON 0 1 0 Battery VBAT OFF OFF 1 1 0 Auxiliary VIN OFF OFF 0 0 0 TEMP0 - OFF OFF 1 1 1 TEMP1 - OFF OFF A2 A1 A0 Measure Table III. Input Channel Configuration 8/21/2004 Rev.2.01 Operation of 15-Clocks The fastest operation (15-clocks per conversion) of SS7646 is shown on Figure 4. This operation will not work with the serial interface of m ost microcontrollers and digital signal processors, as they are not capable of providing 15 clocks cycles per serial transfer. MODE1 MODE0 Resolution ADC Reference 0 1 12bits VREF 0 0 12bits VDD 1 1 8bits VREF * * 1 0 8bits VDD Table IV. Resolution and Reference Configuration * When measuring Y(001), X(101), Z1(011) and Z2(100) positions, otherwise Invalid configuration PD1 PD0 /PENIRQ DESCRIPTION 0 0 Enable The reference is switching OFF and the ADC will power down between conversions. Y- switch is on while in power-down. 0 1 Enable The reference is switching OFF and the ADC is ON permanently. No power down between conversions. 1 0 Enable The reference is ON and the ADC will power down between conversions. 1 1 Disable The reference and the ADC are ON. No power down between conversions, the ADC always power up. The pen interrupt functionality will be disabled. Table V. Power-Down and Pen Interrupt Selection www.SiliconStandard.com 4 of 5 SS7646 /CS DCLK 1 8 1 8 1 1 8 1 16 X/Y SWITCH ON ON DIN BUSY 11 0 (MSB) (LSB) DOUT 11 10 9 (MSB) Figure 3. Timing of 16-clocks per Conversion /CS DCLK 1 8 7 1 1 X/Y SWITCH 15 1 8 1 1 ON ON DIN BUSY DOUT 11 0 (MSB) (LSB) 11 10 9 (MSB) Figure 4. Timing of 15-clocks per Conversion 8/21/2004 Rev.2.01 www.SiliconStandard.com 4 of 5 SS7646 VDD V REF /P E N IR Q VDD X+ +RE F Y+ IN X- ADC -R E F YM O DE0 (S h o w n 1 ) V BAT A2A1A0 (S ho w n 10 1 ) B a tte ry M o n ito r V IN Figure 5. Diagram of Input Channel and Reference Input ANALOG INPUT MEASUREMENT The SS7646 contains 6 channel inputs. X+, Y+ and Y- inputs are for touch screen measurement, 2 auxiliary inputs are VBAT and VIN. The diode input (internal node) is for temperature measurement. Figure 5 shows a diagram of the analog input channel and reference input. The input to the A/D converter is selected via the six-channel multiplexer. (see Block Diagram and Figure 5.) Input Channel Table III shown the input channel configuration of the SS7646. The control bits are set via the DIN pin. (see Control Byte section). The selected channel is for A/D converter input. Please refer to Figure 5 for detailed input channel multiplexer. For measuring X+ (Y-position) and Y+ (X-position), Y switches and X switches are turned on respectively. While the ADC can be powered up or down instantly, the internal reference requires settling time to settle to the final value. The power-up time of VREF is typically 30µs without a load. The internal reference voltage can be turned ON or OFF independently of the ADC. This allows extra time for the reference voltage to be settled before a conversion. Although /CS=”1” will put the SS7646 into a power-down mode immediately, the internal reference does not turn OFF with /CS going HIGH. An additional pattern with PD1=”0” is required before /CS goes HIGH. Internal Reference The SS7646 has an internal 2.5V voltage reference that can be turned ON with the power-down address bit, PD1=”1”, at the configuration byte (See Table V and Figure 1). The internal reference voltage of SS7646 should be turned OFF (PD1=”0”) in order to be compatible with the SS7643. If the internal reference is turned OFF and the reference is taken from the power supply directly, special care must be taken to avoid noise from the power supply. 8/21/2004 Rev.2.01 www.SiliconStandard.com 4 of 5 SS7646 Reference Input V REF V DD The voltage difference between +REF and –REF (shown VREF in Figure 5), in the range of 1V to + VDD, sets the Analog-to-Digital converter (ADC) input range. The full-scale analog input range of the SS7646 is therefore from 0 to V REF. V DD Y+ +REF X+ Typically the reference input is an external precise voltage source VREF (MODE0=1, see Table IV) for touch screen and auxiliary inputs measurement. Figure 6 shows the configuration for a Y coordinate measurement with MODE0=1. When utilizing the panel measurement, the VREF must equal VDD as input range is from 0 to VDD. If the reference input is from the power supply directly, as Figure 12 shows for example, special care must be taken to avoid noise from the power supply. Internal 2.5V Reference A2A1A0 (Shown 101) IN ADC -REF MODE0 = 1 Y- GND GND Figure 6. Touch Screen Measurement with MODE0=1 V DD V REF When making touch screen measurements only, the reference input can be set from V D D directly (MODE0=0) and discard the V REF input. Figure 7 s hows the c onf igur ation f or a Y c oor dinate measurement with MODE0=0. V DD Y+ Internal 2.5V Reference A2A1A0 (Shown 101) X+ +REF IN ADC -REF Examples of DIN Configuration MODE0 = 0 Y- Table VI shows DIN configurations for specified applications. GND GND Figure 7. Touch Screen Measurement with MODE0=0 Measurement S A2 A1 A0 MODE1 MODE0 PD1 PD0 +REF X SWITCHES Y SWITCHES Touch Screen Y-Position (X+) 1 0 0 1 0 0/1 0 0 VDD / VREF OFF ON X-Position (Y+) 1 1 0 1 0 0/1 0 0 VDD / VREF ON OFF Z1-Position (X+) 1 0 1 1 0 0/1 0 0 VDD / VREF X+ OFF, X- ON Y+ ON , Y- OFF Z2-Position (Y -) 1 1 0 0 0 0/1 0 0 VDD / VREF X+ OFF, X- ON Y+ ON , Y- OFF VREF OFF OFF Battery VBAT 1 0 1 0 0 1 1 1 - 1 0 1 0 * 0 * * VIN 1 1 1 0 0 1 1 1 - 1 1 1 0 * 0 * * TEMP1 1 1 1 1 0 1 1 1 VREF OFF OFF TEMP0 1 0 0 0 0 1 1 1 VREF OFF OFF - 1 1 1 1 * 0 * * - 1 0 0 Invalid Configuration Auxiliary In. VREF OFF OFF Invalid Configuration Temperature 8/21/2004 Rev.2.01 0 * 0 * * Table VI. Examples of DIN Configuration www.SiliconStandard.com Invalid Configuration Invalid Configuration 4 of 5 SS7646 Temperature Measurement The temperature measurement is based on an on-chip forward diode measurement. The forward diode voltage VBE has a well-defined characteristic vs. temperature. There are two measurement options for the SS7646, a Single Conversion Mode and a Differential Conversion Mode. (1) In the Single Conversion Mode, a diode voltage is first digitized at a fixed calibration temperature (25°C) during the final test of the end product and this value T1 is stored in the memory, then only a single reading T2 is r equir ed f or the us ers to obtain the am bient temperature through extrapolation from the calibration temperature diode result. T(°K) = (q x ∆VBE) [k x ln(120)] T(°C) = 2.42 x ∆VBE(mV) - 273 This method provides a much improved absolute m easurement of temperature of ± 2°C, however resolution is reduced to approximately 1.5°C/LSB. /PENIRQ T(°C) = [25 − (T2 − T1)x0.3] °C I This result assumes a diode temperature coefficient (TC) of approximately –2.1 mV/°C. This method provides a resolution of approximately 0.3°C and a predicted accuracy of ± 3°C. 1LSB = 2.5V 4096 = 0.61mV Resolution = 0.3 °C/LSB MUX 6 Channel X+ (2) The Differential Conversion Mode requires two points measurement to eliminate the need for absolute temperature calibration. The first measurement TEMP0 (A2=0, A1=0, A0=0) is performed with a fixed bias current into a diode and the second measurement TEMP1 (A2=1, A1=1, A0=1) is performed with N times (N=120 for SS7646) of the bias current into the same diode. The voltage difference between first and s ec o n d r e a d i ng s is pr o p o r t i o n a l t o a bs o l ut e temperature and is given by the following formula: ∆VBE = (kT q) x ln(N) where VBE represents the diode voltage, N is the bias current multiple, k is Boltzmann’s constant and q is the electron charge. ADC OFF ON Figure 8. Block Diagram of Temperature Measurement Circuit DC/DC Converter VDD VBAT Battery 0V to 6V 7.5K ADC ON 2.5K ON -23 Taking Boltzm ann’s constant k =1.38054x10 electrons volts/degrees Kelvin, the electron charge -19 q=1.602189x10 Coulom b, then the am bient temperature T, in degrees centigrade, would be calculated as follows: N*I OFF This mode is achieved with an address setting of A2=0, A1=0, A0=0 (TEMP0). Please refer to Table III and Figure 8 for details. 8/21/2004 Rev.2.01 VDD A2A1A0 (Shown 010) Figure 9. Block Diagram of Battery Measurement Circuit www.SiliconStandard.com 4 of 5 SS7646 Battery Measurement Another feature of the SS7646 is the battery measurement ability. Figure 9 shows a block diagram of a battery voltage monitored by the SS7646. While the main power to the SS7646 via the DC/DC regulator is maintained at the desired voltage, the battery voltage can vary from 0.5V to 6V. The SS7646 is able to monitor this battery voltage through the VBAT pin. The voltage on VBAT pin is divided down by 4 so that the battery voltage of 6V becomes 1.5V to the ADC input. In order to minimize the power consumption, the divider is only on during the sampling phase of the ADC. See Table V for the control bit configurations required to perform this battery measurement. (1) The first method requires the user knowing the X-plate resistance. Performing three touch screen conversions, X-Position, Z1-Position and Z2-position, then use the following equation to calculate the touch resistance: Rtouch = Rxplate x (Xposition 4096 ) x [(Z2 Z1) − 1] (2) The second method requires the user knowing both the X-plate and Y-plate resistance. Performing three touch screen conversions, X-Position, Y-Position and Z1-position, then use the following equation to calculate the touch resistance: Rtouch = (Rxplate x Xposition) 4096 x [(4096 Z1 ) − 1] - (Ryplate x Yposition) 4096 Pressure Measurement The SS7646 is also able to determine the pen or finger touch through the pressure measurement with some simple calculations. The pressure measurement is based on the contact resistance between the X and Y plates. Figure 10 shows a block diagram of the pressure measurement. There are two recommended methods to perform the measurement. Generally, the pressure measurement can be accomplished sufficiently with 8-bit resolution mode, but the following examples are shown with the 12-bit resolution mode. Measure X-Position Y+ Pen Interrupt Request The pen interrupt function is shown in Figure 11. Normally the /PENIRQ is HIGH by connecting a pull-up resistor (typically 100KΩ) to VDD. If /PENIRQ has been enabled (See Table V), Y- driver is ON and connected to GND and /PENIRQ diode is connected to X+ input. When the touch screen connected to the SS7646 is touched, the X+ input is pulled to ground through the touch screen and /PENIRQ will go low, initiating an interrupt to the microprocessor. During the X and Y plates measurement cycles, the /PENIRQ diode will be internally connected to GND and X+ input disconnected from the diode to eliminate leakage current to the touch screen. X+ V Rtouch Y- X- Y+ X+ Measure Z1-Position VDD 100K V Rtouch /PENIRQ Y+ Y- X- Y+ X+ X+ Y- V Rtouch /PENIRQ ENABLE Y- X- Measure Z2-Position Figure 10. Block Diagram of Pressure Measurement 8/21/2004 Rev.2.01 Figure 11. Block Diagram of Pen Interrupt Circuit www.SiliconStandard.com 4 of 5 SS7646 APPLICATION CONSIDERATIONS Typical Operating Circuit Battery 2.7V to 5.5V DC/DC Converter DCLK 16 Clock 1 VDD 2 X+ /CS 15 Chip Select 3 Y+ DIN 14 Data In 4 X- BUSY 13 5 Y- DOUT 6 GND /PENIRQ 11 7 VBAT VDD 10 8 VIN VREF 9 12 Busy Status Data Out Pen Interrupt SS7646 Figure 12. Typical Operation Circuit of the SS7646 Resistive Touch Screen (4-Wire) The 4-wire resistive touch screen consists of 2 resistive plates that are separated by a small gap. Each of the plates has a resistance in the range from 200 to 2000 ohms. The screen works by applying a voltage across the X plate or Y plate resistive networks. If a voltage is applied, for example, between X+ and X- then a voltage divider is formed on the X plate. When the Y plate is touched to the X plate, a voltage will be developed on the Y plate. By accurately measuring this voltage, the position on the screen can be determined. The connections between the SS7646 and the touch screen should be as short as possible. X PLATE Y PLATE Electrode X+ Y- X- Y+ Figure 13. 4-wire Resistive Touch Screen 8/21/2004 Rev.2.01 www.SiliconStandard.com 4 of 5 SS7646 PACKAGE INFORMATION 9 E h x 45° H 16 SSOP-16 θ b 1 8 Detail F L D C A See Detail F A1 A2 T(4X) e Seating Plane DIMENSIONS (MM) SYMBOLS DIMENSIONS (MIL) MIN. NOM. MAX. MIN. NOM. MAX. A 1.35 1.60 1.75 53 63 68 A1 0.10 0.15 0.25 4 6 10 1.50 A2 59 b 0.20 0.254 0.30 8 10 12 C 0.18 0.203 0.25 7 8 10 D 4.80 4.90 5.00 189 193 197 E 3.80 3.90 4.00 150 154 157 H 5.80 6.00 6.80 228 236 244 0.6358 BSC e 25 BSC L 0.40 0.635 1.27 16 25 50 h 0.25 0.42 0.50 10 17 20 θ 0° 8° 0° 8° Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 8/21/2004 Rev.2.01 www.SiliconStandard.com 5 of 5