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Device Thermal Coupling on a PCB
THERMAL MINUTES
Device Thermal Coupling on a PCB
1 to 5 mm Gap
Insulation to Board or
Insulation to Package
Junction Temperature
Board Temperature Thermocouple
Soldered to Middle Lead
Figure 1. Cross Section
Illustration of a Ring Style
Cold Plate RΘJB [2].
Insulate with tape
if necessary
Insulation
Water Channel
5 mm
Minimum
The objective of any thermal solution is to ensure that
a device’s operating temperature does not exceed the
safe limits defined by its manufacturer. In the electronics industry, this operating temperature is referred to as
the device’s “junction temperature.” In a processor, for
example, this term literally refers to the semiconductor
junction where electrical power is converted to heat.
heat path is from junction to board only. To measure
ΘJB, the top of the device is insulated and a cold plate
is attached to the board edge (Figure 1). This is the true
thermal resistance, which is the characteristic of the
device. The only problem is that, in a real application one
does not know how much power is being transmitted
from different paths.
To maintain operation, the heat must flow out of the semiconductor at such a rate as to ensure acceptable junction
temperatures. This heat flow encounters resistance as it
moves from the junction throughout the device package,
much like electrons face resistance when flowing through
a wire. In thermodynamic terms, this resistance is known
as conduction resistance and consists of several parts.
From the junction, heat can flow toward the case of the
component, where a heat sink may be located. This is
referred to as ΘJC, or junction to case thermal resistance.
Heat can also flow away from the top surface of the
component and into the board. This is known as junction
to board resistance, or ΘJB.
ΨJB is a measure of the temperature differential when
multiple heat transfer paths are used, such as the sides
and top of the component as well as the board. These
multiple paths are inherent in an actual system and measurements must be used with caution.
Due to the multiple heat transfer paths within a component, a single resistance cannot be used to accurately
calculate the junction temperature. The thermal resistance from junction to ambient must be broken down
further into a network of resistances to improve the
accuracy of junction temperature prediction. A simplified
resistor network is shown in Figure 2.
ΘJB is defined as the temperature difference between the
junction and the board divided by the power when the
© Advanced Thermal Solutions, inc. 2007 | 89-27 Access Road Norwood, MA 02062 | T: 781.769.2800 www.qats.com
Page THERMAL MINUTES
Figure 2. Junction to Ambient
Resistor Network [1].
Prior work done by Joiner et al.
correlates ΘJMA to board temperature (see Equation 1). The ΘJMA
is the overall thermal resistance
from the junction to the ambient
when all heat transfer paths are
evaluated. In this case, ΘCA is
represented by the heat sink
thermal resistance, as well as
the interfacial resistance between device and sink.
Table 1 lists JEDEC parameters for a typical BGA component. These are used in the following example calculation.
Correlation
Reynolds Number
(110 ± 8)
=
ΘJMA = junction to moving air thermal fresistance
ΘJB = Junction to board thermal resistance Re
ΘJC = Junction to case thermal resistance
f = 0.165(3.48 − log Re) 0.24 + (.081 ± 0.007 )
ΘCA = Case to ambient thermal resistance
TBA = Board temperature rise
(0.195 ± 0.017)
f=
θJMA
0.11
(θJC + θCA ) × θJB
(θJC + θCA )
T Re
=
+
× BA (1)
0.4
(θJC + θCA ) + θJB
(θJC + θCA )Nu
+ θ=
P
JB 0.00222Pr
Re1.09
Parameter
Description
Value
Units
ΘJC
Thermal Resistance Junction to Case
0.45
°C/W
ΘJB
Thermal Resistance Junction to Board
2.6
°C/W
TDP
Tj
Thermal Design Power
Maximum Junction
Temperature
20
W
105
°C
Correlation
Table 1. Typical Thermal Package Specifications.
Re<900
900<Re<3000
3000<Re<15000
Re>3000
Correlation
f=
2g c DPDh
Lr fVf 2
DPloss = K
r fVf 2
2g c
Flow Type
Laminar
Laminar
Flow Type
64 denser,υthere−1is a need to
As board layoutsf become
=
[1 + 30(
)]
Laminar
Re solutions
DCthat
design optimized thermal
use the least
a
−0.182put, there is no margin
amount of spacef possible.
Simply
Turbulent
= 0.140 Re
to allow for over-designed heat sinks with tight compo.
0.33 coupling
nent spacing. Accounting
for the effect
Laminar
Nu = 0.000972
Re1 17ofPrboard
is an important part of this optimization. The possibility for
Nu = 3.82 x10 −6 Re1.96 Pr 0.33
Turbulent
© Advanced Thermal Solutions, inc. 2007 | 89-27 Access Road Norwood, MA 02062 | T: 781.769.2800 www.qats.com
Correlation
Flow Type
Page THERMAL MINUTES
Ta
using an oversized heat sink exists only if the junction to
case heat transfer path is considered.
Ta
P1
To ensure a 105°C junction temperature at 55°C ambient a typical component (see Table 1) needs a heat sink
resistance of 2.05°C/W (if we ignore board conduction).
When board conduction is taken into account, the actual
junction temperature could be as low as 74°C, assuming
the board temperature is the same as the air temperature.
This indicates a heat sink that is larger than necessary.
From this example, it is clear that all heat transfer paths
from the component junction must be considered. Using
just the ΘJC and ΘCA values can lead to a larger than
optimal heat sink and may not accurately predict operating junction temperatures. Using the proposed correlation
can also predict junction temperature when the board
temperature is known from experimentation, as shown in
Figure 3.
Junction Temperature as a Function of
Board Temperature Rise (55°C Ambient)
Junction Temperature (°C)
90.0
θb1b2
P2
Tb1
Tb2
Figure 4. Simple Schematic of a PCB with Two Components.
Ta
Ta
θJa1
q1
θJa2
q3
TJ1
TJ2
q4
q2
θb1b2
Tb2
Tb1
q6
θba1
q5
q7
θba2
Ta
Ta
Figure 5. Simple Resistor Network of the PCB with Two
Components.
85.0
80.0
75.0
Applying the energy balances at the nodes J1, J2, b1 and b2 :
70.0
65.0
60.0
0.0
5.0
10.0
15.0
20.0
25.0
30.0
Board Temperature Rise (°C)
1°C/W Heatsink
2°C/W Heatsink
Figure 3. Effect of Board Temperature Rise on Junction
Temperature.
When there is more than one component, the situation
becomes much more complex than with just a single
component on the board. There is conduction coupling
between components through the PCB, and radiation and
convective coupling between the components and adjacent cards. A simple PCB with two components is shown
in Figure 4. The power dissipation of the two components
is assumed to be P1 and P2, and it is assumed that we
can neglect the radiation heat transfer. The board temperature under each device is Tb1 and Tb2, respectively.
We also assume that the lateral resistance between the
two components on the board is θb1b2.
T
TJ1 − Tb1
j1 − Ta1
+
= P1
θJa1
θJb1
Tj2 − Ta2
TJ2 − Tb2
+
= P2
θJa2
θJb2
(2)
(3)
Tj1 − Tb1 Tb1 − Ta (4)
T
b1 − Tb2
= q6 = q2 − q5 =
−
θba1
θb1b2
θ jb1
Tb2 − Tb1
T − Tb2
= J2
θb1b2
θJb2
+
TJ1 − Tb1 Tb1 − Ta
−
θJb1
θba1
(5)
There are four equations and four unknowns: Tj1, Tj2. Tb1
and Tb2. The unknowns can be determined by solving the
simultaneous equations. This simple example demonstrates that by coupling two components through a
conduction path, it becomes much more complicated to
find the junction temperatures. In a real life application,
the situation is much more complicated than the above
example when encountering multiple components and
multiple PCBs with different conduction planes all inter-
© Advanced Thermal Solutions, inc. 2007 | 89-27 Access Road Norwood, MA 02062 | T: 781.769.2800 www.qats.com
Page 10
THERMAL MINUTES
acting through conduction, convection, and radiation.
To obtain reasonable answers it is necessary for the designer to use sound engineering judgment in approximating the coupling between different components. This can
be achieved by the following methods:
Method 1 - Analytical models, using either a control
volume method or a resistor network model. This method
requires oversimplification of the problem, otherwise the
solution becomes very complicated and impractical.
Method 2 - Use of CFD on a simplified geometry, as
described by Guenin [4]. This method suggests that an
equivalent surface area for a component is found as:
(6)
Pn
An =
Ptotal
• A Total
Where An is the equivalent footprint area of the component n, Pn is the power dissipation of the component n,
PTotal is the total power dissipation and ATotal is the total
surface area of the PCB. After the equivalent footprint
area is calculated, a simple PCB with a single component
having the footprint area An and power dissipation of 1
Watt can be simulated using CFD. This process effectively
calculates the difference between the board temperature
and the ambient (θBA) for a 1 Watt power dissipation.
Figure 6 shows the CFD simulation on one such
component and Figure 7 shows the θBA as a function
of PCB size. Figure 7 can be used to determine the θBA
for other components by simply calculating their effective
footprint area. It is assumed that all components have the
same footprint size.
Figure 7. ΘBA Distribution as a Function of PCB Size [4].
The board temperature can then be calculated as:
(7)
T
=
P
×
θ
B
n
BA
The junction temperature can then be calculated as:
TJ = TB + Pn × ψ JB
(8)
Where ψJB is the characterization parameter.
Method 3 - Measure the board temperature, TB,
experimentally, if the PCB is available, and use
Equation 8 to find the junction temperature. Again, this
is an approximation, as the conditions under which the
device is coupled to the PCB might be totally different
than those used with the JEDEC test board.
References:
1. J oiner, B., Adams, V, Measurement and Simulation of
Junction To Board Thermal Resistance and Its Application
in Thermal Modeling, Semiconductor Thermal Measurement and Management Symposium, 1999.
2. J ESD51-2, Integrated Circuits Thermal Test Method
- Natural Convection, JEDEC, March 1999.
3. J ESD51-6, Integrated Circuit Thermal Test Method Forced Convection, JEDEC, March 1999.
Figure 6. CFD Simulation of a Single Component on a PCB [4].
4. G uenin, B., Characterizing a Package on a Populated Printed
Circuit Board, Electronics Cooling Magazine, May 2001
© Advanced Thermal Solutions, inc. 2007 | 89-27 Access Road Norwood, MA 02062 | T: 781.769.2800 www.qats.com
Page 11