General-Purpose, Low Cost, DC-Coupled VGA AD8337 FEATURES FUNCTIONAL BLOCK DIAGRAM VPOS 8 AD8337 GAIN CONTROL INTERFACE GAIN 7 PREAMP (PRA) INPP 3 + INPN 4 – 18dB 1 VOUT 8 SECTIONS VCOM 2 5 6 PRAO VNEG 05575-001 Low noise Voltage noise = 2.2 nV/√Hz Current noise = 4.8 pA/√Hz (positive input) Wide bandwidth (−3 dB) = 280 MHz Nominal gain range 0 dB to 24 dB (preamp gain = 6 dB) Gain scaling 19.7 dB/V DC-coupled Single-ended input and output High speed uncommitted op amp input Supplies: +5 V, ±2.5 V, or ±5 V Low power: +78 mW with ±2.5 V supplies Figure 1. APPLICATIONS Gain trim PET scanners High performance AGC systems I/Q signal processing Video Industrial and medical ultrasound Radar receivers GENERAL DESCRIPTION The AD8337 is a low noise, single-ended, linear-in-dB, generalpurpose variable gain amplifier usable at frequencies from dc to 100 MHz; the −3 dB bandwidth is 280 MHz. Excellent bandwidth uniformity across the entire gain range and low output-referred noise makes the AD8337 ideal for gain trim applications and for driving high speed ADCs. Excellent dc characteristics combined with high speed make the AD8337 particularly suited for industrial ultrasound, PET scanners, and video applications. Dual-supply operation enables gain control of negative-going pulses such as generated by photodiodes or photomultiplier tubes. The AD8337 uses the popular and versatile ADI exclusive X-AMP® architecture with a gain range of 24 dB. The gain control interface provides precise linear-in-dB scaling of 19.7 dB/V, referenced to VCOM. The AD8337 includes an uncommitted operational currentfeedback preamplifier (PrA) that operates in inverting or noninverting configurations. Using external resistors, the device can be configured for gains of 6 dB or greater. The AD8337 is characterized with a noninverting PrA gain of 2× using two external 100 Ω resistors. The attenuator has a range of 24 dB, and the output amplifier has a fixed gain of 8× (18.06 dB). The lowest nominal gain range is 0 dB to 24 dB and can be shifted up or down by adjusting the preamp gain. Multiple AD8337s can be connected in series for larger gain ranges and to provide for interstage filtering to suppress noise and distortion and for nulling offset voltages. The operating temperature range of the AD8337 is –40°C to +85°C, and it is available in an 8-lead, 3 mm × 3 mm, chip scale package (LFCSP). Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. AD8337 TABLE OF CONTENTS Features .............................................................................................. 1 Gain Control ............................................................................... 18 Applications....................................................................................... 1 Output Stage................................................................................ 19 Functional Block Diagram .............................................................. 1 Attenuator.................................................................................... 19 General Description ......................................................................... 1 Single-Supply Operation and AC Coupling ........................... 19 Revision History ............................................................................... 2 Noise ............................................................................................ 20 Specifications..................................................................................... 3 Applications..................................................................................... 21 Absolute Maximum Ratings............................................................ 5 Preamplifier Connections ......................................................... 21 ESD Caution.................................................................................. 5 Driving Capacitive Loads.......................................................... 21 Pin Configuration and Functional Descriptions.......................... 6 Gain Control Considerations ................................................... 22 Typical Performance Characteristics ............................................. 7 Thermal Considerations............................................................ 23 Test Circuits..................................................................................... 14 PSI (Ψ) ......................................................................................... 23 Theory of Operation ...................................................................... 18 Board Layout............................................................................... 23 Overview...................................................................................... 18 Outline Dimensions ....................................................................... 25 Preamplifier................................................................................. 18 Ordering Guide .......................................................................... 25 VGA.............................................................................................. 18 REVISION HISTORY 6/06—Rev. 0 to Rev. A Updated Format..................................................................Universal Changes to Table 3............................................................................ 6 Changes to Figure 22, Figure 25, and Figure 26 ......................... 10 Changes to Figure 39 and Figure 40............................................. 13 Changes to Figure 74 and Figure 75............................................. 23 Updated Outline Dimensions ....................................................... 25 Changes to Ordering Guide .......................................................... 25 9/05—Revision 0: Initial Version Rev. A | Page 2 of 28 AD8337 SPECIFICATIONS VS = ±2.5 V, TA = 25°C, PrA Gain = +2, VCOM = GND, f = 10 MHz, CL = 5 pF, RL = 500 Ω, including a 20 Ω snubber resistor, unless otherwise specified. Table 1. Parameter GENERAL PARAMETERS –3 dB Small Signal Bandwidth –3 dB Large Signal Bandwidth Slew Rate Input Voltage Noise Input Current Noise Noise Figure Output-Referred Noise Output Impedance Output Signal Range Output Offset Voltage DYNAMIC PERFORMANCE Harmonic Distortion HD2 HD3 HD2 HD3 HD2 HD3 Input 1 dB Compression Point Two-Tone Intermodulation Distortion (IMD3) Output Third-Order Intercept Overload Recovery Group Delay Variation Conditions VOUT = 10 mV p-p VOUT = 1 V p-p VOUT = 2 V p-p VOUT = 1 V p-p f = 10 MHz f = 10 MHz VGAIN = 0.7 V, RS = 50 Ω, unterminated VGAIN = 0.7 V, RS = 50 Ω, shunt terminated with 50 Ω VGAIN = 0.7 V (Gain = 24 dB) VGAIN = −0.7 V (Gain = 0 dB) DC to 10 MHz RL ≥ 500 Ω, VS = ± 2.5 V, + 5 V RL ≥ 500 Ω, VS = ± 5 V VGAIN = 0.7 V (Gain = 24 dB) VGAIN = 0 V, VOUT = 1 V p-p f = 1 MHz Min Typ −25 280 100 625 490 2.15 4.8 8.5 14 34 21 1 VCOM ± 1.3 VCOM ± 3.8 ±5 Max Unit +25 MHz MHz V/μs V/μs nV/√Hz pA/√Hz dB dB nV/√Hz nV/√Hz Ω V V mV VGAIN = −0.7 V, f = +10 MHz (preamp limited) VGAIN = +0.7 V, f = +10 MHz (VGA limited) −72 −66 −62 −63 −58 −56 8.2 −9.4 dBc dBc dBc dBc dBc dBc dBm dBm VGAIN = 0 V, VOUT = 1 V p-p, f1 = 10 MHz, f2 = 11 MHz VGAIN = 0 V, VOUT = 1 V p-p, f1 = 45 MHz, f2 = 46 MHz VGAIN = 0 V, VOUT = 2 V p-p, f1 = 10 MHz, f2 = 11 MHz VGAIN = 0 V, VOUT = 2 V p-p, f1 = 45 MHz, f2 = 46 MHz VGAIN = 0 V, VOUT = 1 V p-p, f = 10 MHz VGAIN = 0 V, VOUT = 1 V p-p, f = 45 MHz VGAIN = 0 V, VOUT = 2 V p-p, f = 10 MHz VGAIN = 0 V, VOUT = 2 V p-p, f = 45 MHz VGAIN = 0.75 V, VIN = 50 mV p-p to 500 mV p-p 1 MHz < f < 100 MHz, full gain range −71 −57 −58 −45 34 28 35 26 50 ±1 dBc dBc dBc dBc dBm dBm dBm dBm ns ns f = 10 MHz f = 45 MHz Rev. A | Page 3 of 28 AD8337 Parameter DYNAMIC PERFORMANCE Harmonic Distortion HD2 HD3 HD2 HD3 HD2 HD3 Input 1 dB Compression Point Two-Tone Intermodulation Distortion (IMD3) Output Third Order Intercept Overload Recovery ACCURACY Absolute Gain Error GAIN CONTROL INTERFACE Gain Scaling Factor Gain Range Intercept Input Voltage (VGAIN) Range Input Impedance Bias Current Response Time POWER SUPPLY Supply Voltage Vs = ±2.5 V Quiescent Current Power Dissipation PSRR Vs = ±5 V Quiescent Current Power Dissipation PSRR Conditions VS = ±5 V VGAIN = 0 V, VOUT = 1 V p-p f = 1 MHz Min f = 35 MHz VGAIN = −0.7 V, f = +10 MHz VGAIN = +0.7 V, f = +10 MHz VGAIN = 0 V, VOUT = 1 V p-p, f1 = 10 MHz, f2 = 11 MHz VGAIN = 0 V, VOUT = 1 V p-p, f1 = 45 MHz, f2 = 46 MHz VGAIN = 0 V, VOUT = 2 V p-p, f1 = 10 MHz, f2 = 11 MHz VGAIN = 0 V, VOUT = 2 V p-p, f1 = 45 MHz, f2 = 46 MHz VGAIN = 0 V, VOUT = 1 V p-p, f = 10 MHz VGAIN = 0 V, VOUT = 1 V p-p, f = 45 MHz VGAIN = 0 V, VOUT = 2 V p-p, f = 10 MHz VGAIN = 0 V, VOUT = 2 V p-p, f = 45 MHz VGAIN = 0.7 V, VIN = 0.1 V p-p to 1 V p-p −1.25 −1.0 −1.25 −0.6 V < VGAIN < +0.6 V VGAIN = 0 V No foldover Max −85 −75 −90 −80 −75 −76 14.5 −1.7 −74 −60 −64 −49 35 28 36 28 50 f = 10 MHz −0.7 V < VGAIN < −0.6 V −0.6 V < VGAIN < −0.5 V −0.5 V < VGAIN < +0.5 V +0.5 V < VGAIN < +0.6 V +0.6 V < VGAIN < +0.7 V Typ 0.7 to 3.5 ±0.35 ±0.25 ±0.35 −0.7 to −3.5 dBc dBc dBc dBc dBc dBc dBm dBm dBc dBc dBc dBc dBm dBm dBm dBm ns +1.25 +1.0 +1.25 dB dB dB dB dB +VS dB/V dB dB V MΩ μA ns 19.7 24 12.65 −VS 70 0.3 200 −0.7 V < VGAIN < +0.7 V 24 dB gain change Unit VPOS to VNEG (dual- or single-supply operation) 4.5 5 10 V Each supply (VPOS and VNEG) No signal, VPOS to VNEG = 5 V VGAIN = 0.7 V, f = 1 MHz 10.5 15.5 78 −40 23.5 mA mW dB Each supply (VPOS and VNEG) No signal, VPOS to VNEG = 10 V VGAIN = 0.7 V, f = 1 MHz 13.5 18.5 185 −40 25.5 mA mW dB Rev. A | Page 4 of 28 AD8337 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Voltage Supply Voltage (VPOS, VNEG) Input Voltage (INPx) GAIN Voltage Power Dissipation (Exposed Pad Soldered to PC Board) Temperature Operating Temperature Storage Temperature Lead Temperature (Soldering, 60 sec) Thermal Data—4 Layer Jedec Board No Air Flow (Exposed Pad Soldered to PC Board) θJA θJB θJC ΨJT ΨJB Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rating ±6 V VPOS, VNEG VPOS, VNEG 866 mW –40°C to +85°C –65°C to +150°C 300°C 75.4°C/W 47.5°C/W 17.9°C/W 2.2°C/W 46.2°C/W ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. A | Page 5 of 28 AD8337 VOUT 1 VCOM 2 PIN 1 AD8337 8 VPOS 7 GAIN INPP 3 TOP VIEW 6 VNEG INPN 4 PRAO (Not to Scale) 5 05575-002 PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS Figure 2. 8-Lead LFCSP Table 3. Pin Function Descriptions Pin No. 1 2 Mnemonic VOUT VCOM 3 4 5 6 7 8 INPP INPN PRAO VNEG GAIN VPOS Description VGA Output. Common Ground when using Plus and Minus Supply Voltages. For single supply operation, provide half the positive supply voltage at Pin VPOS to Pin VCOM. Positive Input to Preamplifier. Negative Input to Preamplifier. Preamplifier Output. Negative Supply (−VPOS for dual supply; GND for single supply). Gain Control Input Centered at VCOM. Positive Supply. Rev. A | Page 6 of 28 AD8337 TYPICAL PERFORMANCE CHARACTERISTICS VS = ±2.5 V, TA = 25°C, RL = 500 Ω, including a 20 Ω snubber resistor, f = 10 MHz, CL = 2 pF, VIN = 10 mV p-p, noninverting configuration, unless otherwise noted. 60 30 500 UNITS VGAIN = –0.4V +85°C +25°C –40°C 25 VGAIN = 0V 50 VGAIN = +0.4V 40 % OF UNITS GAIN (dB) 20 15 10 30 20 5 05575-003 0.5 0.4 0.3 0.2 0 800 0.1 600 0 400 –0.1 0 200 VGAIN (mV) –0.2 –200 –0.3 –400 –0.4 –600 –0.5 –5 –800 05575-006 10 0 GAIN ERROR (dB) Figure 6. Gain Error Histogram for Three Values of VGAIN Figure 3. Gain vs. VGAIN at Three Temperatures See Figure 44 50 2.0 +85°C +25°C –40°C 1.5 500 UNITS –0.4V ≤ VGAIN ≤ +0.4V 40 1.0 % OF UNITS 0 –0.5 –1.0 30 20 10 –2.0 –800 05575-004 –1.5 –600 –400 –200 200 0 VGAIN (mV) 400 600 05575-007 GAIN (dB) 0.5 0 19.3 800 19.4 Figure 4. Gain Error vs. VGAIN at Three Temperatures See Figure 44 2.0 1.5 1.0 50 20.0 20.1 12.9 13.0 500 UNITS 40 % OF UNITS 0.5 GAIN (dB) 19.6 19.7 19.8 19.9 GAIN SCALING (dB/V) Figure 7. Gain Scaling Histogram f = 1MHz f = 10MHz f = 70MHz f = 100MHz f = 150MHz RELATIVE TO BEST FIT LINE FOR 10MHz 19.5 0 –0.5 30 20 –1.0 05575-005 –2.0 –800 –600 –400 0 –200 200 VGAIN (mV) 400 600 05575-008 10 –1.5 0 800 12.2 Figure 5. Gain Error vs. VGAIN at Five Frequencies See Figure 44 12.3 12.4 12.5 12.6 12.7 INTERCEPT (dB) 12.8 Figure 8. Intercept Histogram Rev. A | Page 7 of 28 AD8337 30 30 25 20 VG = +0.7 25 VG = +0.5 20 VGAIN = 0V GAIN (dB) VG = 0 10 VG = –0.2 5 VG = –0.7 –5 100k 1M 10 5 VG = –0.5 0 15 0 10M 100M –5 100k 500M CL = 47pF CL = 22pF CL = 10pF CL = 0pF 05575-012 15 05575-009 GAIN (dB) VG = +0.2 1M FREQUENCY (Hz) 10 VG = +0.7 15 VG = +0.5 GAIN (dB) GAIN (dB) VG = 0 5 500M VS = ±2.5V VS = ±5V 8 VG = +0.2 10 100M Figure 12. Frequency Response for Three Values of CLOAD with a 20 Ω Snubbing Resistor See Figure 45 Figure 9. Frequency Response for Various Values of VGAIN See Figure 45 20 10M FREQUENCY (Hz) VG = –0.2 0 VG = –0.5 6 4 –5 VG = –0.7 05575-010 1M 10M 100M 0 100k 500M FREQUENCY (Hz) 20 15 GROUP DELAY (ns) 20 15 10 5 CL = 47pF CL = 22pF CL = 10pF CL = 0pF 1M 10M 100M 10 5 0 –5 05575-011 GAIN (dB) 500M 25 25 –5 100k 100M Figure 13. Frequency Response—Preamp See Figure 46 VGAIN = 0V 0 10M FREQUENCY (Hz) Figure 10. Frequency Response for Various Values of VGAIN—Inverting Input See Figure 58 30 1M –10 1M 500M FREQUENCY (Hz) 05575-014 –15 100k 05575-013 2 –10 10M FREQUENCY (Hz) Figure 11. Frequency Response for Three Values of CLOAD See Figure 45 Figure 14. Group Delay vs. Frequency See Figure 47 Rev. A | Page 8 of 28 100M AD8337 10 40 +85°C +25°C –40°C VS = ±5V 8 35 4 NOISE (nV/√Hz) 2 0 –2 VS = ±2.5V 30 25 –4 –6 20 –8 –10 –800 –600 05575-015 +85°C +25°C –40°C –400 –200 0 200 400 600 15 –800 800 05575-018 OFFSET VOLTAGE (mV) 6 –600 –400 –200 VGAIN (mV) 400 600 800 25 70 500 UNITS VGAIN = –0.4V 60 VGAIN = +0.4V +85°C +25°C –40°C VGAIN = 0V NOISE (nV/√Hz) 20 50 40 30 20 10 5 05575-016 10 0 15 –15 –10 –5 0 5 10 15 20 0 –800 25 05575-019 80 % OF UNITS 200 Figure 18. Output-Referred Noise vs. VGAIN at Three Temperatures See Figure 50 Figure 15. Offset Voltage vs. VGAIN at Three Temperatures See Figure 48 –600 –400 –200 OUTPUT OFFSET VOLTAGE (mV) 1k 0 200 400 600 800 VGAIN (mV) Figure 19. Short-Circuit, Input-Referred Noise at Three Temperatures See Figure 50 Figure 16. Output Offset Voltage Histogram for Three Values of VGAIN 7 VS = ±2.5V VS = ±5V VGAIN = 0.7V RFB1 = RFB2 = 100Ω 6 100 NOISE (nV/√Hz) 5 10 PREAMP GAIN = –1 4 3 PREAMP GAIN = +2 2 1 0.1 1M 10M 100M 0 100k 500M 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 17. VGA Output Impedance vs. Frequency See Figure 49 05575-020 1 05575-017 IMPEDANCE (Ω) 0 VGAIN (mV) Figure 20. Short-Circuit, Input-Referred Noise vs. Frequency at Max Gain— Inverting and Noninverting Preamp Gain = −1 and +2 See Figure 50 Rev. A | Page 9 of 28 AD8337 –40 f = 10MHz, VGAIN = 0.7V HD3 HD2 –50 INPUT REFERRED NOISE DISTORTION (dBc) INPUT NOISE (nV/√Hz) 10 1 RS THERMAL NOISE ALONE –60 10 1 100 –80 1k 05575-024 0.1 05575-021 –70 0 5 10 15 20 25 30 35 40 45 50 LOAD CAPACITANCE (pF) SOURCE RESISTANCE (Ω) Figure 21. Input-Referred Noise vs. RS See Figure 61 Figure 24. Harmonic Distortion vs. Load Capacitance See Figure 52 35 –30 50Ω SOURCE 30 WITH 50Ω SHUNT TERMINATION AT INPUT 20 UNTERMINATED 15 –50 –60 –70 5 –800 05575-022 10 –600 –400 –200 0 200 VGAIN (mV) 400 600 –80 –800 800 Figure 22. Noise Figure vs. VGAIN See Figure 51 –40 –600 –400 –200 200 0 VGAIN (mV) 400 600 800 Figure 25. HD2 vs. VGAIN at Four Frequencies See Figure 52 –30 HD3 VS = ±2.5V HD3 VS = ±5V HD2 VS = ±2.5V HD2 VS = ±5V VOUT = 1V p-p VGAIN = 0V 1MHz 10MHz 35MHz 100MHz 05575-025 25 DISTORTION (dBc) NOISE FIGURE (dB) –40 1MHz 10MHz 35MHz 100MHz –40 DISTORTION (dBc) –60 –70 –60 0 200 400 600 800 1.0k 1.2k 1.4k LOAD RESISTANCE (Ω) 1.6k 1.8k –80 –800 2.0k Figure 23. Harmonic Distortion vs. RLOAD and Supply Voltage See Figure 52 05575-026 –80 –50 –70 05575-023 DISTORTION (dBc) –50 –600 –400 –200 200 0 VGAIN (mV) 400 Figure 26. HD3 vs. VGAIN at Four Frequencies See Figure 52 Rev. A | Page 10 of 28 600 800 AD8337 –40 LIMITED BY MAXIMUM PREAMP OUTPUT SWING 40 –50 OUTPUT IP3 (dBm) –60 –70 30 20 10 –80 05575-027 –90 –800 –600 –400 –200 0 200 VGAIN (mV) 400 600 0 –800 800 Figure 27. HD2 vs. VGAIN for Three Levels of Output Voltage See Figure 52 –30 VOUT = 2V p-p VOUT = 1V p-p VOUT = 0.5V p-p –400 –200 0 200 VGAIN (mV) 400 600 800 50 LIMITED BY MAXIMUM PREAMP OUTPUT SWING 40 –50 –70 –600 –400 –200 0 200 VGAIN (mV) 400 600 –30 20 15 INPUT POWER (dBm) –40 –50 –60 10M 05575-029 –70 –80 1M –600 –400 –200 0 200 VGAIN (mV) 400 600 800 Figure 31. Output-Referred IP3 (OIP3) vs. VGAIN, VS = ±5 V at Five Frequencies See Figure 64 VOUT = 1V p-p VGAIN = 0V TONES SEPARATED BY 100kHz VS = ±2.5V VS = ±5V 1MHz 10MHz 45MHz 70MHz 100MHz VS = ±5V VOUT = 1V p-p VGAIN = 0V TONES SEPARATED BY 100kHz 0 –800 800 Figure 28. HD3 vs. VGAIN for Three Levels of Output Voltage See Figure 52 –20 20 10 05575-028 –90 –800 30 05575-031 –60 –80 IMD (dBc) –600 Figure 30. Output-Referred IP3 (OIP3) vs. VGAIN at Five Frequencies See Figure 64 OUTPUT IP3 (dBm) DISTORTION (dBc) –40 1MHz 10MHz 45MHz 70MHz 100MHz VOUT = 1V p-p VGAIN = 0V TONES SEPARATED BY 100kHz VS = ±2.5V VS = ±5V PREAMP LIMITED 10 5 0 –5 –10 100M –15 –800 FREQUENCY (Hz) Figure 29. IMD3 vs. Frequency See Figure 64 05575-032 DISTORTION (dBc) 50 VOUT = 2V p-p VOUT = 1V p-p VOUT = 0.5V p-p 05575-030 –30 –600 –400 –200 0 200 VGAIN (mV) 400 Figure 32. Input P1dB (IP1dB) vs. VGAIN See Figure 63 Rev. A | Page 11 of 28 600 800 AD8337 60 6 600 40 4 400 40 20 2 200 20 0 0 –60 0 10 20 30 TIME (ns) 40 50 60 –200 –4 –400 –6 –600 –8 70 0 –40 OUTPUT –60 VS = ±2.5V VGAIN = 0.7V –10 0 10 20 30 TIME (ns) 40 50 60 –80 70 Figure 36. Large Signal Pulse Response for Three Capacitive Loads See Figure 53 Figure 33. Small Signal Pulse Response See Figure 53 80 8 800 6 600 40 4 400 40 20 2 200 20 0 0 VGAIN = 0.7V 60 CL CL CL CL VIN (mV) VOUT (mV) INPUT –2 –20 –40 –200 –4 –400 –6 –600 –10 0 10 20 30 TIME (ns) 40 50 60 –8 70 0 60 0.6 400 40 0.4 200 20 0.2 –400 INPUT OUTPUT –600 –800 –20 –10 0 10 20 30 TIME (ns) 40 50 60 –10 0 10 20 30 TIME (ns) 40 50 60 –80 70 –0.2 –40 –0.4 –60 –0.6 –80 70 Figure 35. Large Signal Pulse Response See Figure 53 VOUT 0 –20 05575-035 –200 0 (V) 600 VIN (mV) 0.8 0 –60 VS = ±5V VGAIN = 0.7V 80 VGAIN = 0.7V –40 OUTPUT Figure 37. Large Signal Pulse Response for Three Capacitive Loads, VS = ±5 V See Figure 53 Figure 34. Small Signal Pulse Response—Inverting Feedback See Figure 59 800 –20 INPUT –800 –20 05575-034 –80 –20 60 0 OUTPUT –60 = 0pF = 10pF = 22pF = 47pF –0.8 –0.5 05575-038 80 VOUT (mV) –20 INPUT –800 –20 VIN (mV) 0 VIN (mV) –10 60 05575-036 OUTPUT –80 –20 VIN (mV) –2 INPUT CL = 0pF CL = 10pF CL = 22pF CL = 47pF 05575-037 –20 05575-033 VOUT (mV) VGAIN = 0.7V VOUT (mV) 800 –40 VOUT (mV) 80 8 80 VGAIN 0 0.5 1.0 TIME (µs) Figure 38. Gain Response See Figure 54 Rev. A | Page 12 of 28 1.5 2.0 AD8337 1.5 10 VIN (V) VOUT (V) VGAIN = 0.7V VGAIN = +0.7V, VS = ±2.5V VGAIN = +0.7V, VS = ±5V VGAIN = 0V, VS = ±2.5V VGAIN = 0V, VS = ±5V VGAIN = –0.7V, VS = ±2.5V VGAIN = –0.7V, VS = ±5V 0 1.0 –10 –20 PSRR (dB) (V) 0.5 0 –30 –40 –50 –0.5 –60 –1.0 –0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 05575-042 05575-039 –1.5 –0.3 –70 –80 100k 1.7 1M TIME (µs) 24 1.0 (V) 0.5 0 –0.5 –1.5 –0.3 05575-040 –1.0 –0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 TIME (µs) 0 –10 VGAIN = +0.7V, VS = ±2.5V VGAIN = +0.7V, VS = ±5V VGAIN = 0V, VS = ±2.5V VGAIN = 0V, VS = ±5V VGAIN = –0.7V, VS = ±2.5V VGAIN = –0.7V, VS = ±5V PSRR (dB) –20 –30 –40 –50 05575-041 –60 –70 –80 100k 1M 10M FREQUENCY (Hz) 22 20 18 16 14 12 –50 –30 –10 10 30 50 TEMPERATURE (°C) 70 Figure 43. Quiescent Supply Current vs. Temperature See Figure 57 Figure 40. VGA Overdrive Recovery See Figure 56 10 VS = ±5V VS = ±2.5V 05575-043 QUIESCENT SUPPLY CURRENT (mA) VIN (V) VOUT (V) VGAIN = 0.7V 100M Figure 42. PSRR vs. Frequency of Negative Supply See Figure 60 Figure 39. Preamp Overdrive Recovery See Figure 55 1.5 10M FREQUENCY (Hz) 100M Figure 41. PSRR vs. Frequency of Positive Supply See Figure 60 Rev. A | Page 13 of 28 90 AD8337 TEST CIRCUITS NETWORK ANALYZER NETWORK ANALYZER OUT OUT IN 50Ω IN 50Ω 50Ω AD8337 AD8337 4 20Ω 453Ω 49.9Ω 4 56.2Ω 5 + PRA – 3 1 20Ω 1 56.2Ω 7 5 100Ω 7 05575-044 100Ω VGAIN 100Ω 05575-047 49.9Ω 453Ω + PRA – 3 50Ω 100Ω Figure 47. Group Delay Figure 44. Gain and Gain Error vs. VGAIN OSCILLOSCOPE NETWORK ANALYZER FUNCTION GENERATOR OUT OUT IN 50Ω 3 4 50Ω VGAIN DIFFERENTIAL FET PROBE AD8337 1 453Ω + PRA – 3 20Ω + PRA – CH2 50Ω 7 453Ω AD8337 49.9Ω CH1 50Ω 50Ω 4 1 50Ω OPTIONAL POSITIONS FOR CLOAD VGAIN 100Ω 5 100Ω 100Ω Figure 48. Offset Voltage Figure 45. Frequency Response NETWORK ANALYZER NETWORK ANALYZER OUT 05575-048 7 05575-045 5 100Ω IN IN 50Ω CONFIGURE TO MEASURE Z CONVERTED S22 50Ω 50Ω 0Ω 49.9Ω 4 1 5 100Ω 100Ω NC + PRA – 3 20Ω 453Ω 49.9Ω 4 0Ω + PRA – 1 5 7 NC 453Ω 7 100Ω 05575-046 3 AD8337 NC 100Ω NC Figure 49. Output Resistance vs. Frequency Figure 46. Frequency Response—Preamp Rev. A | Page 14 of 28 05575-049 AD8337 AD8337 OSCILLOSCOPE PULSE GENERATOR SPECTRUM ANALYZER POWER SPLITTER CH1 OUT IN CH2 50Ω 50Ω 50Ω AD8337 0Ω AD8337 + PRA – 3 49.9Ω 4 + PRA – 3 0Ω 4 1 56.2Ω 49.9Ω 5 5 7 100Ω 7 0.7V 100Ω 05575-053 100Ω 05575-050 VGAIN 100Ω Figure 53. Pulse Response Figure 50. Input-Referred and Output-Referred Noise DUAL FUNCTION GENERATOR OSCILLOSCOPE POWER SPLITTER NOISE FIGURE METER NOISE SOURCE DRIVE SINE WAVE INPUT SQUARE WAVE CH1 CH2 50Ω NOISE SOURCE AD8337 AD8337 + PRA – 4 1 5 49.9Ω 4 NC 1 5 7 100Ω 100Ω 100Ω 05575-051 VGAIN 100Ω 20Ω 453Ω + PRA – 3 0Ω 05575-054 3 50Ω VGAIN DIFFERENTIAL FET PROBE 7 0Ω 49.9Ω (OR ∞) 20Ω 453Ω 1 Figure 54. Gain Response Figure 51. Noise Figure vs. VGAIN FUNCTION GENERATOR OSCILLOSCOPE SPECTRUM ANALYZER RLOAD INPUT SIGNAL GENERATOR CH2 CH1 OUTPUT 50Ω 50Ω NC LOW PASS FILTER 7 AD8337 AD8337 3 20Ω + PRA – 3 49.9Ω 4 49.9Ω 1 4 + PRA – 1 NC CLOAD 5 5 100Ω 7 100Ω VGAIN 05575-052 100Ω 100Ω Figure 55. Preamp Overdrive Recovery Figure 52. Harmonic Distortion Rev. A | Page 15 of 28 05575-055 100Ω AD8337 FUNCTION GENERATOR OSCILLOSCOPE POWER SPLITTER OSCILLOSCOPE PULSE GENERATOR OUTPUT POWER SPLITTER CH2 CH1 50Ω OUT 50Ω CH2 CH1 50Ω 50Ω AD8337 4 1 AD8337 NC 100Ω 5 4 100Ω 20Ω 453Ω + PRA – 3 1 56.2Ω 100Ω 5 7 100Ω 05575-056 100Ω Figure 56. VGA Overdrive Recovery 05575-059 49.9Ω 20Ω 453Ω + PRA – 3 0.7V Figure 59. Pulse Response—Inverting Feedback +SUPPLY TO NETWORK ANALYZER BIAS PORT NETWORK ANALYZER BENCH POWER SUPPLY DMM (+I) OUT 8 BYPASS CAPACITORS REMOVED FOR MEASUREMENT AD8337 3 4 + PRA – DMM (V) 1 7 50Ω VPOS AD8337 + PRA – 3 49.9Ω 5 IN 50Ω 4 1 DIFFERENTIAL FET PROBE 6 100Ω 5 DMM (–I) Figure 60. PSRR SPECTRUM ANALYZER NETWORK ANALYZER IN IN 50Ω 50Ω 50Ω 453Ω AD8337 3 100Ω 4 + PRA – 05575-060 VGAIN 100Ω Figure 57. Supply Current OUT 7 100Ω 05575-057 100Ω AD8337 3 20Ω 1 4 + PRA – 1 100Ω 5 7 7 VGAIN 100Ω Figure 58. Frequency Response—Inverting Feedback VGAIN Figure 61. Input-Referred Noise vs. RS Rev. A | Page 16 of 28 05575-061 100Ω 05575-058 5 100Ω AD8337 NETWORK ANALYZER POWER SWEEP SPECTRUM ANALYZER 22dB OUT IN IN 50Ω 50Ω 50Ω 453Ω AD8337 AD8337 + PRA – 3 + PRA – 1 5 49.9Ω 4 5 7 7 100Ω 0.7V 05575-062 100Ω 100Ω 20Ω 1 VGAIN 100Ω Figure 63. IP1dB vs. VGAIN Figure 62. Short-Circuit Input Noise vs. Frequency SPECTRUM ANALYZER INPUT 50Ω +22dB –6dB SIGNAL GENERATOR –6dB COMBINER –6dB AD8337 453Ω 3 +22dB –6dB 49.9Ω 4 20Ω + PRA – 1 SIGNAL GENERATOR 5 7 100Ω 100Ω Figure 64. IMD and OIP3 Rev. A | Page 17 of 28 VGAIN 05575-063 4 05575-064 3 AD8337 THEORY OF OPERATION VPOS 8 RFB1 = RFB2 = 100Ω INPP 3 RG INPN 4 + 18dB (8X) – 749Ω + ATTENUATOR –24dB TO 0dB – + PRA 6dB – 1 VOUT PRAO RFB2 RFB1 5 GAIN INTERFACE INTERPOLATOR BIAS VCOM 2 6 7 VNEG GAIN 05575-065 107Ω Figure 65. Block Diagram and Pinout OVERVIEW VGA The AD8337 is a low-noise, single-ended, linear-in-dB, generalpurpose, variable gain amplifier (VGA) usable at frequencies up to 100 MHz. It is fabricated using a proprietary ADI dielectrically isolated complementary bipolar process. The bandwidth is dc to 280 MHz and features low dc offset voltage and an ideal nominal gain range of 0 dB to 24 dB. Requiring about 15.5 mA, the power consumption is only 78 mW from either a single +5 V or a dual ±2.5 V supply. Figure 65 is the circuit block diagram of the AD8337. This X-AMP, with its linear-in-dB gain characteristic architecture, yields the optimum dynamic range for receiver applications. Referring to Figure 65, the signal path consists of a −24 dB variable attenuator followed by a fixed gain amplifier of 18 dB, for a total VGA gain range of −6 dB to +18 dB. With the preamplifier configured for a gain of 6 dB, the composite gain range is 0 dB to 24 dB. The VGA plus preamp with 6 dB of gain implements the following exact gain law: PREAMPLIFIER An uncommitted, current-feedback op amp included in the AD8337 can be used as a preamplifier to buffer the ladder network attenuator of the X-AMP. As with any op amp, the gain is established using external resistors; the preamplifier is specified with a noninverting gain of 6 dB (2×) and both gain resistor values of 100 Ω. The preamplifier gain can be increased using larger values of RFB2, trading off bandwidth and offset voltage. The value of RFB2 should be ≥100 Ω, because it and an internal compensation capacitor determines the 3 dB bandwidth, and smaller values can compromise preamplifier stability. Because the AD8337 is dc-coupled, larger preamp gains increase the offset voltage. The offset voltage can be compensated by connecting a resistor between the INPN input and the supply voltage. If the offset is negative, the resistor value connects to the negative supply. For ease of adjustment, a trimmer network can be used. For larger gains, the overall noise is reduced if a low value of RFB1 is selected. For values of RFB1 = 20 Ω and RFB2 = 301 Ω, the preamp gain is 16× (24.1 dB), and the input referred noise is approximately 1.5nV/√Hz. For this value of gain, the overall gain range increases by 18 dB, so the gain range is 18 dB to 42 dB. dB ⎡ ⎤ Gain( dB ) = ⎢19.7 ×V + ICPT( dB ) GAIN ⎥⎦ V ⎣ where the nominal intercept (ICPT) is 12.65 dB. The ICPT increases as the gain of the preamp is increased. For example, if the gain of the preamp is increased by 6 dB, then ICPT increases to 18.65 dB. Although the above equation shows the exact gain law as based on statistical data, a quick estimation of signal levels can be made using the default slope of 20 dB/V for a particular gain setting. For example, the change in gain for a VGAIN change of 0.3 V is 6 dB using a slope of 20 dB/V and 5.91 dB using the exact slope of 19.6 dB/V. This is a difference of only 0.09 dB. GAIN CONTROL The gain control interface provides a high impedance input and is referenced to pin VCOM (in a single-supply application to midsupply at [VPOS + VNEG]/2 for optimum swing). When dual supplies are used, VCOM is connected to ground. The voltage on Pin VCOM determines the midpoint of the gain range. For a ground referenced design, the VGAIN range is from −0.7 V to +0.7 V with the most linear-in-dB section of the gain control between −0.6 V and +0.6 V. In the center 80% of the VGAIN range, the gain error is typically less than ±0.2 dB. The gain control voltage can be increased or decreased to the positive or negative rails without gain foldover. Rev. A | Page 18 of 28 AD8337 The gain scaling factor (gain slope) is designed for 20 dB/V; this relatively low slope ensures that noise on the GAIN input is not unduly amplified. Since a VGA functions as a multiplier, it is important to make sure that the GAIN input does not inadvertently modulate the output signal with unwanted noise on the gain control pin. Because of its high input impedance, a simple low-pass filter can be added to the GAIN input to filter unwanted noise. SINGLE-SUPPLY OPERATION AND AC COUPLING OUTPUT STAGE When ac coupling the preamplifier input, a bias network and bypass capacitor must be connected to the opposite polarity input pin. The bias generator for Pin VCOM must provide the dynamic current to the preamplifier feedback network and the VGA attenuator. For many single 5 V applications, a reference such as the ADR43 and a good op amp provide an adequate VCOM source if a 2.5 V supply is unavailable. The output stage is a Class AB, voltage-feedback, complementary, emitter-follower with a fixed gain of 18 dB, similar to the preamplifier in speed and bandwidth. Because of the ac-beta roll-off of the output devices and the inherent reduction in feedback beyond the −3 dB bandwidth, the impedance looking into the output pin of the preamp and output stages appears to be inductive (increasing impedance with increasing frequency). The high speed output amplifier used in the AD8337 can drive large currents, but its stability is susceptible to capacitive loading. A small series resistor mitigates the effects of capacitive loading (see the Applications section). If the AD8337 is to be operated from a single 5 V supply, the bias supply for VCOM must be a very low impedance 2.5 V reference, especially if dc coupling is used. If the device is dc-coupled, the VCOM source must be able to handle the preamplifier and VGA dynamic load currents in addition to the bias currents. ATTENUATOR The input resistance of the VGA attenuator is nominally 265 Ω. Assuming the default preamplifier feedback network RFB1 + RFB2 is 200 Ω, the effective preamplifier load is about 114 Ω. The attenuator is composed of eight 3.01 dB sections for a total attenuation range of −24.08 dB. Following the attenuator is a fixed gain amplifier with 8× (18.06 dB) gain. Because of this relatively low gain, the output offset is kept well below 20 mV over temperature; the offset is largest at maximum gain when the preamplifier offset is amplified. The VCOM pin defines the common-mode reference for the output as seen in Figure 65. Rev. A | Page 19 of 28 AD8337 NOISE en − out = (RS × At )2 + (en − PrA × At )2 + (in − PrA × RS )2 + (en − Rfb1 × Rfb2 ×A ) 2 + (e ×A ) 2 + (e ×A )2 n − VGA VGA n − Rfb2 VGA Rfb1 VGA The total input-referred voltage and current noise of the positive input of the preamplifier is about 2.2 nV/√Hz and 4.8 pA/√Hz. The VGA output referred noise is about 21 nV/√Hz at low gains. This result is divided by the VGA fixed gain amplifier gain of 8× and results in a voltage noise density of 2.6 nV/√Hz referred to the VGA input. This value includes the noise of the VGA gain setting resistors as well. If this voltage is again divided by the preamp gain of 2, then the VGA noise referred all the way to the preamp input is about 1.3 nV/√Hz. From this, we can determine that the preamplifier, including the 100 Ω gain setting resistors, contributes about 1.8 nV/√Hz. The two 100 Ω resistors contribute 1.29 nV/√Hz each at the output of the preamp. With the gain resistor noise subtracted, the preamplifier noise is about 1.55 nV/√Hz. Equation 1 shows the calculation that determines the output referred noise at maximum gain (24 dB or 16×): • At = total gain from preamp input to VGA output; • RS = source resistance; • en − PrA = input-referred voltage noise of the preamp; • in − PrA = current noise of the preamp at the INPP pin; • en − Rfb1 = voltage noise of Rfb1; en-Rfb2 = voltage noise of Rfb2; • en − VGA = input-referred voltage noise of VGA (low gain, output-referred noise divided by a fixed gain of 8×). (1) Assuming RS = 0, RFB1 = RFB2 = 100 Ω, At = 16, AVGA = 8, the noise simplifies to en − out = 35 nV / Hz (1.75 × 16) 2 + 2(1.29 × 8)2 + (1.9 × 8)2 = (2) Dividing the result by 16 gives the total input-referred noise with a short-circuited input as 2.2 nV/√Hz. When the preamplifier is used in the inverting configuration with the same RFB1 and RFB2 = 100 Ω as above, then en − out does not change. However, because the gain dropped by 6 dB, the inputreferred noise increases by a factor of 2 to about 4.4 nV/√Hz. The reason for this increase is that the noise gain to the output of all the noise generators stays the same, yet the preamp in the inverting configuration has a gain of (−1) compared to the (+2) in the noninverting configuration; this increases the input referred noise by 2. Rev. A | Page 20 of 28 AD8337 APPLICATIONS PREAMPLIFIER CONNECTIONS DRIVING CAPACITIVE LOADS Noninverting Gain Configuration Because of the large bandwidth of the AD8337, stray capacitance at the output pin can induce peaking in the frequency response as the gain of the amplifier begins to roll-off. Figure 68 shows peaking with two values of load capacitance using ±2.5 V supplies and VGAIN = 0 V. The AD8337 preamplifier is an uncommitted, current-feedback op amp that is stable for values of RFB2 ≥ 100 Ω. See Figure 66 for noninverting feedback connections. INPN + 4 – 25 VGAIN = 0V CL = 0pF CL = 10pF CL = 22pF 20 NO SNUBBING RESISTOR PRAO 5 15 05575-066 RFB1 GAIN (dB) RFB2 Figure 66. AD8337 Preamplifier Configured for Noninverting Gain 5 Two surface-mount resistors establish the preamplifier gain. Equal values of 100 Ω configure the preamplifier for a 6 dB gain and the device for a default gain range of 0 dB to 24 dB. For preamp gains ≥2, select a value of RFB2 ≥ 100 Ω and RFB1 ≤ 100 Ω. Higher values of RFB2 reduce the bandwidth and increase the offset voltage, but smaller values compromise stability. If RFB1 ≤ 100 Ω, the gain increases, and the input-referred noise decreases. 0 –5 100k RFB1 INPN PREAMPLIFIER 3 + 4 – RFB2 5 05575-067 PRAO 10M 100M 500M Figure 68. Peaking in the Frequency Response for Two Values of Output Capacitance with ±2.5 V Supplies and No Snubbing Resistor 25 VGAIN = 0V CL = 0pF CL = 10pF 20 CL = 22pF WITH 20Ω SNUBBING RESISTOR For applications requiring polarity inversion of negative pulses, or for waveforms that require current sinking, the preamplifier can be configured as an inverting-gain amplifier. When configured with bipolar supplies, the preamplifier amplifies positive or negative input voltages with no level shifting of the commonmode input voltage required. Figure 67 shows the AD8337 configured for inverting gain operation. Because the AD8337 is a very high frequency device, stability issues can occur unless the circuit board on which it is used is carefully laid out. The stability of the preamp is affected by parasitic capacitance around the INPN pin. Position the Preamp Gain Resistor RFB1 and Resistor RFB2 as close as possible to Pin 4, INPN, to minimize stray capacitance. 1M FREQUENCY (Hz) Inverting Gain Configuration INPP 10 05575-068 RG PREAMPLIFIER 3 GAIN (dB) 15 10 5 0 –5 100k 05575-069 INPP 1M 10M FREQUENCY (Hz) 100M 500M Figure 69. Frequency Response for Two Values of Output Capacitance with a 20 Ω Snubbing Resistor In the time domain, stray capacitance at the output pin can induce overshoot on the edges of transient signals, as seen in Figure 70 and Figure 72. The amplitude of the overshoot is also a function of the slewing of the transient (not shown). The transition time of the input pulses used for Figure 70 and Figure 72 was set deliberately high at 300 ps to demonstrate the fast response time of the amplifier. Signals with longer transition times generate less overshoot. Figure 67. The AD8337 Preamplifier Configured for Inverting Gain Rev. A | Page 21 of 28 AD8337 800 800 80 80 600 60 600 60 400 40 400 40 200 20 –20 INPUT –400 –40 OUTPUT –600 –10 0 10 20 30 40 TIME (ns) 50 60 70 –200 INPUT –400 OUTPUT –80 80 –800 –20 600 60 400 40 200 20 0 0 –200 –400 –20 INPUT –40 OUTPUT CL = 0pF CL = 10pF CL = 22pF WITH 20Ω SNUBBING RESISTOR –600 –800 –20 –10 0 10 20 30 40 TIME (ns) 50 –60 60 70 –80 80 Figure 71. Pulse Response for Two Values of Output Capacitance with ±2.5 V Supplies and a 20 Ω Snubbing Resistor 80 800 60 400 40 0 –200 0 –20 INPUT –400 OUTPUT –40 CL = 0pF CL= 10pF CL = 22pF WITH NO SNUBBING RESISTOR –600 –800 –20 –10 VIN (mV) 20 0 10 20 30 40 TIME (ns) 50 –60 –80 60 70 80 Figure 72. Large Signal Pulse Response for Two Values of Output Capacitance with ±5 V Supplies and No Snubbing Resistor 05575-072 VOUT (mV) 200 0 10 20 30 40 TIME (ns) 50 –80 60 70 80 The best way to avoid the effects of stray capacitance is to exercise care in PC board layout. Locate the passive components or devices connected to the AD8337 output pins, as close as possible to the package. Although a nonissue, the preamplifier output is also sensitive to load capacitance. However, the series connection of Resistor RFB1 and Resistor RFB2 is typically the only load connected to the preamplifier. If overshoot appears, it can be mitigated in the same way as the VGA output, by inserting a snubbing resistor. VS = ±5V 600 –10 –60 The effects of stray output capacitance are mitigated with a small value snubbing resistor, RSNUB, placed in series with and as near as possible to the output pin. Figure 69, Figure 71, and Figure 73 show the improvement in dynamic performance with a 20 Ω snubbing resistor. RSNUB reduces the gain slightly by the ratio of RLOAD ÷ (RSNUB + RLOAD), a very small loss when used with high impedance loads such as A/D converters. For other loads, alternate values of RSNUB can be determined empirically. All of the data for the curves in the Typical Performance Characteristics section of this data sheet were derived using a 20 Ω snubbing resistor. VIN (mV) 80 –40 CL = 0pF CL = 10pF CL = 22pF WITH 20Ω SNUBBING RESISTOR Figure 73. Pulse Response for Two Values of Output Capacitance with ±5 V Supplies and a 20 Ω Snubbing Resistor 05575-071 VOUT (mV) Figure 70. Pulse Response for Two Values of Output Capacitance with ±2.5 V Supplies and No Snubbing Resistor 800 –20 –600 –60 –800 –20 0 0 05575-073 –200 0 VOUT (mV) 0 VIN (mV) 20 CL = 0pF CL = 10pF CL = 22pF NO SNUBBING RESISTOR 05575-070 VOUT (mV) 200 VIN (mV) VS = ±5V GAIN CONTROL CONSIDERATIONS In typical applications, voltages applied to the GAIN input are dc or relatively low frequency signals. The high input impedance of the AD8337 enables several devices to be connected in parallel. This is useful for arrays of VGAs, such as those used for calibration adjustments. Under dc or slowly changing ramp conditions, the gain tracks the gain control voltage as shown in Figure 3. However, it is often necessary to consider other effects influenced by the VGAIN input. Rev. A | Page 22 of 28 AD8337 The offset voltage effect of the AD8337, as with all VGAs, can appear as a complex waveform when observed across the range of VGAIN voltage. Generated by multiple sources, each device has a unique VOS profile while the GAIN input is swept through its voltage range. The offset voltage profile seen in Figure 15 is a typical example. If the VGAIN input voltage is modulated, the output is the product of the VGAIN and the dc profile of the offset voltage, and it can be observed on a scope as a small ac signal as shown in Figure 74. In Figure 74, the signal applied to the VGAIN input is a 1 kHz ramp, and the output voltage signal is slightly less than 4 mV p-p. 10 8 VS = ±2.5V INPUT VSOUTPUT = 2.5 OFFSET VOLATGE (mV) 6 4 2 –2 –4 05575-075 –6 –10 –800 –600 –400 –200 0 200 VGAIN (mV) 400 600 800 Figure 74. Offset Voltage vs. VGAIN for a 1 kHz Ramp The profile of the waveform shown in Figure 74 is consistent over a wide range of signals from dc to about 20 kHz. Above 20 kHz, secondary artifacts can be generated due to the effects of minor internal circuit tolerances as seen in Figure 75. These artifacts are caused by settling and time constants of the interpolator circuit and appear at the output as the voltage spikes seen in Figure 75. 10 8 VS = ±2.5V INPUT VOUTPUT S = 2.5 OFFSET VOLATGE (mV) 6 4 SPIKE 2 0 –2 SPIKE –4 05575-074 –6 –8 –10 –800 –600 –400 –200 0 200 VGAIN (mV) 400 Figure 75. VOS Profile for a 50 kHz Ramp 600 800 THERMAL CONSIDERATIONS The thermal performance of chip scale packages, such as the AD8337, departs significantly from that of leaded devices such as the larger TSSOP or QFSP. In larger packages, heat is conducted away from the die by the path provided by the bond wires and the device leads. In chip scale packages, the heat transfer mechanisms are surface-to-air radiation from the top and side surfaces of the package and conduction through the metal solder pad on the mounting surface of the device. θJC is the traditional thermal metric found in the data sheets of integrated circuits. Heat transfer away from the die is a threedimensional dynamic, and the path is through the bond wires, leads, and the six surfaces of the package. Because of the small size of chip scale packages, the θJC is not measured conventionally. Instead, it is calculated using thermodynamic rules. 0 –8 Under certain circumstances, the product of VGAIN and the offset profile plus spikes is a coherent spurious signal within the signal band of interest and indistinguishable from desired signals. In general, the slower the ramp applied to the GAIN pin, the smaller the spikes are. In most applications, these effects are benign and not an issue. The AD8837’s θJC value listed in Table 2 assumes that the tab is soldered to the board and that there are three additional ground layers beneath the device connected by at least four vias. For a device with an unsoldered pad, the θJC nearly doubles, becoming 138°C/W. PSI (Ψ) Table 2 lists a subset of the classic theta specification, ΨJT (Psi junction to top). θJC is the metric of heat transfer from the die to the case, involving the six outside surfaces of the package. Ψ(XY) is a subset of the theta value and the thermal gradient from the junction (die) to each of the six surfaces. Ψ can be different for each of the surfaces, but since the top of the package is actually a fraction of a millimeter from the die, the surface temperature of the package is very close to the die temperature. The die temperature is calculated as the product of the power dissipation and ΨJT. Since the top surface temperature and power dissipation are easily measured, it follows that the die temperature is easily calculated. For example, for a dissipation of 180 mW and a ΨJT of 5.3°/W, the die temperature is slightly less than 1°C higher than the surface temperature. BOARD LAYOUT Because the AD8337 is a high frequency device, board layout is critical. It is very important to have a good ground plane connection to the VCOM pin. Coupling through the ground plane, from the output to the input, can cause peaking at higher frequencies. Rev. A | Page 23 of 28 AD8337 GND1 GND2 GND3 GND4 VOUT J1 2 3 R4 0Ω 4 VOUT VPOS U1 VCOM GAIN AD8337 INPP VNEG INPN PRAO R2 49.9Ω 8 C3 0.1µF GAIN 7 6 5 CG 1nF R1 49.9Ω C4 0.1µF RFB2 100Ω R5 L1 120nH RPO2 453Ω PRAO 05575-076 RFB1 100Ω 05575-077 Figure 76. Schematic— Evaluation Board—Noninverting Configuration Figure 77. Evaluation Board—Component Side Copper 05575-078 IN L2 120nH 1 RVO3 0Ω C2 10µF + + C1 10µF RVO1 453Ω TP1 –VS +VS Figure 78. Evaluation Board—Wiring Side Copper Rev. A | Page 24 of 28 AD8337 OUTLINE DIMENSIONS 3.00 BSC SQ 0.50 0.40 0.30 0.60 MAX 1 8 PIN 1 INDICATOR 0.90 MAX 0.85 NOM TOP VIEW (BOTTOM VIEW) 5 1.89 1.74 1.59 4 1.60 1.45 1.30 0.05 MAX 0.01 NOM 0.30 0.23 0.18 1.50 REF EXPOSED PAD 0.50 BSC 0.70 MAX 0.65 TYP 12° MAX SEATING PLANE 2.75 BSC SQ PIN 1 INDICATOR 0.20 REF EXPOSED PAD IS NOT CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO THE GROUND PLANE. Figure 79. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 3 mm x 3 mm Body, Very Thin, Dual Lead (CP-8-2) Dimensions shown in millimeters ORDERING GUIDE Model AD8337BCPZ-R2 1 AD8337BCPZ-REEL1 AD8337BCPZ-REEL71 AD8337BCPZ-WP1 AD8337-EVAL AD8337-EVAL-INV AD8337-EVAL-SS 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] Evaluation Board with Noninverting Gain Configuration Evaluation Board with Inverting Gain Configuration Evaluation Board with Single Supply Operation Z = Pb-free part. Rev. A | Page 25 of 28 Package Option CP-8-2 CP-8-2 CP-8-2 CP-8-2 Branding HVB HVB HVB HVB AD8337 NOTES Rev. A | Page 26 of 28 AD8337 NOTES Rev. A | Page 27 of 28 AD8337 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05575-0-6/06(A) Rev. A | Page 28 of 28