IS62C1024AL IS65C1024AL

IS62C1024AL
IS65C1024AL
128K x 8 LOW POWER CMOS
STATIC RAM
FEATURES
• High-speed access time: 35, 45 ns
• Low active power: 100 mW (typical)
• Low standby power: 20 µW (typical) CMOS
standby
• Output Enable (OE) and two Chip Enable
(CE1 and CE2) inputs for ease in applications
• Fully static operation: no clock or refresh required
• TTL compatible inputs and outputs
• Single 5V (±10%) power supply
• Commercial, Industrial, and Automotive temperature ranges available
• Standard Pin Configuration:
— 32-pin SOP/ 32-pin TSOP (Type 1)
• Lead free available
JULY 2008
DESCRIPTION
The ISSI IS62C1024AL/IS65C1024AL is a low power,
131,072-word by 8-bit CMOS static RAM. It is fabricated
using high-performance CMOS technology. This highly
reliable process coupled with innovative circuit design
techniques, yields higher performance and low power
consumption devices.
When CE1 is HIGH or CE2 is LOW (deselected), the device
assumes a standby mode at which the power dissipation
can be reduced by using CMOS input levels.
Easy memory expansion is provided by using two Chip
Enable inputs, CE1 and CE2.The active LOW Write Enable
(WE) controls both writing and reading of the memory.
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
128K x 8
MEMORY ARRAY
VDD
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CE1
CE2
OE
WE
CONTROL
CIRCUIT
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on
any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. H
06/26/08
1
IS62C1024AL
IS65C1024AL
PIN CONFIGURATION
PIN CONFIGURATION
32-Pin SOP
32-Pin TSOP (Type 1)
NC
1
32
VDD
A16
2
31
A15
A14
3
30
CE2
A12
4
29
WE
A7
5
28
A13
A6
6
27
A8
A5
7
26
A9
A4
8
25
A11
A3
9
24
OE
A2
10
23
A10
A1
11
22
CE1
A0
12
21
I/O7
I/O0
13
20
I/O6
I/O1
14
19
I/O5
I/O2
15
18
I/O4
GND
16
17
I/O3
A11
A9
A8
A13
WE
CE2
A15
VDD
NC
A16
A14
A12
A7
A6
A5
A4
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
PIN DESCRIPTIONS
A0-A16 Address Inputs
CE1 Chip Enable 1 Input
CE2 Chip Enable 2 Input
OE Output Enable Input
WE Write Enable Input
I/O0-I/O7Input/Output
Vdd
Power
GND
Ground
OPERATING RANGE (IS62C1024AL)
Range
Ambient Temperature
Commercial 0°C to +70°C
Industrial
-40°C to +85°C
Vdd
5V ± 10%
5V ± 10%
OPERATING RANGE (IS65C1024AL)
Range
Automotive
Ambient Temperature
-40°C to +125°C
Vdd
5V ± 10%
TRUTH TABLE
2
Mode
Not Selected
(Power-down)
Output Disabled
Read
Write
WE
X
X
H
H
L
CE1 H
X
L
L
L
CE2
X
L
H
H
H
OE X
X
H
L
X
I/O OperationVdd Current
High-Z Isb1, Isb2
High-Z
Isb1, Isb2
High-Z
Icc
Dout
Icc
Din
Icc
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. H
06/26/08
IS62C1024AL
IS65C1024AL
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Vterm
Tstg
Pt
Iout
Parameter
Terminal Voltage with Respect to GND
Storage Temperature
Power Dissipation
DC Output Current (LOW)
Value
–0.5 to +7.0
–65 to +125
1.0
20
Unit
V
°C
W
mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
CAPACITANCE(1,2)
Symbol
Cin
Cout
Parameter
Input Capacitance
Output Capacitance
Conditions
Vin = 0V
Vout = 0V
Max.
6
8
Unit
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: Ta = 25°C, f = 1 MHz, Vdd = 5.0V.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol
Voh
Vol
Vih
Vil
Ili
Ilo
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage(1)
Input Leakage
Output Leakage
Test Conditions
Options
Vdd = Min., Ioh = –1.0 mA
Vdd = Min., Iol = 2.1 mA
GND ≤ Vin ≤ Vdd
Com.
Ind.
Auto.
GND ≤ Vout ≤ Vdd
Com.
CE1 = Vih, or
Ind.
CE2 = Vil, or OE = Vih or
Auto.
WE = Vil
Min.
2.4
—
2.2
-0.5
-1
-2
-5
-1
-2
-5
Max.
—
0.4
Vdd + 0.5
0.8
1
2
5
1
2
5
Unit
V
V
V
V
µA
µA
Note:
1. Vil (min.) = -0.3V DC; Vil (min.) = -2.0V AC (pulse width -2.0 ns). Not 100% tested.
Vih (max.) = Vdd + 0.3V DC; Vih (max.) = Vdd + 2.0V AC (pulse width -2.0 ns). Not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. H
06/26/08
3
IS62C1024AL
IS65C1024AL
IS62C1024AL/IS65C1024AL
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
SymbolParameter
Test Conditions
Icc
Average operating
CE1 = Vil, CE2 = Vih
Com.
Current
Vin = Vih or Vil,
Ind.
I I/O= 0 mA, f=0
Auto.
Icc1
Vdd Dynamic Operating Vdd = Max., CE1 = Vil
Com.
Supply Current
Iout = 0 mA, f = fmax
Ind.
Vin = Vih or Vil
Auto.
CE2 = Vih
typ.(2)
Isb1
TTL Standby Current Vdd = Max., Com.
(TTL Inputs)
Vin = Vih or Vil, CE1 ≥ Vih,
Ind.
or CE2 ≤ Vil, f = 0
Auto.
Isb2
CMOS Standby
Vdd = Max., Com.
Current (CMOS Inputs) CE1 ≥ Vdd – 0.2V, or
Ind.
CE2 ≤ 0.2V, Vin ≥ Vdd – 0.2V,Auto.
or Vin ≤ Vss + 0.2V, f = 0
typ.(2)
-35 ns
-45 ns
Min. Max.
Min. Max.
—
25
—
30
— 35
—
30
—
35
— 40
—
20
—
1
—
1.5
—
2
—
5
—
10
— 45
—
4
Unit
mA
mA
mA
µA
Note:
1. At f = fmax, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2. Typical Values are measured at Vdd = 5V, Ta = 25oC and not 100% tested.
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol
trc
taa
toha
tace1
tace2
tdoe
tlzoe(2)
thzoe(2)
tlzce1(2)
tlzce2(2)
thzce(2)
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE1 Access Time
CE2 Access Time
OE Access Time
OE to Low-Z Output
OE to High-Z Output
CE1 to Low-Z Output
CE2 to Low-Z Output
CE1 or CE2 to High-Z Output
-35 ns
Min. Max.
35
—
—
35
3
—
—
35
—
35
—
10
3
—
0
10
3
—
3
—
0
10
-45 ns
Min. Max.
45
—
—
45
3
—
—
45
—
45
—
20
5
—
0
15
5
—
5
—
0
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0.6
to 2.4V and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
4
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. H
06/26/08
IS62C1024AL
IS65C1024AL
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0.6V to 2.4V
5 ns
1.5V
See Figures 1a and 1b
AC TEST LOADS
1838 Ω
1838 Ω
5V
5V
OUTPUT
OUTPUT
100 pF
Including
jig and
scope
993 Ω
5 pF
Including
jig and
scope
Figure 1a.
993 Ω
Figure 1b.
AC WAVEFORMS
READ CYCLE NO. 1(1,2)
tRC
ADDRESS
tAA
tOHA
DOUT
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. H
06/26/08
tOHA
DATA VALID
5
IS62C1024AL
IS65C1024AL
READ CYCLE NO. 2(1,3)
tRC
ADDRESS
tAA
tOHA
OE
tHZOE
tDOE
CE1
tLZOE
tACE1/tACE2
CE2
DOUT
tLZCE1/
tLZCE2
tHZCE
HIGH-Z
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE1 = Vil, CE2 = Vih.
3. Address is valid prior to or coincident with CE1 LOW and CE2 HIGH transitions.
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range, Standard and Low Power)
Symbol
twc
tsce1
tsce2
taw
tha
tsa
tpwe(4)
tsd
thd
thzwe(2)
tlzwe(2)
Parameter
Write Cycle Time
CE1 to Write End
CE2 to Write End
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
-35 ns
Min. Max.
35
—
25
—
25
—
25
—
0
—
0
—
25
—
20
—
0
—
—
10
3
—
-45 ns
Min. Max.
45
—
35
—
35
—
35
—
0
—
0
—
35
—
25
—
0
—
—
15
5
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
­ns
ns
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0.6 to 2.4V
and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the Write.
4. Tested with OE HIGH.
6
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. H
06/26/08
IS62C1024AL
IS65C1024AL
AC WAVEFORMS
WRITE CYCLE NO. 1 (WE Controlled)(1,2)
tWC
ADDRESS
tHA
tSCE1
CE1
tSCE2
CE2
tAW
tPWE(4)
WE
tSA
DOUT
tHZWE
tLZWE
HIGH-Z
DATA UNDEFINED
tSD
DIN
tHD
DATA-IN VALID
WRITE CYCLE NO. 2 (CE1, CE2 Controlled)(1,2)
tWC
ADDRESS
tSA
tHA
tSCE1
CE1
tSCE2
CE2
tAW
tPWE(4)
WE
tHZWE
DOUT
DATA UNDEFINED
tLZWE
HIGH-Z
tSD
DIN
tHD
DATA-IN VALID
Notes:
1. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the Write.
2. I/O will assume the High-Z state if OE = Vih.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. H
06/26/08
7
IS62C1024AL
IS65C1024AL
DATA RETENTION SWITCHING CHARACTERISTICS
Symbol
Vdr
Idr
tsdr
trdr
Parameter
Vdd for Data Retention
Data Retention Current
Data Retention Setup Time
Recovery Time
Test Condition
See Data Retention Waveform
Vdd = 2.0V, CE1 ≥ Vdd – 0.2V
or CE2 ≤ 0.2V
Vin ≥ Vdd – 0.2V, or Vin ≤ Vss + 0.2V
See Data Retention Waveform
See Data Retention Waveform
Com.
Ind.
Auto.
Min.
2.0
—
—
—
0
trc
Typ.
—
—
—
Max. Unit
5.5
V
5
µA
10
45
—
ns
—
ns
Note:
1. Typical Values are measured at Vdd = 5V, Ta = 25oC and not 100% tested.
DATA RETENTION WAVEFORM (CE1 Controlled)
Data Retention Mode
tSDR
tRDR
VDD
4.5V
2.2V
VDR
CE1 ≥ VDD - 0.2V
CE1
GND
DATA RETENTION WAVEFORM (CE2 Controlled)
Data Retention Mode
4.5V
VDD
CE2
2.2V
tSDR
tRDR
VDR
0.4V
CE2 ≤ 0.2V
GND
8
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. H
06/26/08
IS62C1024AL
IS65C1024AL
ORDERING INFORMATION: IS62C1024AL
Commercial Range: 0°C to +70°C
Speed (ns)
35
35
Order Part No.
IS62C1024AL-35Q
IS62C1024AL-35T
Package
Plastic SOP
TSOP, Type 1
Industrial Range: –40°C to +85°C
peed (ns)
S
35
35
35
35
Order Part No.
IS62C1024AL-35QI
IS62C1024AL-35QLI
IS62C1024AL-35TI
IS62C1024AL-35TLI
Package
Plastic SOP Plastic SOP, Lead-free
TSOP, Type 1 TSOP, Type 1, Lead-free
ORDERING INFORMATION: IS65C1024AL
Automotive Range: -40°C to +125°C
peed (ns)
S
45
45
45
45
Order Part No.
Package
IS65C1024AL-45QA3 Plastic SOP IS65C1024AL-45QLA3 Plastic SOP, Lead-free
IS65C1024AL-45TA3 TSOP, Type 1 IS65C1024AL-45TLA3 TSOP, Type 1, Lead-free
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. H
06/26/08
9
IS62C1024AL
IS65C1024AL
10
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. H
06/26/08
IS62C1024AL
IS65C1024AL
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. H
06/26/08
11