LMA1010/2010 LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator 16 x 16-bit Multiplier-Accumulator DEVICES INCORPORATED DESCRIPTION FEATURES 20 ns Multiply-Accumulate Time Replaces Fairchild TMC2210, Cypress CY7C510, IDT 7210L, and AMD Am29510 Two’s Complement or Unsigned Operands Accumulator Performs Preload, Accumulate, and Subtract Three-State Outputs 68-pin PLCC, J-Lead LMA1010/2010 BLOCK DIAGRAM CLK A CLK B RND, TC, ACC, and SUB controls are latched on the rising edge of the logical OR of CLK A and CLK B. TC specifies the input as two’s complement (TC HIGH) or unsigned magnitude (TC LOW). RND, when HIGH, adds ‘1’ to the most significant bit position of the least significant half of the product. Subsequent truncation of the 16 least The LMA1010 and LMA2010 produce significant bits produces a result corthe 32-bit product of two 16-bit num- rectly rounded to 16-bit precision. bers. The results of a series of multiplications may be accumulated to form ACC and SUB control accumulator the sum of products. Accumulation operation. ACC HIGH results in addiis performed to 35-bit precision with tion of the multiplier product and the the multiplier product sign extended accumulator contents, with the result as appropriate. stored in the accumulator register on the rising edge of CLK R. ACC and Data present at the A and B input SUB HIGH results in subtraction of registers is latched on the rising edges the accumulator contents from the of CLK A and CLK B respectively. multiplier product, with the result stored in the accumulator register. With ACC LOW and SUB LOW, no B 15-0 A 15-0 R 15-0 accumulation occurs and the next 16 16 product is loaded directly into the accumulator register. ACC LOW and A REGISTER B REGISTER SUB HIGH is undefined. REGISTER RND The LMA1010 and LMA2010 are high-speed, low power 16-bit multiplier-accumulators. The LMA1010 and LMA2010 are functionally identical; they differ only in packaging. Full military ambient temperature range operation is achieved with advanced CMOS technology. TC ACC SUB 32 R R + A OEX OEM OEL PREL PRELOAD CONTROL LOGIC 3 3 OEX OEM OEL LEX 35 A R A PASS R LEX LEM LEL LEM 3 CLK R The LMA1010/2010 output register (accumulator register) is divided into three independently controlled sections. The least significant result (LSR) and most significant result (MSR) registers are 16 bits in length. The extended result register (XTR) is 3 bits long. The output signals R15-0 and input signals B15-0 share the same bidirectional pins. 35 LEL 16 16 ACCUMULATOR REGISTER OEX 3 R 34-32 OEM OEL 16 16 R 31-16 Each output register has an independent output enable control. In addition to providing three-state control of the output buffers, when OEX, OEM, or OEL are HIGH and PREL is HIGH, data can be preloaded via the bidirectional output pins into the respective output registers. Data present on the output pins is latched on the rising edge of CLK R. The interrelation of PREL and the enable controls is summarized in Table 1. Multiplier-Accumulators 1 09/18/2000–LDS.10/2010-Q LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator TABLE 1. PRELOAD TRUTH TABLE PREL OEX OEM OEL XTR MSR LSR L L L L OUT OUT OUT L L L H OUT OUT Z L L H L OUT Z OUT L L H H OUT Z Z L H L L Z OUT OUT L H L H Z OUT Z L H H L Z Z OUT L H H H Z Z Z H L L L Z Z Z H L L H Z Z PREL H L H L Z PREL Z H L H H Z PREL PREL H H L L PREL Z Z H H L H PREL Z PREL H H H L PREL PREL H H H H PREL PREL PREL PREL = Preload data to appropriate register OUT = Register available on output pins Z = High impedance state FIGURE 1A. INPUT FORMATS BIN AIN Fractional Two s Complement (TC = 1) 15 14 13 20 2 1 2 2 (Sign) 2 1 0 2 13 2 14 2 15 15 14 13 20 2 1 2 2 (Sign) 2 1 0 2 13 2 14 2 15 Integer Two s Complement (TC = 1) 15 14 13 215 214 213 (Sign) 2 1 0 22 21 20 15 14 13 215 214 213 2 1 0 22 21 20 (Sign) Unsigned Fractional (TC = 0) 15 14 13 21 22 23 2 1 0 2 14 2 15 2 16 Z 15 14 13 21 22 23 2 1 0 2 14 2 15 2 16 Unsigned Integer (TC = 0) 15 14 13 215 214 213 2 1 0 22 21 20 15 14 13 215 214 213 2 1 0 22 21 20 FIGURE 1B. OUTPUT FORMATS XTR MSR LSR Fractional Two s Complement 34 33 32 24 23 22 (Sign) 31 30 29 21 20 2 1 18 17 16 2 12 2 13 2 14 15 14 13 2 15 2 16 2 17 2 1 0 2 28 2 29 2 30 15 14 13 215 214 213 2 1 0 22 21 20 15 14 13 2 17 2 18 2 19 2 1 0 2 30 2 31 2 32 15 14 13 215 214 213 2 1 0 22 21 20 Integer Two s Complement 34 33 32 234 233 232 (Sign) 31 30 29 231 230 229 18 17 16 218 217 216 Unsigned Fractional 34 33 32 22 21 20 31 30 29 21 22 23 18 17 16 2 14 2 15 2 16 Unsigned Integer 34 33 32 234 233 232 31 30 29 231 230 229 18 17 16 218 217 216 Multiplier-Accumulators 2 09/18/2000–LDS.10/2010-Q LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator MAXIMUM RATINGS Above which useful life may be impaired (Notes 1, 2, 3, 8) Storage temperature ............................................................................................................ –65°C to +150°C Operating ambient temperature ........................................................................................... –55°C to +125°C VCC supply voltage with respect to ground ............................................................................ –0.5 V to +7.0 V Input signal with respect to ground ........................................................................................ –3.0 V to +7.0 V Signal applied to high impedance output ............................................................................... –3.0 V to +7.0 V Output current into low outputs ............................................................................................................ 25 mA Latchup current ............................................................................................................................... > 400 mA OPERATING CONDITIONS To meet specified electrical and switching characteristics Mode Temperature Range (Ambient) Active Operation, Commercial Supply Voltage 0°C to +70°C 4.75 V ≤ VCC ≤ 5.25 V Active Operation, Industrial –40°C to +85°C 4.75 V ≤ VCC ≤ 5.25 V Active Operation, Military –55°C to +125°C 4.50 V ≤ VCC ≤ 5.50 V ELECTRICAL CHARACTERISTICS Over Operating Conditions (Note 4) Symbol Parameter Test Condition Min VOH Output High Voltage VCC = Min., IOH = –2.0 mA 2.4 VOL Output Low Voltage VCC = Min., IOL = 8.0 mA VIH Input High Voltage VIL Input Low Voltage (Note 3) IIX Input Current IOZ Typ Max Unit V 0.5 V 2.0 VCC V 0.0 0.8 V Ground ≤ VIN ≤ VCC (Note 12) ±20 µA Output Leakage Current Ground ≤ VOUT ≤ VCC (Note 12) ±20 µA ICC1 VCC Current, Dynamic (Notes 5, 6) 25 mA ICC2 VCC Current, Quiescent (Note 7) 1.0 mA 12 Multiplier-Accumulators 3 09/18/2000–LDS.10/2010-Q LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator SWITCHING CHARACTERISTICS COMMERCIAL AND INDUSTRIAL OPERATING RANGE (0°C to +70°C) or (-40°C to +85°C) Notes 9, 10 (ns) 65* Symbol Parameter LMA1010/2010– 45* 35* 55* 20* 25 Min Max Min Max Min Max Min Max Min Max Min Max tMC Clocked Multiply Time tPW Clock Pulse Width 15 65 15 55 15 45 10 35 10 25 9 20 tS Input Register Setup Time 15 15 12 12 12 10 tH Input Register Hold Time 2 2 2 2 2 2 tSP Preload Setup Time 15 15 12 12 12 10 tHP Preload Hold Time 2 2 2 2 2 2 tD Output Delay 30 25 25 25 20 18 tENA Three-State Output Enable Delay (Note 11) 30 30 25 25 20 18 tDIS Three-State Output Disable Delay (Note 11) 30 25 25 25 20 18 MILITARY OPERATING RANGE (–55°C to +125°C) Notes 9, 10 (ns) 75* Symbol Parameter LMA1010/2010– 55* 40* 65* 30* 25* Min Max Min Max Min Max Min Max Min Max Min Max tMC Clocked Multiply Time 75 65 55 40 30 25 tPW Clock Pulse Width 20 15 15 15 10 10 tS Input Register Setup Time 20 15 15 15 12 12 tH Input Register Hold Time 2 2 2 2 2 2 tSP Preload Setup Time 20 15 15 15 12 12 tHP Preload Hold Time 2 tD Output Delay 35 30 30 25 20 20 tENA Three-State Output Enable Delay (Note 11) 35 30 30 25 20 20 tDIS Three-State Output Disable Delay (Note 11) 35 25 25 25 20 20 2 2 2 2 2 SWITCHING WAVEFORMS tS A15-0 B15-0 tH tPW CLK A CLK B tPW tMC CLK R tD tPW PREL OE* tSP R34-0 tHP tDIS HIGH IMPEDANCE PRELOAD tENA OUTPUT *includes OEX, OEM, OEL *DISCONTINUED SPEED GRADE Multiplier-Accumulators 4 09/18/2000–LDS.10/2010-Q LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator NOTES 1. Maximum Ratings indicate stress specifications only. Functional operation of these products at values beyond those indicated in the Operating Conditions table is not implied. Exposure to maximum rating conditions for extended periods may affect reliability. 2. The products described by this specification include internal circuitry designed to protect the chip from damaging substrate injection currents and accumulations of static charge. Nevertheless, conventional precautions should be observed during storage, handling, and use of these circuits in order to avoid exposure to excessive electrical stress values. 3. This device provides hard clamping of transient undershoot and overshoot. Input levels below ground or above VCC will be clamped beginning at –0.6 V and VCC + 0.6 V. The device can withstand indefinite operation with inputs in the range of –0.5 V to +7.0 V. Device operation will not be adversely affected, however, input current levels will be well in excess of 100 mA. 4. Actual test conditions may vary from those designated but operation is guaranteed as specified. but not 100% tested. is specified as a maximum since worstcase operation of any device always 9. AC specifications are tested with provides data within that time. input transition times less than 3 ns, output reference levels of 1.5 V (except 11. For the tENA test, the transition is tDIS test), and input levels of nominally measured to the 1.5 V crossing point 0 to 3.0 V. Output loading may be a with datasheet loads. For the resistive divider which provides for tDIS test, the transition is measured specified IOH and IOL at an output to the ±200mV level from the meavoltage of VOH min and VOL max sured steady-state output voltage with respectively. Alternatively, a diode ±10mA loads. The balancing voltage, bridge with upper and lower current VTH, is set at 3.5 V for Z-to-0 and 0-to-Z sources of IOH and IOL respectively, tests, and set at 0 V for Z-to-1 and and a balancing voltage of 1.5 V may 1-to-Z tests. be used. Parasitic capacitance is 30 pF 12. These parameters are only tested at minimum, and may be distributed. the high temperature extreme, which is This device has high-speed outputs the worst case for leakage current. capable of large instantaneous current pulses and fast turn-on/turn-off times. As a result, care must be exercised in FIGURE A. OUTPUT LOADING CKT. the testing of this device. The following measures are recommended: a. A 0.1 µF ceramic capacitor should be installed between VCC and Ground leads as close to the Device Under Test (DUT) as possible. Similar capacitors should be installed between device VCC and the tester common, and device ground and tester common. b. Ground and VCC supply planes must be brought directly to the DUT socket or contactor fingers. 5. Supply current for a given application can be accurately approximated c. Input voltages should be adjusted to compensate for inductive ground by: NCV2 F and VCC noise to maintain required DUT input levels relative to the DUT 4 ground pin. where 10. Each parameter is shown as a N = total number of device outputs minimum or maximum value. Input C = capacitive load per output requirements are specified from the V = supply voltage point of view of the external system F = clock frequency driving the chip. Setup time, for example, is specified as a minimum 6. Tested with all outputs changing since the external system must supply every cycle and no load, at a 5 MHz at least that much time to meet the clock rate. worst-case requirements of all parts. 7. Tested with all inputs within 0.1 V of Responses from the internal circuitry are specified from the point of view of VCC or Ground, no load. the device. Output delay, for example, 8. These parameters are guaranteed S1 DUT IOL VTH CL IOH FIGURE B. THRESHOLD LEVELS tENA OE Z Z 0 1 tDIS 1.5 V 1.5 V 1.5 V 1.5 V 3.5V Vth VOL* 0.2 V VOH* 0.2 V 0 Z 1 Z 0V Vth VOL* Measured VOL with IOH = –10mA and IOL = 10mA VOH* Measured VOH with IOH = –10mA and IOL = 10mA Multiplier-Accumulators 5 09/18/2000–LDS.10/2010-Q LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator LMA1010 — ORDERING INFORMATION 64-pin 68-pin A6 A5 A4 A3 A2 A1 A0 B0, R0 B1, R1 B2, R2 B3, R3 B4, R4 B5, R5 B6, R6 B7, R7 GND B8, R8 B9, R9 B10, R10 B11, R11 B12, R12 B13, R13 B14, R14 B15, R15 R16 R17 R18 R19 R20 R21 R22 R23 Speed 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 A7 A8 A9 A10 A11 A12 A13 A14 A15 OEL RND SUB ACC CLK A CLK B VCC TC OEX PREL OEM CLK R R34 R33 R32 R31 R30 R29 R28 R27 R26 R25 R24 1 2 3 4 5 6 7 8 9 10 NC B/R0 A1 A3 A5 A7 A9 A11 A13 A0 A2 A4 A6 A8 A10 A12 A14 NC OEL A15 11 A B B/R2 B/R1 C B/R4 B/R3 D SUB RND B/R6 B/R5 E Top View GND B/R7 CLK A ACC Through Package F B/R9 B/R8 VCC CLK B (i.e., Component Side Pinout) G H J K L OEX B/R13 B/R12 OEM PREL B/R15 B/R14 R34 CLK R NC R16 R18 R20 R22 R24 R26 R28 R30 R32 R17 R19 R21 R23 R25 R27 R29 R31 NC Discontinued Package Discontinued Package Sidebraze Hermetic DIP (D6) Ceramic Pin Grid Array (G2) 0°C to +70°C — COMMERCIAL SCREENING TC B/R11 B/R10 R33 –55°C to +125°C — COMMERCIAL SCREENING –55°C to +125°C — MIL-STD-883 COMPLIANT Multiplier-Accumulators 6 09/18/2000–LDS.10/2010-Q LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator LMA2010 — ORDERING INFORMATION A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 B0, R0 B1, R1 68-pin 10 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 60 11 59 12 58 13 57 14 56 15 55 16 54 17 Top View 18 19 53 52 51 20 50 21 49 22 48 23 47 24 46 25 45 26 44 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 B2, R2 B3, R3 B4, R4 B5, R5 B6, R6 B7, R7 GND GND B8, R8 B9, R9 B10, R10 B11, R11 B12, R12 B13, R13 B14, R14 B15, R15 R16 R33 R32 R31 R30 R29 R28 R27 R26 R25 R24 R23 R22 R21 R20 R19 R18 R17 A15 OEL RND SUB ACC CLK A CLK B VCC VCC VCC VCC TC OEX PREL OEM CLK R R34 Speed Plastic J-Lead Chip Carrier (J2) 0°C to +70°C — COMMERCIAL SCREENING 35 ns 25 ns LMA2010JC35 LMA2010JC25 –40°C to +85°C — INDUSTRIAL SCREENING 25 ns LMA2010JI25 –55°C to +125°C — MIL-STD-883 COMPLIANT Multiplier-Accumulators 7 09/18/2000–LDS.10/2010-Q