LOGIC LMA2010JC35

LMA1010/2010
LMA1010/2010
DEVICES INCORPORATED
16 x 16-bit Multiplier-Accumulator
16 x 16-bit Multiplier-Accumulator
DEVICES INCORPORATED
FEATURES
DESCRIPTION
❑ 20 ns Multiply-Accumulate Time
❑ Replaces Fairchild TMC2210,
Cypress CY7C510, IDT 7210L,
and AMD Am29510
❑ Two’s Complement or Unsigned
Operands
❑ Accumulator Performs Preload,
Accumulate, and Subtract
❑ Three-State Outputs
❑ 68-pin PLCC, J-Lead
LMA1010/2010 BLOCK DIAGRAM
CLK A
CLK B
REGISTER
RND
TC, ACC, and SUB controls are latched
on the rising edge of the logical OR of
CLK A and CLK B. TC specifies the
input as two’s complement
(TC HIGH) or unsigned magnitude
(TC LOW). RND, when HIGH, adds ‘1’
to the most significant bit position of
the least significant half of the product.
Subsequent truncation of the 16 least
The LMA1010 and LMA2010 produce
significant bits produces a result
the 32-bit product of two 16-bit numbers.
correctly rounded to 16-bit preciThe results of a series of multiplications
sion.
may be accumulated to form the sum of
products. Accumulation is performed to ACC and SUB control accumulator
35-bit precision with the multiplier prod- operation. ACC HIGH results in
addition of the multiplier product and
uct sign extended as appropriate.
the accumulator contents, with the result
Data present at the A and B input regis- stored in the accumulator register on the
ters is latched on the rising edges of rising edge of CLK R. ACC and SUB
CLK A and CLK B respectively. RND, HIGH results in subtraction of the
accumulator contents from the
multiplier product, with the result stored
B 15-0
in the accumulator register. With ACC
A 15-0
R 15-0
16
LOW and SUB LOW, no accumulation
16
occurs and the next product is loaded
A REGISTER
B REGISTER
directly into the accumulator register.
ACC LOW and SUB HIGH is undefined.
The LMA1010 and LMA2010 are
high-speed, low power 16-bit
multiplier-accumulators. The LMA1010
and LMA2010 are functionally identical;
they differ only in packaging. Full military ambient temperature range operation is achieved with advanced CMOS
technology.
TC
ACC
SUB
32
R
R + A
OEX
OEM
OEL
PRELOAD
CONTROL
LOGIC
The LMA1010/2010 output register
(accumulator register) is divided into
three independently controlled sections. The least significant result
(LSR) and most significant result
(MSR) registers are 16 bits in length.
The extended result register (XTR) is
3 bits long. The output signals R15-0
and input signals B15-0 share the same
bidirectional pins.
3
A
R – A
PASS R
LEX
LEM
LEL
35
PREL
3
OEX
OEM
OEL
LEX
35
LEM
3
LEL
16
16
ACCUMULATOR REGISTER
CLK R
OEX
3
R 34-32
OEM
OEL
16
16
Each output register has an independent output enable control. In addition
to providing three-state control of the
output buffers, when OEX, OEM, or OEL
are HIGH and PREL is HIGH, data can be
preloaded via the bidirectional output
pins into the respective output registers.
Data present on the output pins is
latched on the rising edge of CLK R. The
interrelation of PREL and the enable
controls is summarized in Table 1.
R 31-16
Multiplier-Accumulators
1
08/16/2000–LDS.10/2010-P
LMA1010/2010
DEVICES INCORPORATED
16 x 16-bit Multiplier-Accumulator
TABLE 1. PRELOAD TRUTH TABLE
PREL OEX
OEM
OEL
XTR
MSR LSR
L
L
L
L
OUT
OUT OUT
L
L
L
H
OUT
OUT
Z
L
L
H
L
OUT
Z
OUT
L
L
H
H
OUT
Z
Z
L
H
L
L
Z
OUT OUT
L
H
L
H
Z
OUT
Z
L
H
H
L
Z
Z
OUT
L
H
H
H
Z
Z
Z
H
L
L
L
Z
Z
Z
H
L
L
H
Z
Z
PREL
H
L
H
L
Z
PREL
Z
H
L
H
H
Z
PREL PREL
H
H
L
L
PREL
Z
Z
H
H
L
H
PREL
Z
PREL
H
H
H
L
PREL PREL
H
H
H
H
PREL PREL PREL
INPUT FORMATS
AIN
BIN
Fractional Two’s Complement (TC = 1)
15 14 13
–20 2–1 2–2
2 1 0
2–13 2–14 2–15
15 14 13
–20 2–1 2–2
2 1 0
2–13 2–14 2–15
(Sign)
(Sign)
Integer Two’s Complement (TC = 1)
15 14 13
–215 214 213
2 1 0
22 21 20
15 14 13
–215 214 213
2 1 0
22 21 20
(Sign)
(Sign)
Unsigned Fractional (TC = 0)
15 14 13
2–1 2–2 2–3
2 1 0
2–14 2–15 2–16
Z
PREL = Preload data to appropriate register
OUT = Register available on output pins
Z
= High impedance state
FIGURE 1B.
FIGURE 1A.
15 14 13
2–1 2–2 2–3
2 1 0
2–14 2–15 2–16
Unsigned Integer (TC = 0)
15 14 13
215 214 213
2 1 0
22 21 20
15 14 13
215 214 213
2 1 0
22 21 20
OUTPUT FORMATS
MSR
XTR
LSR
Fractional Two’s Complement
34 33 32
–24 23 22
31 30 29
21 20 2–1
18 17 16
2–12 2–13 2–14
15 14 13
2–15 2–16 2–17
2 1 0
2–28 2–29 2–30
15 14 13
215 214 213
2 1 0
22 21 20
15 14 13
2–17 2–18 2–19
2 1 0
2–30 2–31 2–32
15 14 13
215 214 213
2 1 0
22 21 20
(Sign)
Integer Two’s Complement
34 33 32
–234 233 232
31 30 29
231 230 229
18 17 16
218 217 216
(Sign)
Unsigned Fractional
34 33 32
22 21 20
31 30 29
2–1 2–2 2–3
18 17 16
2–14 2–15 2–16
Unsigned Integer
34 33 32
234 233 232
31 30 29
231 230 229
18 17 16
218 217 216
Multiplier-Accumulators
2
08/16/2000–LDS.10/2010-P
LMA1010/2010
DEVICES INCORPORATED
16 x 16-bit Multiplier-Accumulator
MAXIMUM RATINGS Above which useful life may be impaired (Notes 1, 2, 3, 8)
Storage temperature ........................................................................................................... –65°C to +150°C
Operating ambient temperature ........................................................................................... –55°C to +125°C
VCC supply voltage with respect to ground ............................................................................ –0.5 V to +7.0 V
Input signal with respect to ground ........................................................................................ –3.0 V to +7.0 V
Signal applied to high impedance output ............................................................................... –3.0 V to +7.0 V
Output current into low outputs ............................................................................................................. 25 mA
Latchup current ............................................................................................................................... > 400 mA
OPERATING CONDITIONS To meet specified electrical and switching characteristics
Mode
Temperature Range (Ambient)
Active Operation, Commercial
Active Operation, Military
Supply Voltage
0°C to +70°C
4.75 V ≤ VCC ≤ 5.25 V
–55°C to +125°C
4.50 V ≤ VCC ≤ 5.50 V
ELECTRICAL CHARACTERISTICS Over Operating Conditions (Note 4)
Symbol
Parameter
Test Condition
Min
VOH
Output High Voltage
VCC = Min., IOH = –2.0 mA
2.4
VOL
Output Low Voltage
VCC = Min., IOL = 8.0 mA
VIH
Input High Voltage
VIL
Input Low Voltage
(Note 3)
IIX
Input Current
IOZ
Typ
Max
Unit
V
0.5
V
2.0
VCC
V
0.0
0.8
V
Ground ≤ VIN ≤ VCC (Note 12)
±20
µA
Output Leakage Current
Ground ≤ VOUT ≤ VCC (Note 12)
±20
µA
ICC1
VCC Current, Dynamic
(Notes 5, 6)
25
mA
ICC2
VCC Current, Quiescent
(Note 7)
1.0
mA
12
Multiplier-Accumulators
3
08/16/2000–LDS.10/2010-P
LMA1010/2010
DEVICES INCORPORATED
16 x 16-bit Multiplier-Accumulator
SWITCHING CHARACTERISTICS
COMMERCIAL OPERATING RANGE (0°C to +70°C) Notes 9, 10 (ns)
Symbol
Parameter
tMC
Clocked Multiply Time
tPW
Clock Pulse Width
tS
Input Register Setup Time
tH
Input Register Hold Time
tSP
Preload Setup Time
tHP
Preload Hold Time
tD
Output Delay
tENA
Three-State Output Enable Delay (Note 11)
tDIS
Three-State Output Disable Delay (Note 11)
LMA1010/2010–
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*
*
65
55
45*
35*
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Min Max Min Max Min Max 1234567890
Min Max
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65
55
45 1234567890
35
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15
15
15
10
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15
15
12
12
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2
2
2
2
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15
15
12
12
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2
2
2
2
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30
25
25 1234567890
25
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30
30
25 1234567890
25
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30
25
25 1234567890
25
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20*
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Min Max12345678901
Min Max
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25 12345678901
20
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10
9
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12
10
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2
2
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12
10
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2
2
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20 12345678901
18
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18
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18
25
MILITARY OPERATING RANGE (–55°C to +125°C) Notes 9, 10 (ns)
Symbol
Parameter
tMC
Clocked Multiply Time
tPW
Clock Pulse Width
tS
Input Register Setup Time
tH
Input Register Hold Time
tSP
Preload Setup Time
tHP
Preload Hold Time
tD
Output Delay
tENA
Three-State Output Enable Delay (Note 11)
tDIS
Three-State Output Disable Delay (Note 11)
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LMA1010/2010–
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*
*
75
65
55*
40*
30*
25*
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Min Max Min Max Min Max Min Max Min Max Min Max
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75
65
55
40
30
25
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20
15
15
15
10
10
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20
15
15
15
12
12
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2
2
2
2
2
2
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20
15
15
15
12
12
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2
2
2
2
2
2
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35
30
30
25
20
20
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35
30
30
25
20
20
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35
25
25
25
20
20
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SWITCHING WAVEFORMS
tS
A15-0
B15-0
tH
tPW
CLK A
CLK B
tPW
tMC
CLK R
tD
tPW
PREL
OE*
tSP
R34-0
tHP
tDIS
tENA
HIGH IMPEDANCE
PRELOAD
OUTPUT
*includes OEX, OEM, OEL
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*DISCONTINUED SPEED GRADE
Multiplier-Accumulators
4
08/16/2000–LDS.10/2010-P
LMA1010/2010
DEVICES INCORPORATED
16 x 16-bit Multiplier-Accumulator
NOTES
1. Maximum Ratings indicate stress
specifications only. Functional operation of these products at values beyond
those indicated in the Operating Conditions table is not implied. Exposure to
maximum rating conditions for extended periods may affect reliability.
9. AC specifications are tested with
input transition times less than 3 ns,
output reference levels of 1.5 V (except
tDIS test), and input levels of nominally
0 to 3.0 V. Output loading may be a
resistive divider which provides for
specified IOH and IOL at an output
voltage of VOH min and VOL max
2. The products described by this spec- respectively. Alternatively, a diode
ification include internal circuitry de- bridge with upper and lower current
signed to protect the chip from damagsources of I OH and I OL respectively,
ing substrate injection currents and ac- and a balancing voltage of 1.5 V may be
cumulations of static charge. Neverthe- used. Parasitic capacitance is 30 pF
less, conventional precautions should minimum, and may be distributed.
be observed during storage, handling,
and use of these circuits in order to This device has high-speed outputs caavoid exposure to excessive electrical pable of large instantaneous current
stress values.
pulses and fast turn-on/turn-off times.
As a result, care must be exercised in the
3. This device provides hard clamping of testing of this device. The following
transient undershoot and overshoot. In- measures are recommended:
put levels below ground or above VCC
will be clamped beginning at –0.6 V and a. A 0.1 µF ceramic capacitor should be
VCC + 0.6 V. The device can withstand installed between VCC and Ground
indefinite operation with inputs in the leads as close to the Device Under Test
range of –0.5 V to +7.0 V. Device opera- (DUT) as possible. Similar capacitors
tion will not be adversely affected, how- should be installed between device VCC
ever, input current levels will be well in and the tester common, and device
ground and tester common.
excess of 100 mA.
4. Actual test conditions may vary from b. Ground and VCC supply planes
those designated but operation is guar- must be brought directly to the DUT
anteed as specified.
socket or contactor fingers.
5. Supply current for a given applica- c. Input voltages should be adjusted to
tion can be accurately approximated by: compensate for inductive ground and VCC
noise to maintain required DUT input
NCV2 F
levels relative to the DUT ground pin.
where
4
10. Each parameter is shown as a min-
11. For the tENA test, the transition is
measured to the 1.5 V crossing point
with datasheet loads. For the tDIS test,
the transition is measured to the
±200mV level from the measured
steady-state output voltage with
±10mA loads. The balancing voltage, V TH , is set at 3.5 V for Z-to-0
and 0-to-Z tests, and set at 0 V for Zto-1 and 1-to-Z tests.
12. These parameters are only tested at
the high temperature extreme, which is
the worst case for leakage current.
FIGURE A. OUTPUT LOADING CIRCUIT
S1
DUT
IOL
VTH
CL
IOH
FIGURE B. THRESHOLD LEVELS
tENA
OE
Z
tDIS
1.5 V
1.5 V
3.5V Vth
0
1.5 V
1.5 V
Z
1
VOL*
0.2 V
VOH*
0.2 V
0
Z
1
Z
0V Vth
VOL* Measured VOL with IOH = –10mA and IOL = 10mA
VOH* Measured VOH with IOH = –10mA and IOL = 10mA
imum or maximum value. Input requirements are specified from the point
of view of the external system driving
the chip. Setup time, for example, is
specified as a minimum since the exter6. Tested with all outputs changing ev- nal system must supply at least that
ery cycle and no load, at a 5 MHz clock much time to meet the worst-case requirements of all parts. Responses from
rate.
the internal circuitry are specified from
7. Tested with all inputs within 0.1 V of the point of view of the device. Output
VCC or Ground, no load.
delay, for example, is specified as a
8. These parameters are guaranteed maximum since worst-case operation of
any device always provides data within
but not 100% tested.
that time.
N = total number of device outputs
C = capacitive load per output
V = supply voltage
F = clock frequency
Multiplier-Accumulators
5
08/16/2000–LDS.10/2010-P
LMA1010/2010
DEVICES INCORPORATED
16 x 16-bit Multiplier-Accumulator
LMA1010 — ORDERING INFORMATION
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64-pin
68-pin
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64
A6
1
A7
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63
2
A5
A8
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1
2
3
4
5
6
7
8
9
10
11
62
3
A4
A9
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61
4
A3
A10
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60
5
A2
A11
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A
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59
6
A1
A12
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NC B/R0 A1
A3
A5
A7
A9
A11 A13
58
7
A0
A13
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B
57
8
B0, R0
A14
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56
9
B1, R1
A15
B/R2 B/R1 A0
A2
A4
A6
A8
A10 A12 A14 NC
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55
10
B2, R2
OEL
C
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54
11
RND
B3, R3
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OEL A15
B/R4 B/R3
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53
12
SUB
B4, R4
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D
52
13
ACC
B
5
,
R
5
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B/R6 B/R5
SUB RND
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51
14
CLK A
B6, R6
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E
50
15
CLK B
B7, R7
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Top
View
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GND B/R7
CLK A ACC
49
16
VCC
GND
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Through Package
48
17
B8, R8
TC
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F
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47
18
OEX
B9, R9
VCC CLK B
B/R9 B/R8
(i.e., Component Side Pinout)
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46
19
PREL
B10, R10
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G
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45
20
OEM
B11, R11
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B/R11 B/R10
OEX TC
44
21
CLK R
B12, R12
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H
43
22
R34
B13, R13
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B/R13 B/R12
OEM PREL
42
23
B14, R14
R33
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41
24
B15, R15
R32
J
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40
25
R16
R31
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B/R15 B/R14
R34 CLK R
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
39
26
R17
R30
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
K
38
27
R18
R29
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
NC R16 R18 R20 R22 R24 R26 R28 R30 R32 R33
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
37
28
R19
R28
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
L
36
29
R20
R27
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
R17 R19 R21 R23 R25 R27 R29 R31 NC
35
30
R21
R26
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
34
31
R22
R25
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
33
32
R23
R24
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
Discontinued Package
Discontinued Package
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012
Speed
Sidebraze Hermetic DIP
(D6)
Ceramic Pin Grid Array
(G2)
0°C to +70°C — COMMERCIAL SCREENING
–55°C to +125°C — COMMERCIAL SCREENING
–55°C to +125°C — MIL-STD-883 COMPLIANT
Multiplier-Accumulators
6
08/16/2000–LDS.10/2010-P
LMA1010/2010
DEVICES INCORPORATED
16 x 16-bit Multiplier-Accumulator
LMA2010 — ORDERING INFORMATION
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
B0, R0
B1, R1
68-pin
10
9
8
7
6
5
4
3
2
1 68 67 66 65 64 63 62 61
60
11
59
12
58
13
57
14
56
15
55
16
54
17
Top
View
18
19
53
52
51
20
50
21
49
22
48
23
47
24
46
25
45
26
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
B2, R2
B3, R3
B4, R4
B5, R5
B6, R6
B7, R7
GND
GND
B8, R8
B9, R9
B10, R10
B11, R11
B12, R12
B13, R13
B14, R14
B15, R15
R16
R33
R32
R31
R30
R29
R28
R27
R26
R25
R24
R23
R22
R21
R20
R19
R18
R17
A15
OEL
RND
SUB
ACC
CLK A
CLK B
VCC
VCC
VCC
VCC
TC
OEX
PREL
OEM
CLK R
R34
Speed
Plastic J-Lead Chip Carrier
(J2)
0°C to +70°C — COMMERCIAL SCREENING
35 ns
25 ns
LMA2010JC35
LMA2010JC25
–55°C to +125°C — COMMERCIAL SCREENING
–55°C to +125°C — MIL-STD-883 COMPLIANT
Multiplier-Accumulators
7
08/16/2000–LDS.10/2010-P