C500 Family ApNotes
CCU-C504 #1
Block Commutation
Mode
Revolution Speed Measuring in Block Commutation PWM Mode
for brushless Synchronous AC Motors
The following application note concerns microcontrollers of the C500 family with a CCU
Peripheral Unit on Chip which is similar to:
SAx-C504-LM
SAx-C504-2RM
In block commutation mode, a synchronous generated defined incoming digital signal pattern
of e.g. hall sensors, which are applied to the INT0-2 inputs, is sampled. Each transition at the
INT0-2 inputs results in a change of the state of the PWM outputs according to a
implemented block commutation table in the CCU unit without using CPU load for this
operation.
2α
Figure1: Synchronous AC Motor in Block Commutation Mode
Semiconductor Group
Scheibert / HL MCB AT 1
CCU-C504 #1
Page -1/33/96 Rev 1.2
C500 Family ApNotes
For monitoring the sensor input signal timing in block commutation mode, the signal
transitions at INT0-2 external interrupt inputs can also generate an interrupt and a capture
event at channel 0 of the CAPCOM unit in connection with compare timer 1. With this
implemented feature, the revolution speed and acceleration or slow down phases of the
synchronous motor can be easly recorded.
The rotor angle α of the motor between two generated eletrical hall sensor signals is
dependent of the number of pairs of poles p of the machine. The formula is given by:
α=
60o
p
In block commutation mode CAPCOM channel 0 is automatically configured in capture
mode. Any signal transition at INT0-2 external inputs generates a capture pulse for
CAPCOM channel 0 independently on the selected signal transition type rising or falling
edge.The consequence is, that the 16-bit content at the former started compare timer 1 is
captured at any signal transition at INT0-2 to the corresponding capture registers CCL0 and
CCH0.
For calculating eg. the actual revolution speed of the synchronous motor, the corresponding
external interrupt INT0-2 inputs now can be used for capturing the actual compare timer 1
values.
The difference between two directly followed 16-bit capture values than is a defined time
base for the calculation of the actual revolution speed (regarding the number of pairs of poles
of the machine). To get the difference from two directly followed compare timer 1 count
values without calculation, practically in each external interrupt routine the actual capture
value is saved and the compare timer 1 is restarted with count value 0000H in mode 0.
Compare timer 1 overflows at period value FFFFH are not allowed and have to be
recognized by the software to avoid wrong speed recording.
The revolution speed measure range is restricted by the following formula and parameters:
rps =
1
[Hz]
int_ no × period × edge × p
• int_no
...
number of used external interrupt inputs (possible: 1 or 3)
• rps
...
revolutions per second [Hz]
• period
=
(resolution x countvalue)
resolution ...
resolution of compare timer 1 dependent on the selected input clock
prescaler ratio (fosc/2 - fosc/256)
countvalue ...
0001H for minimum count value of compare timer 1 (... -> rps_max)
FFFFH for maximum count value of compare timer 1 (... -> rps_min)
• p
...
number of pairs of poles
• edge
...
1 for rising or falling edge sensitive external interrupt input
...
2 for rising and falling edge sensitive external interrupt input
Semiconductor Group
Scheibert / HL MCB AT 1
CCU-C504 #1
Page -2/33/96 Rev 1.2
C500 Family ApNotes
The following table gives an examle of the range for the revolution speed measuring
dependent of the fixed parameters p = 1, edge = 2 and int_no = 3. Compare timer 1
(COMPT1) input clock prescaler ratio is variable.
COMPT1
input
clock
p
edge
int_no
period_min
(COMPT1)
[1 or 2] [1 or 3]
[s]
period_max
COMPT1
[s]
rps_min
rps_max
[Hz]
(theoretical
) [Hz]
[n]
fosc/2
1
2
3
5x10-8
3.28x10-3
50.86
3.33x108
fosc/4
1
2
3
1x10-7
6.55x10-3
25.43
1.66x107
fosc/8
1
2
3
2x10-7
13.11x10-3
12.71
8.33x106
fosc/16
1
2
3
4x10-7
26.21x10-3
6.35
4.16x106
fosc/32
1
2
3
8x10-7
52.43x10-3
3.18
2.08x106
fosc/64
1
2
3
1.6x10-6
104.86x10-3
1.59
1.04x106
fosc/128
1
2
3
3.2x10-6
209.72x10-3
0.79
5.21x105
fosc/256
1
2
3
6.4x10-6
419.43x10-3
0.40
2.60x104
Table 1: Calculated examples for revolution speed measuring
The shadowed column in the table with rps_max are the theoretical calculated maximum
frequencies of a revolution measurement with COMPT1 count value 0001H which practical
cannot be achieved because of the restricted performance of the microcontroller and the
mechanical restrictions of the motor. The column rps_min represents the minimim resolution
of the revolution speed measurement with COMPT1 count value FFFFH.
The optimal parameters have to be selected according to the individual application demands.
The following C51 source code listing example uses edge=2, int_no=1 and fosc/256
prescaler ratio (p is dependent of the used motor). This application example is intended as a
moment record of the revolution speed. If there is a demand for recording the acceleration or
slow down phases of the brushless AC motor, the example has to be extended by a
revolution speed value array which eg. can be accessed to with pointers.
HL MCB AT 1
K. Scheibert
Appendix:
• 4 pages of C51 source and assembler listings
Semiconductor Group
Scheibert / HL MCB AT 1
CCU-C504 #1
Page -3/33/96 Rev 1.2
C500 Family ApNotes
C51 COMPILER V5.02,
RPS
05/03/96
09:28:02
PAGE 1
DOS C51 COMPILER V5.02, COMPILATION OF MODULE RPS
OBJECT MODULE PLACED IN RPS.OBJ
COMPILER INVOKED BY: C:\C51\BIN\C51.EXE RPS.C CD SB PL(100) PW(127) ROM(LARGE) SMALL OT(6,SPEED)
stmt level
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source
/* -----------------------------------------------------------------------------------------file rps.c
Copyright 1996 Siemens AG HL MC AT 1, Klaus Scheibert, 03/04/96
Keil C51 Compiler V5.02
************************SW for Application Note CCU-504
#1 *********************************
*** Revolution Speed Measuring in Block Commutation PWM Mode for brushless AC Motors ***
fixed parameters: edge = 2, int_no = 1 and prescaler ratio of compare timer 1 = fosc/256
------------------------------------------------------------------------------------------- */
#pragma DEBUG OBJECTEXTEND CODE
/* command lines directives */
#pragma NOLISTINCLUDE
#include <reg504.h>
/* special function register declarations for C504 */
#include <intc504.h>
/* interrupt number definition file */
#define FOREVER for(;;)
/* endless loop */
/*********************** GLOBAL DECLARATION OF VARIABLES ********************************/
union { unsigned int capture_reg;
unsigned char capture_byte[2];
} capture_union;
#define capture_low capture_union.capture_byte[1]
#define capture_high capture_union.capture_byte[0]
#define capture_value capture_union.capture_reg
/* with this union, a copie from the capture register
of the comparetimer 1 is located in data and
is available as unsigned int and char */
unsigned int data difference_val;
unsigned char data compt1_ov_val;
/* a copie of the cature value is done to difference_val */
/* value is used for test of compare timer 1 overflow */
/************************************** PROCEDURES *********************************************/
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
void comp_ini (void)
{
CT1OFH = 0x00;
CT1OFL = 0x00;
CCPH
= 0x0FF;
CCPL
= 0x0FF;
COINI |= 0x0FF;
CMSEL0 |= 0x33;
CMSEL1 |= 0x03;
TRCON
BCON
= 0x00;
= 0x05;
CT1CON
= 0x0F;
/* SET CAPCOM UNIT IN BLOCK COMMUTATION MODE */
/* set offset register value to reset values */
/*
/*
/*
/*
/*
/*
/*
/*
/*
/*
set period register value to maximum values */
period = 6.4us - 419.43ms @ fosc=40MHz and prescalers set to fosc/256 */
compare ini reg CCx=1, COUTx=1 in inactive state */
capture mode enabled */
in block commutation mode CAPCOM channel 0 is */
automatically configured for capture mode and captured in CCL0/CCH0*/
CTRAP function disabled at CCx/COUTx pins */
block commutation mode is selected with rotate right */
bit BCEN is set - block commutation mode enabled */
start CT1 in mode 0, prescaler set to fosc/256
(period 6.4us - 419.43ms) */
}
void int_ini (void)
{
IT0
= 1;
EX0
= 1;
ITCON = 0x03;
CCIE
IEN1
EA
|= 0x80;
|= 0x20;
= 1;
/* interrupt initialization */
/* enable external interupt0 in at P3.2 */
/* rising/falling edge-triggered mode at interrupt 0 */
/* set ECTP bit for enabling period interrupt */
/* enable compare timer 1 interrupt */
/* enable all interrupts */
}
void rps_sub (void)
/* subroutine for saving the captured compare timer value to
difference_val */
{
1
1
2
2
2
1
if (compt1_ov_val > 0)
{
difference_val = 0x00;
compt1_ov_val = 0x00;
}
else
Semiconductor Group
Scheibert / HL MCB AT 1
/* test error condition before saving capture value */
/* if an comt1 overflow occured set difference_val to 0x00 */
/* reset compare timer 1 error condition */
CCU-C504 #1
Appendix Page -1/43/96 Rev 1.2
C500 Family ApNotes
C51 COMPILER V5.02,
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RPS
05/03/96
09:28:02
PAGE 2
{
difference_val = capture_value;
/* save capture_value to difference_val */
}
}
void extintx_sub (void)
{
capture_high = CCH0;
capture_low = CCL0;
CT1CON = 0x17;
CT1CON = 0x0F;
/* subroutine for external interrupt0 */
/*
/*
/*
/*
load int cature_value */
stop and reset compare timer 1; ct1clock = fosc/256 */
start comparetimer with 0000H*/
6 instruction cycles measurement error = 1.8 us @ fosc 40 MHz) */
}
/********************************************** INTERRUPTS ************************************/
void comptim1 (void) interrupt COMT1 using 1
/* #define
COMT1
13
// (73H) Compare Timer 1 interrupt */
{
1
1
1
CCIR &= 0x7F;
compt1_ov_val = compt1_ov_val+1;
/* clear interrupt flag CT1FP */
/* set error condition */
}
void extint0 (void) interrupt EXTI0 using 1
/* #define
/* EXTI0 = 0 */
EXTI0
0
// (03H) external interrupt 0 */
{
1
1
1
extintx_sub ();
rps_sub ();
/* call external interrupt 0 subroutine */
/* call subroutine for calculation of rpm */
}
/************************************* MAIN PROGRAM ******************************************/
void main (void)
{
1
1
1
1
1
1
1
2
2
1
comp_ini ();
int_ini ();
FOREVER
{
;
}
/* call compare timer initialisation procedure */
/* set block commutation mode with rotate right */
/* subroutine for enable interrupt0 */
/* endless loop */
}
Semiconductor Group
Scheibert / HL MCB AT 1
CCU-C504 #1
Appendix Page -2/43/96 Rev 1.2
C500 Family ApNotes
C51 COMPILER V5.02,
RPS
05/03/96
09:28:02
PAGE 3
ASSEMBLY LISTING OF GENERATED OBJECT CODE
; FUNCTION comp_ini (BEGIN)
; SOURCE LINE # 51
; SOURCE LINE # 52
; SOURCE LINE # 53
0000 E4
0001 F5E7
CLR
MOV
A
CT1OFH,A
0003 F5E6
MOV
CT1OFL,A
0005 75DFFF
MOV
CCPH,#0FFH
0008 75DEFF
MOV
CCPL,#0FFH
000B 75E2FF
MOV
COINI,#0FFH
000E 43E333
ORL
CMSEL0,#033H
0011 43E403
ORL
CMSEL1,#03H
0014 F5CF
MOV
TRCON,A
0016 75D705
MOV
BCON,#05H
0019 75E10F
MOV
CT1CON,#0FH
; SOURCE LINE # 54
; SOURCE LINE # 55
; SOURCE LINE # 56
; SOURCE LINE # 57
; SOURCE LINE # 58
; SOURCE LINE # 59
; SOURCE LINE # 61
; SOURCE LINE # 62
; SOURCE LINE # 64
; SOURCE LINE # 66
001C 22
RET
; FUNCTION comp_ini (END)
; FUNCTION int_ini (BEGIN)
; SOURCE LINE # 69
; SOURCE LINE # 70
; SOURCE LINE # 71
0000 D288
SETB
IT0
0002 D2A8
SETB
EX0
0004 759A03
MOV
ITCON,#03H
0007 43D680
ORL
CCIE,#080H
000A 43A920
ORL
IEN1,#020H
000D D2AF
SETB
EA
; SOURCE LINE # 72
; SOURCE LINE # 73
; SOURCE LINE # 75
; SOURCE LINE # 76
; SOURCE LINE # 78
; SOURCE LINE # 79
000F 22
RET
; FUNCTION int_ini (END)
; FUNCTION rps_sub (BEGIN)
; SOURCE LINE # 82
; SOURCE LINE # 85
; SOURCE LINE # 86
0000
0002
0003
0005
E500
D3
9400
4008
R
MOV
SETB
SUBB
JC
0007 E4
0008 F500
000A F500
R
R
CLR
MOV
MOV
000C F500
R
MOV
000E 22
000F
RET
?C0003:
MOV
MOV
A,compt1_ov_val
C
A,#00H
?C0003
; SOURCE
; SOURCE
A
difference_val,A
difference_val+01H,A
; SOURCE
compt1_ov_val,A
; SOURCE
LINE # 87
LINE # 88
LINE # 89
LINE # 90
; SOURCE LINE # 92
; SOURCE LINE # 93
difference_val,capture_union
difference_val+01H,capture_union+01H
; SOURCE LINE # 94
; SOURCE LINE # 95
000F 850000
0012 850000
R
R
0015
0015 22
?C0005:
RET
; FUNCTION rps_sub (END)
; FUNCTION extintx_sub (BEGIN)
0000 85C300
R
MOV
0003 85C200
R
MOV
0006 75E117
MOV
0009 75E10F
MOV
000C 22
; SOURCE
; SOURCE
; SOURCE
capture_union,CCH0
; SOURCE
capture_union+01H,CCL0
; SOURCE
CT1CON,#017H
; SOURCE
CT1CON,#0FH
; SOURCE
LINE # 98
LINE # 99
LINE # 100
LINE # 101
LINE # 102
LINE # 103
LINE # 105
RET
; FUNCTION extintx_sub (END)
; FUNCTION comptim1 (BEGIN)
; SOURCE LINE # 110
; SOURCE LINE # 115
0000 53E57F
ANL
CCIR,#07FH
; SOURCE LINE # 116
Semiconductor Group
Scheibert / HL MCB AT 1
CCU-C504 #1
Appendix Page -3/43/96 Rev 1.2
C500 Family ApNotes
C51 COMPILER V5.02,
RPS
INC
05/03/96
0003 0500
R
0005 32
RETI
; FUNCTION comptim1 (END)
09:28:02
PAGE 4
compt1_ov_val
; SOURCE LINE # 117
0000 C0E0
0002 C0D0
; FUNCTION extint0 (BEGIN)
PUSH
ACC
PUSH
PSW
0004 120000
R
LCALL
extintx_sub
0007 120000
R
LCALL
rps_sub
000A D0D0
000C D0E0
000E 32
POP
PSW
POP
ACC
RETI
; FUNCTION extint0 (END)
; SOURCE LINE # 120
; SOURCE LINE # 126
; SOURCE LINE # 127
; SOURCE LINE # 128
; FUNCTION main (BEGIN)
; SOURCE LINE # 132
; SOURCE LINE # 133
; SOURCE LINE # 135
0000 120000
R
LCALL
comp_ini
0003 120000
R
LCALL
int_ini
0006
?C0009:
; SOURCE LINE # 137
; SOURCE LINE # 139
; SOURCE LINE # 140
; SOURCE LINE # 142
0006 80FE
SJMP
?C0009
; SOURCE LINE # 143
0008 22
RET
; FUNCTION main (END)
Semiconductor Group
Scheibert / HL MCB AT 1
CCU-C504 #1
Appendix Page -4/43/96 Rev 1.2