HD74HC107 Dual J-K Flip-Flops (with Clear) REJ03D0559-0200 (Previous ADE-205-432) Rev.2.00 Oct 06, 2005 Description This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Each one has independent J, K, clock, and clear inputs and Q and Q outputs. Clear is independent of the clock and accomplished by a low level on the input. Features • • • • • • High Speed Operation: tpd (Clock to Q) = 19 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C) Ordering Information Part Name Package Type HD74HC107P DILP-14 pin HD74HC107FPEL SOP-14 pin (JEITA) HD74HC107RPEL SOP-14 pin (JEDEC) Package Code (Previous Code) PRDP0014AB-B (DP-14AV) PRSP0014DF-B (FP-14DAV) PRSP0014DE-A (FP-14DNV) Package Abbreviation Taping Abbreviation (Quantity) P — FP EL (2,000 pcs/reel) RP EL (2,500 pcs/reel) Note: Please consult the sales office for the above package availability. Function Table Inputs Clear L H: L: X: Outputs Q H J X K X Q L H H L L L H L H H H H L H X X X X No change No change X X No change H H Clock X L H H High level Low level Irrelevant Rev.2.00, Oct 06, 2005 page 1 of 7 No change H H L Toggle HD74HC107 Pin Arrangement 1J 1 1Q 2 Q 1Q 3 1K 4 2Q 5 Q Q Q 2Q 6 GND 7 CLR J CK K K CK CLR J 14 Vcc 13 1CLR 12 1CK 11 2K 10 2CLR 9 2CK 8 2J (Top View) Logic Diagram (1/2) Q CLR CK CK J Q K CK CK CK CK CK CK CK CK CK Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage range Input / Output voltage VCC Vin, Vout –0.5 to 7.0 –0.5 to VCC +0.5 V V IIK, IOK IO ±20 ±25 mA mA ICC or IGND PT ±50 500 mA mW Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Tstg –65 to +150 °C Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Rev.2.00, Oct 06, 2005 page 2 of 7 HD74HC107 Recommended Operating Conditions Symbol Ratings Unit Supply voltage Input / Output voltage Item VCC VIN, VOUT 2 to 6 0 to VCC V V Operating temperature Ta –40 to 85 0 to 1000 °C 0 to 500 0 to 400 ns Input rise / fall time Note: *1 tr , tf Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Electrical Characteristics Ta = 25°C Item Input voltage Symbol VCC (V) VIH VIL Output voltage VOH VOL Ta = –40 to+85°C 2.0 Min 1.5 Typ — Max — Min 1.5 Max — 4.5 6.0 3.15 4.2 — — — — 3.15 4.2 — — 2.0 4.5 — — — — 0.5 1.35 — — 0.5 1.35 6.0 2.0 — 1.9 — 2.0 1.8 — — 1.9 1.8 — 4.5 6.0 4.4 5.9 4.5 6.0 — — 4.4 5.9 — — 4.5 6.0 4.18 5.68 — — — — 4.13 5.63 — — 2.0 4.5 — — 0.0 0.0 0.1 0.1 — — 0.1 0.1 6.0 4.5 — — 0.0 — 0.1 0.26 — — 0.1 0.33 Unit Test Conditions V V V Vin = VIH or VIL IOH = –20 µA IOH = –4 mA IOH = –5.2 mA V Vin = VIH or VIL IOL = 20 µA IOL = 4 mA Input current Iin 6.0 6.0 — — — — 0.26 ±0.1 — — 0.33 ±1.0 IOL = 5.2 mA µA Vin = VCC or GND Quiescent supply current ICC 6.0 — — 2.0 — 20 µA Vin = VCC or GND, Iout = 0 µA Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Item Maximum clock frequency Propagation delay time Pulse width Symbol VCC (V) fmax tPLH, tPHL tw Min Ta = 25°C Ta = –40 to +85°C Unit Typ Max Min Max 2.0 4.5 — — — — 6 30 — — 5 24 6.0 2.0 — — — — 35 150 — — 28 190 4.5 6.0 — — 19 — 30 26 — — 38 33 2.0 4.5 — — — 17 140 28 — — 175 35 6.0 2.0 — 80 — — 24 — — 100 30 — 4.5 6.0 16 14 7 — — — 20 17 — — Rev.2.00, Oct 06, 2005 page 3 of 7 Test Conditions ns ns Clock to Q or Q ns Clear to Q or Q ns Clock, Clear HD74HC107 Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25°C Item Setup time Hold time Removal time Output rise/fall time Input capacitance Symbol VCC (V) tsu th trem tTLH, tTHL Cin Ta = –40 to +85°C 2.0 Min 100 Typ — Max — Min 125 Max — 4.5 6.0 20 17 3 — — — 25 21 — — 2.0 4.5 5 5 — –2 — — 5 5 — — 6.0 2.0 5 100 — — — — 5 125 — — 4.5 6.0 20 17 0 — — — 25 21 — — 2.0 4.5 — — — 5 75 15 — — 95 19 6.0 — — — — 5 13 10 — — 16 10 Unit Test Conditions ns J or K to Clock ns Clock to J or K ns Clear to Clock ns pF Test Circuit VCC VCC Pulse generator Zout = 50 Ω Input Pulse generator Zout = 50 Ω See Function Table Output Input J Q CL = 50 pF Clock Output K Q Clear Note: C L includes the probe and jig capacitance. Rev.2.00, Oct 06, 2005 page 4 of 7 CL = 50 pF HD74HC107 Waveforms • Waveform − 1 tr tf t w (L) VCC 90 % Clock 50 % 10 % 50 % 50 % 50 % 10 % t w (H) 0V t TLH t THL VOH 90 % 50 % 90 % 50 % 10 % Q or Q 10 % t PLH t PHL t PHL t PLH 90 % Q or Q 50 % 10 % 50 % 10 % VOL VOH VOL t TLH t THL • Waveform − 2 tf Clear tr VCC 90 % 50 % 10 % 90 % 50 % 10 % 0V t w(clear) tf tr VCC 90 % 50 % 50 % Clock 10 % t PHL 90 % 50 % 10 % Q 10 % 0V t w(clock) VOH VOL t THL t PLH 90 % Q 50 % 10 % VOH VOL t TLH Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns 2. The output are measured one at a time with one transition per measurement. Rev.2.00, Oct 06, 2005 page 5 of 7 HD74HC107 Package Dimensions JEITA Package Code P-DIP14-6.3x19.2-2.54 RENESAS Code PRDP0014AB-B Previous Code DP-14AV MASS[Typ.] 0.97g D 8 E 14 1 7 b3 Z A1 A Reference Symbol Nom e1 7.62 D 19.2 E 6.3 A1 0.51 bp 0.40 L e1 0.48 c 0.19 θ 0° JEITA Package Code P-SOP14-3.95x8.65-1.27 RENESAS Code PRSP0014DE-A *1 0.56 e 2.29 0.31 2.54 2.79 15° 2.39 L 2.54 MASS[Typ.] 0.13g Previous Code FP-14DNV NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. F D 14 7.4 0.25 Z ( Ni/Pd/Au plating ) 20.32 1.30 b3 c Max 5.06 A θ bp e Dimension in Millimeters Min 8 c *2 Index mark HE E bp Reference Symbol Terminal cross section ( Ni/Pd/Au plating ) Dimension in Millimeters Min Nom Max D 8.65 9.05 E 3.95 A2 A1 7 1 Z e *3 bp 0.10 0.14 A x M bp L1 0.25 1.75 0.34 0.40 0.46 0.15 0.20 0.25 6.10 6.20 b1 c A c1 A1 θ L y Detail F θ 0° HE 5.80 1.27 e x 0.25 y 0.15 0.635 Z L L Rev.2.00, Oct 06, 2005 page 6 of 7 8° 0.40 1 0.60 1.08 1.27 HD74HC107 JEITA Package Code P-SOP14-5.5x10.06-1.27 RENESAS Code PRSP0014DF-B *1 Previous Code FP-14DAV D MASS[Typ.] 0.23g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. F 14 8 c HE *2 E bp Index mark Reference Symbol Terminal cross section ( Ni/Pd/Au plating ) 1 Z *3 Nom Max D 10.06 10.5 E 5.50 A2 7 e A1 bp Dimension in Millimeters Min x M 0.00 0.10 0.20 0.34 0.40 0.46 0.15 0.20 0.25 7.80 8.00 2.20 A L1 bp b1 c A c A1 θ y L Detail F 1 θ 0° HE 7.50 1.27 e x 0.12 y 0.15 Z 1.42 0.50 L L Rev.2.00, Oct 06, 2005 page 7 of 7 8° 1 0.70 1.15 0.90 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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