3N163, 3N164 P-CHANNEL ENHANCEMENT MODE MOSFET FEATURES VERY HIGH INPUT IMPEDANCE HIGH GATE BREAKDOWN ULTRA LOW LEAKAGE FAST SWITCHING LOW CAPACITANCE ABSOLUTE MAXIMUM RATINGS @ 25°C (unless otherwise stated) Drain-Source or Drain-Gate Voltage 3N163 -40V 3N164 -30V Drain Current 50mA Storage Temperature -55ºC to +150ºC Power Dissipation TO-72 case 375mW 2 Power Dissipation SOT-143 case 350mW 3 SOT-143 TOP VIEW TO-72 TOP VIEW ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted) SYMBOL CHARACTERISTIC 3N163 MIN IGSS Gate Leakage Current TA=+125ºC 3N164 UNITS -10 -10 -25 -25 -40 pA Drain-Source Breakdown Voltage -30 BVSDS Source-Drain Breakdown Voltage -40 VGS(th) Threshold Voltage -2.0 VGS Gate Source Voltage (on) -3.0 IDSS ISDS Zero Gate Voltage, Drain Current (off) Zero Gate Voltage, Source Current RDS(on) Drain-Source on Resistance ID(on) On Drain Current -5.0 gfs Forward Transconductance 2.0 gog Output Admittance 250 Ciss Input Capacitance-Output Shorted 3.5 3.5 pF Crss Reverse Transfer Capacitance 0.7 0.7 Coss Output Capacitance Input Shorted 3.0 3.0 -30 -5.0 -2.0 -6.5 -3.0 V -5.0 -6.5 -200 -400 -400 -800 250 -30 -3.0 4.0 1.0 VGS=-40V, VDS=0 (3N163), VSB=0V VGS=-30V, VDS=0 (3N164), VSB=0V BVDSS Linear Integrated Systems CONDITIONS MAX MIN MAX pA ID=-10µA VGS=0, VBS=0 IS=-10µA VGD=0, VBD=0 VDS=VGS ID=-10µA, VSB=0V VDS=-15V ID=-0.5mA, VSB=0V VDS=-15V VGS=0, VSB=0V VSD=-15V VGS=0, VDB=0V 300 ohms VGS=-20V ID=-100µA, VSB=0V -30 mA VDS=-15V VGS=-10V, VSB=0V 4.0 mS VDS=-15V ID=-10mA f=1kHz 250 µS VDS=-15V ID=-10mA 1 f=1MHz • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 201137 09/02/2014 Rev#A8 ECN# 3N163 3N164 SWITCHING CHARACTERISTICS TA=25°C and VBS=0 (unless otherwise noted) SYMBOL CHARACTERISTIC 3N163 MIN 3N164 UNITS CONDITIONS MAX MIN MAX ton Turn-On Delay Time 12 12 tr Rise Time 24 24 ns VDD=-15V, VSB=0V ID(on)=-10mA1 toff Turn-Off Time 50 50 RG=RL=1.4K TYPICAL SWITCHING WAVEFORM INPUT PULSE Rise Time≤2ns Pulse Width≥200ns SAMPLING SCOPE Tr≤0.2ns CIN≤2pF RIN≥10M Switching Times Test Circuit NOTES: 1. For design reference only, not 100% tested. 2. Derate 3mW/ºC above 25ºC 3. Derate 3.5mW/ºC above 25ºC 4. All min/max limits are absolute numbers. Negative signs indicate electrical polarity only. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems. Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing high-quality discrete components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide, Co-Founder and Vice President of R&D at Intersil, and Founder/President of Micro Power Systems. Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 201137 09/02/2014 Rev#A8 ECN# 3N163 3N164