APPLICATION NOTE Migrating to Macronix MX25L25635F from Micron N25Q256A 1. Introduction This application note is the migration guide for migrating to Macronix MX25L25635F from Micron N25Q256A. The document does not provide detailed information on individual device, but highlights the similarities and differences between them. The comparison covers the general features, performance, command codes and other differences. The information provided is based on the data available at the time the document was released. Macronix MX25L25635F and Micron N25Q256A datasheets may override this application note if there is a different description for the same specification in the datasheets. Please refer to the contents and comparison tables below for more details. Publication Number: AN155V1 1 Issued: JUN. 28, 2012 APPLICATION NOTE 2. General Features 2-1. Feature Comparison Table 2-1. Feature Comparison Table Macronix MX25L25635F Micron N25Q256A 1-1-1 1-1-2/1-2-2 1-1-4/1-4-4 * 1-1-1 1-1-2/1-2-2 1-1-4/1-4-4 * 50MHz 54MHz 104MHz(x1) 84MHz(x2) 84MHz(x4) 108MHz(x1) 88MHz(x2) 78MHz(x4) 133MHz (x1/x2/x4) 108MHz (x1/x2/x4) NA 54MHz V V 4KB/32KB/64KB 4KB/64KB 256Byte 256Byte 4Kbit 64Byte Program/ Erase Suspend & Resume V V Read Enhance Mode V V Wrap Around Read Mode V V Configurable Dummy Cycle V V Adjustable Output Driver V V Fast boot (XIP) Mode V V S/W Reset Command V V Reset# Pin V Option BP Protect Top/Bottom Top/Bottom Company VCC 2.7V-3.6V 2.7V-3.6V Architecture I/O Normal Read Fast Read Clock Frequency 2x I/O: 4dummy cycles 4x I/O: 6dummy cycles Enhance Frequency (Maximum dummy cycle) DTR QPI Interface Sector Size Program Buffer Size Security OTP Features Password Protection V Volatile Write Protection V V Non-volatile Write Protection V V Note: * "x-y-z" means I/O mode used to indicate the number of active pins for Command (x), Address (y), and Data (z). Publication Number: AN155V1 2 Issued: JUN. 28, 2012 APPLICATION NOTE 3. Address Protocol Support Table 3-1. Address Protocol 4Byte Mode Bank Address 4Byte Command Set N25Q256A V V V MX25L25635F V V V Micron Macronix Both Macronix and Micron support three kinds of address protocols: “4Byte Mode addressing” “Bank Address” “4Byte Command Set” Macronix MX25L25635F provides compatible 4Byte operation command set with Micron N25Q256A device, which is shown as the table below. In following section we’ll point out the differences between Macronix MX25L25635F and Micron N25Q256A. Table 3-2. Related Command Set Instruction 4Byte ADD Approach Publication Number: AN155V1 Description Macronix MX25L25635F Micron N25Q256A EN4B Enter 4-byte address mode B7h B7h EX4B Exit 4-byte address mode E9h E9h RDEAR Read Extended Address Register C8h C8h WREAR Write Extended Address Register C5h C5h 3 Issued: JUN. 28, 2012 APPLICATION NOTE 3-1. 4Byte Mode: Issue Enter 4-Byte mode command to set up the 4BYTE bit in Configuration Register. After 4BYTE bit has been set, the device enter 4-byte Address mode, the number of address bits become 32-bit. 3-1-1. Micron N25Q256A Table 3-3. Related Register: Non-volatile Register Bits Description Bit Status Default Status Type Bit15-12 Number of dummy clock cycles 0000 to 1111 1111 Non-volatile Bit 11-9 XIP mode at power-on reset 000 to 111 111 Non-volatile Bit 8-6 Output driver strength 000 to 111 111 Non-volatile X 1 Non-volatile Bit 5 Reserved Bit 4 Reset/Hold disable 0 = Disabled 1 = Enabled 1 Non-volatile Bit 3 QPI enable 0 = Enabled 1 = Disabled 1 Non-volatile Bit 2 DPI enable 0 = Enabled 1 = Disabled 1 Non-volatile Bit 1 128Mb segment select 0 = Upper 128Mb segment 1 = Lower 128Mb segment 1 Non-volatile Bit 0 Address bytes 0 = Enable 4B address 1 = Enable 3B address 1 Non-volatile Write Enable (WREN): The WRITE ENABLE command (06h) must be issued first before issuing Enter 4-byte Mode (B7h) and Exit 4Byte Mode (E9) command Entry 4Byte Mode Method 1. Issue Enter 4-byte Mode (B7h) command to enable 4-byte address mode. The bit 0 (Address byte) of NVM register should become to “0” after it enters 4-byte mode. Exit 4Byte Mode 1. Issue Exist 4Byte Mode (E9) command to exit the 4Byte address Mode. 2. H/W Reset or S/W Reset Command. 3. Power-on cycle. Publication Number: AN155V1 4 Issued: JUN. 28, 2012 APPLICATION NOTE 3-1-2. Macronix MX25L25635F Table 3-4. Related Register: Configuration Register Bits Description Bit Status Default Status Type Bit7 DC1 (Dummy cycle 1) 0 Volatile Bit 6 DC0 (Dummy cycle 0) 0 Volatile Bit 5 4 BYTE (4Byte address enable) 0=3-byte address mode 1=4-byte address mode 0 Volatile Bit 4 Reserved X X Volatile Bit 3 TB (top/bottom selected) 0 = Top 1=Bottom 0 OTP Bit 2 Bit 1 Bit 0 ODS 2 (output driver strength) ODS 1 (output driver strength) ODS 0 (output driver strength) 1 1 1 Volatile Volatile Volatile Write Enable (WREN): No WRITE ENABLE command(06h) is needed before issuing the Enter 4-byte Mode (B7h) and Exist 4Byte Mode (E9) command Enter 4Byte Mode Method Using Enter 4-byte Mode (B7h) command to enable 4-byte address mode, the bit 5 (4BYTE) of Configuration should become to “1” after it enters 4-byte mode. No WREN command is required. Exit 4Byte Mode 1. Issue Exit 4Byte Mode (E9h) command to exit the 4Byte address Mode. 2. H/W Reset or S/W Reset Command. 3. Power-on cycle. Publication Number: AN155V1 5 Issued: JUN. 28, 2012 APPLICATION NOTE 3-2. Extended Address Register (EAR) The Extended Address Register provides the 4th byte of address, which configures the memory device into two 128Mb segments. Select which one is active through the bit 0 of the Extended Address Register (EAR). It identifies the extended address (A31~A24) above 128Mb density by using original 3-byte address. Macronix MX25L25635F provides compatible EAR operation with Micron N25Q256A device, without OPcode or setting change. 3-2-1 Micron N25Q256A Table 3-5. Related Register: Extended Address Register Bits Description 7 to 1 A31-A25 0 A24 (Bank address) Bit Status 0 = Reserved 0 = Lower 128Mb segment 1 = Upper 128Mb segment Default Status Type 0000000 Volatile 0 Volatile 1. WREN command is requested for Write Enable latch bit. 2. Using “Write Extended Address Register (C5h)” command to update the Bit 0 (A24) value of Extended Address Register, which can set extended address A24 for 256Mb device. 3-2-2 Macronix MX25L25635F Table 3-6. Related Register: Extended Address Register Bits Description 7 to 1 A31-A25 0 A24 (Bank address) Bit Status 0 = Reserved 0 = Lower 128Mb segment 1 = Upper 128Mb segment Default Status Type 0000000 Volatile 0 Volatile 1. Macronix MX25L25635F can accept either WREN set or WREN non-set before setting the extended address register. 2. Using “Write Extended Address Register (C5h)” command to update the Bit 0 (A24) value of Extended Address Register, which can set extended address A24 for 256Mb device. 3. For the 256Mb flash, the A31 to A25 are "Don’t Care", and reading these bits are shown as 0. The data can be continually read out without the limitation of 128Mb boundary; however, the EAR (Extended Address Register) value does not change. Publication Number: AN155V1 6 Issued: JUN. 28, 2012 APPLICATION NOTE 3-3. 4Byte Command Set When issuing 4-byte address command set, 4-byte address (A31-A0) is requested after the instruction code. Macronix MX25L25635F provides compatible 4Byte command set with Micron’s N25Q256A device. Please refer to below table for details of OPcode defintion. Instruction 4Byte Command READ4B Fast_READ4B DREAD4B 2READ4B QREAD4B 4READ4B PP4B 4PP4B SE4B BE4B BE32K4B Publication Number: AN155V1 Description Read Data Bytes Read Data Bytes at Higher Speed Dual Output Fast Read Dual Input/Output Fast Read Quad Output Fast Read Quad Input/Output Fast Read Page Program Quad page program 1-4-4 Sector Erase Block Erase 64KB Block erase 32KB 7 Macronix MX25L25635F Micron N25Q256A 13h 0Ch 3Ch BCh 6Ch ECh 12h 3Eh 21h DCh 5Ch 13h 0Ch 3Ch BCh 6Ch ECh - Issued: JUN. 28, 2012 APPLICATION NOTE 4. Performance Comparison Tables below are the performance comparison of the two products. Table 4-1. Read Performance Comparison Parameters Type VCC Normal Read 1 I/O 1-in/2-out Fast 2-in/2-out Read 1-in/4-out 4-in/4-out 10pf tCLQV 15pf 30pf Macronix MX25L25635F Micron N25Q256A SDR 2.7-3.6V 50MHz 133MHz 133MHz 133MHz 133MHz 133MHz SDR 2.7-3.6V 54MHz 133MHz 108MHz 108MHz 108MHz 108MHz 5ns 7ns 6ns 8ns DDR 2.7-3.6V 54MHz 54MHz 54MHz 54MHz 54MHz 6ns 8ns Table 4-2. Write Performance and Power Consumption Comparison Macronix MX25L25635F Micron N25Q256A 4KB (typ) 0.03s 0.3s 32KB (typ) 0.19s - 64KB (typ) 0.34s 0.6s 256B (typ) 0.6ms 0.4ms Active Write Current (max) 20mA 20mA Active Read Current (max) 25mA 20mA Standby Current (typ/max) 30uA/100uA 100uA(max) Parameters Erase Program Publication Number: AN155V1 8 Issued: JUN. 28, 2012 APPLICATION NOTE 5. Command Code Comparison Instruction Type Read ID Read Write Description Macronix MX25L25635F Micron N25Q256A RDID READ FAST_READ DOFR DIOFR QOFR QIOFR DDRFR DDRDIOR DDRQIOR RDSFDP WREN WRDI PP 4PP SE SE 64K BE 32K CE Read Identification Read Data Bytes Read Data Bytes at Higher Speed Dual Output Fast Read Dual Input/Output Fast Read Quad Output Fast Read Quad Input/Output Fast Read DDR fast Read DDR dual Input/Output Read DDR Quad Input/Output Read Read Serial Flash Discovery Parameter Write Enable Write Disable Page Program Quad page program Sector Erase Block Erase 64KB Block erase 32KB Chip Erase 9Fh 03h 0Bh 3B BBh 6B EBh 5Ah 06h 04h 02h 38h 20h D8h 52h 60 or C7h 9Eh/9Fh 03h 0Bh 3Bh BBh 6Bh EBh 0Dh BDh EDh 5Ah 06h 04h 02h 32h 20h D8h C7h READ4B 13h 13h 0Ch 0Ch 3Ch 3Ch BCh BCh 6Ch 6Ch ECh ECh PP4B 4PP4B SE4B BE4B BE32K4B EN4B EX4B Read Data Bytes using 4 Bytes Address Read Data Bytes at Higher Speed using 4 Bytes Address Dual Output Fast Read using 4 Byte Address Dual Input/Output Fast Read using 4 Byte Address Quad Output Fast Read using 4 Byte Address Quad Input/Output Fast Read using 4 Byte Address Page Program Quad page program 1-4-4 Sector Erase Block Erase 64KB Block erase 32KB Enter 4-byte address mode Exit 4-byte address mode 12h 3Eh 21h DCh 5Ch B7h E9h 12h B7h E9h RDEAR Read Extended Address Register C8h C8h WREAR Write Extended Address Register C5h C5h Instruction Fast_READ 4B DREAD4B 2READ4B 4Byte Command QREAD4B 4READ4B 4Byte ADD Approach Publication Number: AN155V1 9 Issued: JUN. 28, 2012 APPLICATION NOTE Command Code Comparison - Continued Instruction Type Register Publication Number: AN155V1 Instruction Description Macronix Micron MX25L25635F N25Q256A RDSR Read Status Register 1 05h 05h RDCR 2 Read Status Register 2 15h - WRSR Write Status Register 01h 01h RDSCUR read security register 2Bh - WRSCUR write security register 2Fh - RDLR Read Lock Register 2Dh E8h WRLR Write to Lock Register 2Ch E5h RDSPBLK SPB Lock Bit Read A7h - SPBLK SPB Lock Bit Write A6h - RDSPB SPB Bit Read E2h - WRSPB SPB Bit Write E3h - ESSPB SPB Bit Erase E4h - RDPASS Password Read 27h - WRPASS Password Write 28h - PASSULK Password Unlock 29h - RDDPB DPB Read E0h - WRDPB DPB Write E1h - RFSR Read Flag Status Register - 70h CLFSR Clear Flag Status Register - 50h RDFBR Fast Boot Register Read 16h - WRFBR Fast Boot Register Write 17h - ESFBR Fast Boot Register Erase 18h - Read Non-volatile configuration register - B5h Write Non-volatile configuration register - B1h Read Volatile configuration register - 85h Write Volatile configuration register - 81h Read Enhance Volatile configuration register - 65h Write Enhance Volatile configuration register - 61h 10 Issued: JUN. 28, 2012 APPLICATION NOTE Command Code Comparison - Continued Instruction Type QPI OTP Others Instruction Description Macronix MX25L25635F Micron N25Q256A EQIO RSTQIO QPIID ENSO EXSO ROTP POTP PGM/ERS Suspend Enable QPI Reset QPI QPI ID Read enter secured OTP exit secured OTP Read OTP (Read of OTP area) Program OTP (Program of OTP area) PGM/ERS Suspend 35h F5h Afh B1h C1h B0h 4Bh 42h 75h PGM/ERS Resume PGM/ERS Resume 30h 7Ah RSTEN Reset Enable 66h 66h RST Reset Memory 99h 99h 6. References The following datasheets were used for preparing this comparison note: Datasheet Location Date Issued Version MX25L25635F Macronix Website MAY 2012 0.01 N25Q256A Micron Website JAN. 2012 I For more functional and parametric specifications, please refer to the datasheet on the Macronix Website at http://www.macronix.com/ and go to: Products/Flash Memory/Serial Flash. Publication Number: AN155V1 11 Issued: JUN. 28, 2012 APPLICATION NOTE Except for customized products which have been expressly identified in the applicable agreement, Macronix's products are designed, developed, and/or manufactured for ordinary business, industrial, personal, and/or household applications only, and not for use in any applications which may, directly or indirectly, cause death, personal injury, or severe property damages. In the event Macronix products are used in contradicted to their target usage above, the buyer shall take any and all actions to ensure said Macronix's product qualified for its actual use in accordance with the applicable laws and regulations; and Macronix as well as it’s suppliers and/or distributors shall be released from any and all liability arisen therefrom. Copyright© Macronix International Co., Ltd. 2011~2012. All rights reserved, including the trademarks and tradename thereof, such as Macronix, MXIC, MXIC Logo, MX Logo, Integrated Solutions Provider, NBit, Nbit, NBiit, Macronix NBit, eLiteFlash, HybridNVM, HybridFlash, XtraROM, Phines, KH Logo, BE-SONOS, KSMC, Kingtech, MXSMIO, Macronix vEE, Macronix MAP, Rich Audio, Rich Book, Rich TV, and FitCAM. The names and brands of third party referred thereto (if any) are for identification purposes only. For the contact and order information, please visit Macronix’s Web site at: http://www.macronix.com MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. Publication Number: AN155V1 12 Issued: JUN. 28, 2012