APPLICATION NOTE Replacing Toshiba TC58NVG1S3H with Macronix MX30LF2G18AC 1. Introduction This application note is a guide for migrating to the Macronix MX30LF2G18AC from the Toshiba TC58NVG1S3H 2Gb, 3V, NAND flash memory. The document does not provide detailed information on the individual devices, but highlights the major similarities and differences between them. The comparison covers the general features, performance, command codes and other differences. The information in this document is based on datasheets listed in Section 10. Newer versions of the datasheets may override the contents of this document. 2. Features Both flash device families have similar features and functions as shown in Table 2-1. The primary difference is that the Macronix device only requires 4-bit ECC whereas the Toshiba device requires 8-bit ECC. Table 2-1: Feature Comparison Feature Vcc Voltage Range Bus Width Operating Temperature Interface Macronix MX30LF2G18AC Toshiba TC58NVG1S3H 2.7V ~ 3.6V 2.7V ~ 3.6V x8 x8 -40°C ~ 85°C -40°C ~ 85°C ONFI 1.0 Standard - 4b/528B 8b/512B Page Size 2KB+64B 2KB+128B Block Size 128KB+4KB 128KB+8KB 30 pages - Block 0 Block 0 ONFI standard - C2h/DAh/90h/95h/06h 98h/DAh/90h/15h/76h ONFI Signature 4Fh/4Eh/46h/49h - Data Retention 10 Years - 48-TSOP (12x20mm) 63-VFBGA (9x11mm) 48-TSOP (12x20mm) 63-VFBGA (9x11mm) ECC Requirement OTP Size Guarantee Good Blocks at Shipping Unique ID ID Code Packages P/N: AN-0329 1 Ver.01, Aug 5, 2014 APPLICATION NOTE Replacing Toshiba TC58NVG1S3H with Macronix MX30LF2G18AC 3. Performance Table 3-1 and Table 3-2 show MX30LF2G18AC and TC58NVG1S3H Read/Write performance. Table 3-1: Read Performance (Read Latency and Sequential Read) Read Function Macronix MX30LF2G18AC Toshiba TC58NVG1S3H Read Latency time (tR) 25us (max.) 25us (max.) Sequential Read time (tRC) 20ns (min.) 25ns (min.) Table 3-2: Write Performance (Program and Erase) Write Function Page Program time (tPROG) Block Erase time (tERASE) Macronix MX30LF2G18AC Toshiba TC58NVG1S3H 300us (typ.)/ 600us (max.) 300us (typ.)/ 700us (max.) 1ms (typ.)/ 3.5ms (max.) 2.5ms (typ.)/ 5ms (max.) 4 (max.) 4 (max.) 100,000 - NOP 1 Write/Erase Cycles* (Endurance) Note: 100K Endurance cycle with ECC protection. 4. DC Characteristics Read/Write power requirements (Table 4-1) and I/O voltage limits (Table 4-2) are similar. Table 4-1: Read / Write Current DC Characteristic Macronix MX30LF2G18AC Toshiba TC58NVG1S3H Sequential Read Current (ICC1) 20mA (typ.)/30mA (max.) 30mA (max.) Program Current (ICC2) 20mA (typ.)/30mA (max.) 30mA (max.) Erase Current (ICC3) 15mA (typ.)/30mA (max.) 30mA (max.) Standby Current – CMOS 10uA (typ.)/50uA (max.) 50uA (max.) Macronix MX30LF2G18AC Toshiba TC58NVG1S3H Input Low Voltage (VIL) -0.3V (min.) / 0.2VCC (max.) -0.3V (min.) / 0.2Vcc (max.) Input High Voltage (VIH) 0.8VCC (min.) / VCC+0.3V (max.) 0.8Vcc (min.) / Vcc+0.3V (max.) Output Low Voltage (VOL) 0.2V (max.) 0.2V (max.) Output High Voltage (VOH) VCC-0.2V (min.) VCC-0.2V (min.) Table 4-2: Input / Output Voltage DC Characteristic P/N: AN-0329 2 Ver.01, Aug 5, 2014 APPLICATION NOTE Replacing Toshiba TC58NVG1S3H with Macronix MX30LF2G18AC 5. Package Pin/Ball Definition Package physical dimensions are similar to each other. For detailed information, please refer to the individual datasheets. Table 5-1 and 5-2 shows differences in pin assignments between the Macronix and Toshiba devices. The TC58NVG1S3H can be replaced by the MX30LF2G18AC without pin conflicts. Only 48-TSOP pin #38 (63-VFBGA ball G5) may need special attention because the pin is designated “PT” which is Chip Protect function on the MX30LF2G18AC-TI. Figure 5-1: 48-TSOP (12x20mm) Package and Pin Layout Comparison NC NC NC NC NC NC R/B# RE# CE# NC NC VCC VSS NC NC CLE ALE WE# WP# NC NC NC NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 MX30LF2G18AC 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 VSS*1 NC NC NC IO7 IO6 IO5 IO4 NC VCC*1 PT VCC VSS NC VCC*1 NC IO3 IO2 IO1 IO0 NC NC NC VSS*1 NC NC NC NC NC NC R/B# RE# CE# NC NC VCC VSS NC NC CLE ALE WE# WP# NC NC NC NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 TC58NVG1S3H 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC NC NC NC I/O8 I/O7 I/O6 I/O5 NC NC NC VCC VSS NC NC NC I/O4 I/O3 I/O2 I/O1 NC NC NC NC Pin38: NC Pin38: PT Note: 1. These pins might not be connected internally. However it is recommended to connect these pins to power(or ground) as designated for ONFI compatibility. Brand Macronix Toshiba Part Name #38 pin MX30LF2G18AC-TI PT TC58NVG1S3HTAI0 NC Note: PT pin has internal weak pull low. It enables the protection function, if active. Please refer to the datasheet for more details. P/N: AN-0329 3 Ver.01, Aug 5, 2014 APPLICATION NOTE Replacing Toshiba TC58NVG1S3H with Macronix MX30LF2G18AC Figure 5-2: 63-VFBGA (9x11mm) Package and Pin Layout Comparison MX30LF2G18AC 1 2 A NC NC B NC 3 4 5 6 7 TC58NVG1S3H 8 9 10 NC NC NC NC 1 2 A NC NC B NC 3 4 5 6 7 8 C WP# ALE VSS CE# WE# R/B# C WP# ALE VSS CE# WE# R/B# D VCC *1 RE# CLE NC NC NC D NC RE# CLE NC NC NC E NC NC NC NC NC NC E NC NC NC NC NC NC F NC NC NC NC VSS *1 NC F NC NC NC NC NC NC G NC VCC *1 PT NC NC NC G NC NC NC NC NC NC H NC IO0 NC NC NC VCC H NC I/O1 NC NC NC Vcc J NC IO1 NC VCC IO5 IO7 J NC I/O2 NC Vcc I/O6 I/O8 K VSS IO2 IO3 IO4 IO6 VSS K Vss I/O3 I/O4 I/O5 I/O7 Vss 9 10 NC NC NC NC L NC NC NC NC L NC NC NC NC M NC NC NC NC M NC NC NC NC G5: PT G5: NC Note: 1. These pins might not be connected internally. However it is recommended to connect these pins to power(or ground) as designated for ONFI compatibility. Brand Macronix Toshiba Part Name #G5 ball MX30LF2G18AC-XKI PT TC58NVG1S3HBAI4 NC Note: PT pin has internal weak pull low. It enables the protection function, if active. Please refer to the datasheet for more details. P/N: AN-0329 4 Ver.01, Aug 5, 2014 APPLICATION NOTE Replacing Toshiba TC58NVG1S3H with Macronix MX30LF2G18AC 6. Command Set Basic command sets and status checking methods are similar. Read, Write, and Erase operation commands are identical (Table 6-1). Macronix implements the ONFI 2-Plane Block Erase command sequence (Table 6-2). Table 6-1: Command Table Command Read Mode Random Data Input Random Data Output Cache Read Random Cache Read Sequential Cache Read End ID Read Reset Page Program Cache Program Block Erase Status Read Status Enhanced Read Macronix MX30LF2G18AC 1st Cycle 2nd Cycle 00h 30h 85h 05h E0h 00h 31h 31h 3Fh 90h FFh 80h 10h 80h 15h 60h D0h 70h 78h - Table 6-2: Two-Plane Command Table Macronix MX30LF2G18AC Command 1st 2nd 3rd 4th ONFI 2 Plane Program ONFI 2 Plane Cache Program 2 Plane Block Erase P/N: AN-0329 Toshiba TC58NVG1S3H 1st Cycle 2nd Cycle 00h 85h 05h 31h 3Fh 90h FFh 80h 60h 70h 71h E0h 10h D0h - Toshiba TC58NVG1S3H Cycle Cycle Cycle Cycle 1st Cycle 80h 80h 60h 11h 11h D1h 80h 80h 60h 10h 15h D0h 80h 80h 60h 5 30h 2nd Cycle 3rd Cycle 4th Cycle 11h 11h 60h 80h 80h D0h 10h 15h - Ver.01, Aug 5, 2014 APPLICATION NOTE Replacing Toshiba TC58NVG1S3H with Macronix MX30LF2G18AC 6-2 Status Register When a flash Read/Program/Erase operation is in progress, either the “Ready/Busy# Pin Checking” or “Status Output Checking” method may be used to monitor the operation. Both are standard NAND flash algorithms and can be used for both device families. Table 6-3 shows that Status Output content provided by the Read Status command (70h) is compatible. Table 6-4 shows that Two–plane Operation Status by the Enhance Read Status command (78h) is compatible. Table 6-3: Status Output Status Output Macronix MX30LF2G18AC Toshiba TC58NVG1S3H SR[0] PGM/ERS status: Pass/Fail PGM/ERS/READ status: Pass/Fail SR[1] Cache Program status: Pass/Fail Cache Program status: Pass/Fail SR[2] Reserved Reserved SR[3] Reserved Reserved SR[4] SR[6] Reserved PGM/ERS/Read internal controller: Ready/Busy PGM/ERS/Read status: Ready/Busy Reserved PGM/ERS/Read internal controller: Ready/Busy PGM/ERS/Read status: Ready/Busy SR[7] Write Protect Write Protect SR[5] Table 6-4: Two-plane Status Output Status Output Macronix MX30LF2G18AC Toshiba TC58NVG1S3H Selected Plane PGM/ERS status: Pass/Fail Selected Plane Cache Program status: Pass/Fail SR[6] PGM/ERS/Read internal controller: Ready/Busy PGM/ERS/Read status: Ready/Busy Selected Plane PGM/ERS/READ status: Pass/Fail Selected Plane PGM/ERS/READ status: Pass/Fail Selected Plane PGM/ERS/READ status: Pass/Fail Selected Plane Cache Program status: Pass/Fail Selected Plane Cache Program status: Pass/Fail PGM/ERS/Read internal controller: Ready/Busy PGM/ERS/Read status: Ready/Busy SR[7] Write Protect Write Protect SR[0] SR[1] SR[2] Reserved SR[3] Reserved SR[4] Reserved SR[5] P/N: AN-0329 6 Ver.01, Aug 5, 2014 APPLICATION NOTE Replacing Toshiba TC58NVG1S3H with Macronix MX30LF2G18AC 7. Read ID Command The ID of the Macronix MX30LF2G18AC begins with a one-byte Manufacturer Code followed by a four-byte Device ID. While the same command set is used to read the Manufacturer ID, Device ID, and flash structure, the IDs are different, allowing software to identify the device manufacturer and device type (Table 7-1). Table 7-1: Manufacturer and Device IDs ID code Macronix MX30LF2G18AC Value 1st Byte 2nd Byte I/O0 I/O1 I/O2 I/O3 3rd I/O4 Byte I/O5 I/O6 th 4 Byte 5th Byte P/N: AN-0329 I/O7 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 Toshiba TC58NVG1S3H C2h/DAh/90h/95h/06h Manufacturer Code Device Identifier 98h/DAh/90h/15h/76h Manufacturer Code Device Identifier Number of Die per Chip Enable Number of Die per Chip Enable Cell Structure Cell Structure Number of Simultaneously Programmed Pages Interleaved Programming Between Multiple Chips Cache Programming Reserved Page Size (exclude Spare Area) Page Size (exclude Spare Area) Size of Spare Area (Byte per 512Byte) Sequential Read Cycle Time (tRC) Reserved Block Size (exclude Spare Area) Block Size (exclude Spare Area) Organization Sequential Read Cycle Time (tRC) Organization Reserved ECC Level Requirement Reserved Number of Planes per CE Number of Planes per CE Plane Size Reserved Reserved 7 Ver.01, Aug 5, 2014 APPLICATION NOTE Replacing Toshiba TC58NVG1S3H with Macronix MX30LF2G18AC 8. Power-Up Timing Macronix and Toshiba power-up sequences are similar, but the timing is slightly different. Although both devices use 2.7V (VCC min.) as the start point, timing references are different. Check the system timing to determine if adjustments are needed. Table 8-1: Power-Up Timing H/W Timing Characteristic Vcc (min.) to WE# low Vcc (min.) to R/B# high Vcc (min.) to R/B# low Vcc ramp start to R/B# low Macronix MX30LF2G18AC 1ms (max.) N/A 10us (max.) N/A Toshiba TC58NVG1S3H N/A 100us (max.) 1ms (max.) N/A Vcc(min.) VCC WE# R/B# Figure 8-1: Power-Up Timing 9. Summary Macronix MX30LF2G18AC and Toshiba TC58NVG1S3H NAND have similar features, pinouts, and share basic Read/Program/Erase commands. Firmware modifications to accommodate differences in ECC requirements, which result in different OOB sizes, may be needed. P/N: AN-0329 8 Ver.01, Aug 5, 2014 APPLICATION NOTE Replacing Toshiba TC58NVG1S3H with Macronix MX30LF2G18AC 10. Reference Table 10-1 shows the datasheet versions used for comparison in this application note. For the most current, detailed Macronix specification, please refer to the Macronix website at http://www.macronix.com Table 10-1: Datasheet Version Datasheet Location MX30LF2G18AC TC58NVG1S3HTAI0 TC58NVG1S3HBAI4 Date Issue Jul. 04, 2014 Jan. 18, 2013 Jan. 18, 2013 - - Revision Rev. 0.01 Rev. 1.0 Rev. 1.0 Note: Macronix data sheet is subject to change without notice. 11. Appendix Cross Reference Table 11-1 shows basic part number and package information for the Macronix MX30LF2G18AC and Toshiba TC58NVG1S3H product. Table 11-1: Part Number Cross Reference Density Macronix Part No. Toshiba Part No. MX30LF2G18AC-TI TC58NVG1S3HTAI0 2Gb MX30LF2G18AC-XKI TC58NVG1S3HBAI4 Package Dimension 48-TSOP 12x20mm 63-VFBGA 9x11x1.0mm 12. Revision History Revision 1.0 P/N: AN-0329 Description Initial Release 9 Date Aug. 05, 2014 Ver.01, Aug 5, 2014 APPLICATION NOTE Replacing Toshiba TC58NVG1S3H with Macronix MX30LF2G18AC Except for customized products which have been expressly identified in the applicable agreement, Macronix's products are designed, developed, and/or manufactured for ordinary business, industrial, personal, and/or household applications only, and not for use in any applications which may, directly or indirectly, cause death, personal injury, or severe property damages. In the event Macronix products are used in contradicted to their target usage above, the buyer shall take any and all actions to ensure said Macronix's product qualified for its actual use in accordance with the applicable laws and regulations; and Macronix as well as it’s suppliers and/or distributors shall be released from any and all liability arisen therefrom. Copyright© Macronix International Co., Ltd. 2014. All rights reserved, including the trademarks and tradename thereof, such as Macronix, MXIC, MXIC Logo, MX Logo, Integrated Solutions Provider, NBit, Nbit, NBiit, Macronix NBit, eLiteFlash, HybridNVM, HybridFlash, XtraROM, Phines, KH Logo, BE-SONOS, KSMC, Kingtech, MXSMIO, Macronix vEE, Macronix MAP, Rich Au-dio, Rich Book, Rich TV, and FitCAM. The names and brands of third party referred thereto (if any) are for identification purposes only. For the contact and order information, please visit Macronix’s Web site at: http://www.macronix.com P/N: AN-0329 10 Ver.01, Aug 5, 2014