Preliminary APPLICATION NOTE Migrating from MX60LF8G28AB to MX60LF8G18AC 1. Introduction This application note is a guide for migrating Macronix from the MX60LF8G28AB to the MX60LF8G18AC. Both NAND devices are 8Gb SLC NAND Flash built with two stacked 4Gb chips. The document does not provide detailed information on the individual devices, but highlights the major similarities and differences between them. The comparison covers the general features, performance, command codes and other differences. The information in this document is based on datasheets listed in Section 8. Newer versions of the datasheets may override the contents of this document. 2. General Features With the exception of the additional “Interleaved Die Operation” of the MX60LF8G18AC, both flash devices have similar features and functions as shown in Table 2-1. Feature differences are highlighted in Bold Italic type in the table. For the MX60LF8G18AC, the “Interleaved Die Operation” can be applied on to the idle die while the other die is busy. For a more detailed specification, please refer to the MX60LF8G18AC datasheet. Table 2-1. Key Features Comparison Part Name MX60LF8G28AB MX60LF8G18AC 2.7V-3.6V 2.7V-3.6V x8 x8 -40°C to 85°C -40°C to 85°C ONFI 1.0 Compliant ONFI 1.0 Compliant Page Size (2K+112)B (2K+64)B Block Size (128K+7K)B (128K+4K)B 8bit/540B 4bit/528B N/A Supported 30 Pages 30 Pages ONFI Standard ONFI Standard Guaranteed Good Blocks at Shipping Block#0 Block#0 Data Retention 10 Years 10 Years 100K Cycles 100K Cycles 48TSOP (12x20mm) 63-VFBGA (9x11mm) 48TSOP (12x20mm) 63-VFBGA (9x11mm) Voltage Bus Width Operating Temperature Interface ECC Requirement Interleaved Die Operations OTP Unique ID Endurance Package P/N: AN0365 1 REV. 1, MAR. 04, 2015 Preliminary APPLICATION NOTE 3. Electrical Performance The key performance specifications are the same for the two devices (Table 3-1). Table 3-1. Key Performance Comparison Part Name Performance Access Time MX60LF8G18AC Min. Typ. Max. Min. Typ. Max. Random (tR) - - 25us - - 25us Cache Read Busy time - 2us 25us - 2us 25us 20ns - - 20ns - - Sequential Page Program - 300us 600us - 300us 600us Program Time Cache Program Busy time - 3us 600us - 3us 600us Erase Time Block - 1ms 3.5ms - 1ms 3.5ms Standby (TTL) - - 2mA - - 2mA Standby (CMOS) - 20uA 100uA - 20uA 100uA Active Read - 20mA 30mA - 20mA 30mA Active Program - 20mA 30mA - 20mA 30mA Active Erase - 15mA 30mA - 15mA 30mA Power-up Current (Including POR Current) - - 60mA - - 60mA Input Leakage - - +/- 20uA - - +/- 20uA Output Leakage - - +/- 20uA - - +/- 20uA NOP - - 4 cycles - - 4 cycles Current Consumption Partial-Page Programs P/N: AN0365 MX60LF8G28AB 2 REV. 1, MAR. 04, 2015 Preliminary APPLICATION NOTE 4. Command Set The command set is the same for the two devices (Table 4-1). Table 4-1. Command Set Part Name MX60LF8G18AC 2nd Command Cycle 30h 1st Command Cycle 00h 2nd Command Cycle 30h Random Data Input 85h - 85h - Random Read Data Output 05h E0h 05h E0h Cache Read Random 00h 31h 00h 31h Cache Read Sequential 31h - 31h - Cache Read End 3Fh - 3Fh - Read ID 90h - 90h - Parameter Page Read (ONFI) ECh - ECh - Read Unique ID (ONFI) EDh - EDh - Get Features (ONFI) EEh - EEh - Set Features (ONFI) EFh - EFh - Reset FFh - FFh - Page Program 80h 10h 80h 10h Cache Program 80h 15h 80h 15h Block Erase 60h D0h 60h D0h Status Read 70h - 70h - Status Enhanced Read (ONFI) 78h .- 78h - Command Description Read Two-plane Program (ONFI) 80h-11h-80h-10h 80h-11h-80h-10h Two-plane Cache Program (ONFI) 80h-11h-80h-15h 80h-11h-80h-15h Two-plane Block Erase (ONFI) 60h-D1h-60h-D0h 60h-D1h-60h-D0h Set Feature followed by normal Read/Program command Set Feature followed by normal Read/Program command OTP Area Access P/N: AN0365 MX60LF8G28AB 1st Command Cycle 00h 3 REV. 1, MAR. 04, 2015 Preliminary APPLICATION NOTE 5. Status Register Comparison Status Register bit functions are the same (Table 5-1). Please refer to the Macronix datasheet for additional details. Table 5-1. Status Register Comparison Part Name MX60LF8G28AB MX60LF8G18AC SR[1] SR[2] Program/Cache program(page N)/ Erase Pass or Fail Cache Program (page N-1) Pass or Fail Not Used Program/Cache program(page N)/ Erase Pass or Fail Cache Program (page N-1) Pass or Fail Not Used SR[3] Not Used Not Used SR[4] Not Used Ready/Busy for Internal Controller Program/Erase/Read Operation Ready/Busy Write Protect Not Used Ready/Busy for Internal Controller Program/Erase/Read Operation Ready/Busy Write Protect SR[0] SR[5] SR[6] SR[7] 6. Package Pin Definition The package physical dimensions and pin definitions of the MX60LF8G28AB and the MX60LF8G18AC are identical. P/N: AN0365 4 REV. 1, MAR. 04, 2015 Preliminary APPLICATION NOTE 7. Device Identification The ID codes of the MX60LF8G28AB and MX60LF8G18AC are identical except for the last byte which is used to indicate the ECC requirement. Please note that although the two devices have the same code of “1” for the Spare Area Size (4th Byte, Bit 2), the MX60LF8G28AB has a Spare Area Size of 28 Bytes per 512 bytes, whereas the MX60LF8G18AC has a Spare Area size of 16 bytes per 512 bytes. Firmware that uses a non-ONFI detection method may need to be modified to recognize the smaller spare area of the MX60LF8G18AC device. Table 7-1. Device Identification Part Name ID Code 1st Byte 2nd Byte 3rd Byte ID Definition 4th Byte 5th Byte MX60LF8G28AB MX60LF8G18AC C2h/D3h/D1h/95h/5Bh Manufacturer ID Device ID Number of Die per CE Cell Structure Number of Concurrently Programmed Pages Interleaved Programming between multiple devices Cache program Page Size Spare Area Size (28-byte per 512-byte), bit2=1 Sequential Read Cycle Time (bit7, bit3=1,0) Block Size (Excluding spare area) Organization ECC level requirement, 8-bit ECC required (bit1:0=11b) Number of Planes per CE Plane Size Reserved C2h/D3h/D1h/95h/5Ah Manufacturer ID Device ID Number of Die per CE Cell Structure Number of Concurrently Programmed Pages Interleaved Programming between multiple devices Cache program Page Size Spare Area Size (16-byte per 512-byte), bit2=1 Sequential Read Cycle Time (bit7, bit3=1,0) Block Size (Excluding spare area) Organization ECC level requirement, 4-bit ECC required (bit1:0=10b) Number of Planes per CE Plane Size Reserved 8. References Table 8-1 shows the datasheet versions used for comparison in this application note. For the most current, detailed specification, please refer to the Macronix website at http://www.macronix.com. Table 8-1. Datasheet Versions Datasheet P/N: AN0365 Location Date Issued Revision MX60LF8G28AB Website Jan. 2015 Rev. 1.0 MX60LF8G18AC Website Feb. 2015 Rev. 0.02 5 REV. 1, MAR. 04, 2015 Preliminary APPLICATION NOTE 9. Summary The Macronix MX60LF8G28AB and MX60LF8G18AC NAND flash share the same basic Read, Program, and Erase commands and have the same package dimension and pin-outs. Migrating to the MX60LF8G18AC may require firmware modifications to accommodate differences in spare area size and ECC requirements. 10. Part Number Cross-Reference Table 10-1. Part Number Cross Reference Bus Width Voltage x8 3V Package Part Number Part Number 48-TSOP MX60LF8G28AB-TI MX60LF8G18AC-TI 63-VFBGA MX60LF8G28AB-XKI MX60LF8G18AC-XKI 11. Revision History Table 11-1. Revision History P/N: AN0365 Revision No. Description Page Date REV. 1 Initial Release ALL Feb. 06, 2015 6 REV. 1, MAR. 04, 2015 Preliminary APPLICATION NOTE Except for customized products which have been expressly identified in the applicable agreement, Macronix's products are designed, developed, and/or manufactured for ordinary business, industrial, personal, and/or household applica- tions only, and not for use in any applications which may, directly or indirectly, cause death, personal injury, or severe property damages. In the event Macronix products are used in contradicted to their target usage above, the buyer shall take any and all actions to ensure said Macronix's product qualified for its actual use in accordance with the applicable laws and regulations; and Macronix as well as it’s suppliers and/or distributors shall be released from any and all liabil- ity arisen therefrom. Copyright© Macronix International Co., Ltd. 2015. All rights reserved, including the trademarks and tradename thereof, such as Macronix, MXIC, MXIC Logo, MX Logo, Integrated Solutions Provider, NBit, Nbit, NBiit, Macronix NBit, eLiteFlash, HybridNVM, HybridFlash, XtraROM, Phines, KH Logo, BE-SONOS, KSMC, Kingtech, MXSMIO, Macronix vEE, Macronix MAP, Rich Audio, Rich Book, Rich TV, and FitCAM. The names and brands of third party referred thereto (if any) are for identification purposes only. For the contact and order information, please visit Macronix’s Web site at: http://www.macronix.com MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. P/N: AN0365 7 REV. 1, MAR. 04, 2015