IRAUDAMP3 - International Rectifier

IRAUDAMP3
120W x 6 Channel Class D Audio Power Amplifier
using IRS20124S and IRF6645
By
Jun Honda, Johan Strydom and Jorge Cerezo
Table of Contents
Page
Introduction .......................................................................................... 1
Specifications ....................................................................................... 2
Functional Description.......................................................................... 4
Protection .............................................................................................11
Typical Performance ............................................................................15
Design Documents ..............................................................................20
The IRAUDAMP3 reference design is an example of a complete six-channel 120W half-bridge
Class D audio power amplifier. The reference design is intended to demonstrate how to use the
IRS20124S, implement protection circuits, and design an optimum PCB layout using IRF6645
DirectFET® MOSFETs. The modular design consists of a motherboard with three identical daughter
boards. The resulting design requires no heat-sinking for normal operation. The reference design
includes all the required housekeeping power supplies for ease of use.
www.irf.com
Introduction
The IRAUDAMP3 reference design is an example of a complete six-channel 120W halfbridge Class D audio power amplifier. The reference design is intended to demonstrate
how to use the IRS20124S, implement protection circuits, and design an optimum PCB
layout using IRF6645 DirectFET® MOSFETs. The modular design consists of a
motherboard with three identical daughter boards. The resulting design requires no heatsinking for normal operation. The reference design includes all the required housekeeping
power supplies for ease of use.
Applications
AV receivers
Home theater systems
Mini component stereos
Sub-woofers
Features
Output power:
Residual noise:
Distortion:
Efficiency:
Multiple protection features:
PWM modulator:
www.irf.com
120W x 6 Channels, (THD = 1%)
56µV, IHF-A weighted, AES-17 filter
0.01% THD+N @ 60W, 4Ω
94% @ 120W, 4Ωsingle channel driven, Class D stage
OCP, OVP, UVP, DC protection, OTP
Self-oscillating half-bridge topology with optional clock
synchronization
1
Specifications
General Test Conditions (unless otherwise noted)
Notes / Conditions
Supply Voltage
±35V
Load Impedance
4Ω
Self-Oscillating Frequency (Adjustable)
400kHz
No input signal
Gain Setting
26dB
1Vrms input sensitivity
Electrical Data
IR Devices Used
(Typical)
Modulator
Power Supply Range
Output Power CH1-6: (1% THD+N)
Output Power CH1-6: (10% THD+N)
Rated Load Impedance
Damping Factor
Supply Current
Total Idle Power Consumption
Board Efficiency
± 25-35V
120W
170W
4Ω
40
<250mA
14W
94%
Audio Performance
THD+N, 1W
THD+N, 10W
THD+N, 60W
Dynamic Range
(Typical)
0.006%
0.005%
0.010%
112dB
Residual Noise
20Hz - 20kHz BW, A-Weighted
Channel Separation
Frequency Response : 20Hz-20kHz
: 20Hz-40kHz
Thermal Performance
Idling
2ch x 15W (1/8 Rated Power)
2ch x 120W (Rated Power)
Physical Specifications
Dimensions
97µV
56µV
87dB
72dB
±1dB
±3dB
(Typical)
TC =33°C
TPCB=42°C
TC =58°C
TPCB=77°C
TC =79°C
TPCB=101°C
Notes / Conditions
IRS20124S gate driver,
IRF6645 DirectFET MOSFET
Self-oscillating, 2nd order Sigma-Delta
modulation, analog input
1kHz
1kHz
1kHz, relative to 4Ω load
No input signal
No input signal
Single channel driven, 120W, Class D
stage
Notes / Conditions
1kHz, single channel driven
A-weighted, AES-17 filter,
channel operation
Self-oscillating – 400kHz
internal clock – 395kHz
100Hz
10kHz
single
1W, 4Ω - 8Ω Load
Notes / Conditions
No signal input, TA=25°C
Continuous
90 seconds
(Typical)
13.7”(L) x 5.0”(W)
Notes / Conditions
Note: Specifications are typical and not guaranteed.
www.irf.com
2
Connection Diagram
35V, 10A DC supply
250W, Non-inductive
4Ω
35V, 10A DC supply
4Ω
4Ω
250W, Non-inductive
4Ω
4Ω
4Ω
LED ORANGE
J10
J11
CH4
Output
CH3
Output
LED GREEN
TP1
S1
G
J5
CH1
Output
TP2
J6
CH2
Output
J4
TP1
J15
J16
CH5
Output
TP2
CH6
Output
TP1
TP2
J21
LED
Volume
LED
J9
J8
CH3
Input
R180
LED
J3
J2
CH4 CH1
Input Input
S4
J14
CH2 CH5
Input Input
J13
J17
S3
CH6
Input
Audio Signal Generator
Typical Test Setup
Pin Description
CH-1 IN
CH-2 IN
CH-3 IN
CH-4 IN
CH-5 IN
CH-6 IN
POWER
CH-1 OUT
CH-2 OUT
CH-3 OUT
CH-4 OUT
CH-5 OUT
CH-6 OUT
EXT CLK
DCP OUT
www.irf.com
J3
J2
J9
J8
J14
J13
J4
J5
J6
J10
J11
J15
J16
J17
J21
Analog Input for CH-1
Analog Input for CH-2
Analog Input for CH-3
Analog Input for CH-4
Analog Input for CH-5
Analog Input for CH-6
Positive and Negative Supply (+B / -B)
Output for CH-1
Output for CH-2
Output for CH-3
Output for CH-4
Output for CH-5
Output for CH-6
External Clock Sync
DC Protection Relay output
3
Power-on Procedure
1.
Apply ±35V at the same time
2.
Apply audio signal
Note: Improper power on procedure could result start up failure.
Power-off Procedure
1.
2.
Remove audio input signal
Turn off ±35V at the same time
Functional Description
Class D operation
Referring to CH-1 as an example, the op-amp U1 forms a front-end second-order
integrator with C1 & C2. This integrator receives a rectangular waveform from the Class
D switching stage and outputs a quadratic oscillatory waveform as a carrier signal. To
create the modulated PWM, the input signal shifts the average value of this quadratic
waveform (through gain relationship between R28 and R9 + R1) so that the duty varies
according to the instantaneous value of the analog input signal. The signal is then
quantized by the threshold of the CMOS inverter U2. The transistor Q1 level-shifts the
PWM signal down to the IRS20124S gate-driver (referenced to –B) which internally splits
this signal into two signals, with opposite polarity and added deadtime, for high-side and
low-side MOSFET gate signals respectively.
The IRS20124S drives two IRF6645 DirectFET MOSFETs in the power-stage to provide
the amplified digital PWM waveform. The amplified analog output is re-created by
demodulating the amplified PWM. This is done by means of the LC low-pass filter (LPF)
formed by L1 and C18, which filters out the Class D switching carrier signal.
Feedback
Σ
U1
U2
Integrator
Comparator
Daughter board
+B
U1
LPF
GND
Q1
Level
Shifter
IRS20124S
Gate
Driver
IRF6645
-B
Simplified block diagram of Class D amplifier
www.irf.com
4
Power Supplies
The IRAUDAMP3 has all the necessary housekeeping power supplies onboard and only
requires a pair of symmetric dual power supplies ranging from ±25V to ±35V (+B, GND, B) for operation. The internally generated housekeeping power supplies include a ±5V
supply for signal processing, while a +12V supply, referenced to –B, is included to
supply the Class D gate driver stage.
For the externally applied power, a regulated power supply is preferable for performance
measurements, but not always necessary. The bus capacitors, C16-17 (C40-41, C6464), on the board along with high-frequency bypass caps, C88-89 (C90-91, C92-93) are
designed to take care of the high-frequency ripple-current components from switching
action only. A set of bus capacitors having enough capacitance to handle the audio
ripple current must be placed outside the board if an unregulated power supply is used.
At initial power-on, the shutdown condition (orange LED) will latch for about three
seconds before starting normal operation. Always apply supply voltages before applying
any audio signals and always remove audio signals prior to removing the power
supplies.
Bus Pumping
Since the IRAUDAMP3 is a half bridge configuration, bus pumping occurs when the
amplifier outputs a low frequency signal below 100Hz. Under normal operation during
one half cycle, energy flows from one supply, through the load and into the other supply,
thus causing a voltage imbalance by pumping up the bus voltage. This condition is
reversed during the next half cycle (resulting in bus pumping of the other supply). Bus
pumping is worsened under the following conditions:
–
Lower frequency (bus pumping continues longer)
–
Higher power / output voltage and / or lower load impedance (more energy is
transferred between supplies)
–
Smaller bus capacitors (the same energy will cause a larger voltage increase)
The IRAUDAMP3 has protection features that will shutdown the switching operation if
the bus voltage becomes too high (> 40V) or too low (< 20V). One of the easiest
countermeasures is to drive both of the channels out of phase so that the energy flow
from one channel is consumed by the other and does not return to the power supply.
Input
A proper input signal is an analog signal below 20kHz, up to ±3.5V peak, having a
source impedance of less than 600Ω. A 30kHz to 60kHz input signal can cause LC
resonance in the output LPF, resulting in an abnormally large amount of reactive current
flowing through the switching stage (especially at 8Ω or open load), causing OCP
activation. The IRAUDAMP3 has an RC (Zobel) network, to damp the resonance and
protect the board in such a condition. However, these supersonic input frequencies
should be avoided. The input to each of the six channels is made using a separate mono
RCA connector. Although all six channels share a common ground, it is necessary to
connect each channel separately to limit noise and crosstalk between channels.
www.irf.com
5
Output
All the outputs for the IRAUDAMP3 are single-ended and therefore have terminals
labeled (+) and (-) with the (-) terminal connected to Power Ground. Each channel is
optimized for a 4Ω speaker load for a maximum output power (120W), but is capable of
operating with higher load impedances, at reduced power, at which point, the frequency
response will have a small peak at the corner frequency of the output LC LPF. The
IRAUDAMP3 is stable with capacitive loading, however, it should be realized that the
frequency response will be degraded by heavy capacitive loading of more than 0.1µF
Gain Setting / Volume Control
The IRAUDAMP3 has an internal volume control (potentiometer R156 labeled
‘VOLUME’) for gain adjustment. Gain settings for all six channels are tracked and
controlled by the volume control IC setting the gain from the micro controller IC, U1. The
maximum volume setting (fully clockwise) corresponds to a total gain of +37.9dB
(78.8V/V). The total gain is a product of the power stage gain, which is a constant
+23.2dB, and the input-stage gain is directly controlled by the volume adjustment. The
volume range is about 100dB with minimum volume setting to ‘mute’ the system with an
overall gain of less than -60dB. For best performance in your testing, the internal volume
control should be set to a gain of 21.9V/V, or 1Vrms input will result in rated output
power (120W into 4Ω),allowing for a >11dB overdrive.
Self-Oscillating PWM modulator
The IRAUDAMP3 Class D audio power amplifier is based on a self-oscillating type PWM
modulator for the lowest component count and a robust design. This topology is
basically an analog version of a second-order sigma-delta modulation having a Class D
switching stage inside the loop. The benefit of Sigma-Delta modulation in comparison to
the carrier signal-based modulator is that all the error in the audible frequency range is
shifted away into the inaudible upper frequency range by the nature of its operation, and
applies a sufficient amount of correction.
The self-oscillating frequency is a determined by the total delay time in the control loop
of the system. The delay of the logic circuits, the IRS20124S gate-driver propagation
delay, the IRF6645 DirectFET MOSFET switching speed, the time constant of the front
end integrator (e.g. R15 + R19, C1 and C2 for Ch-1) and supply-voltages are all critical
factors of the self-oscillating frequency. Under nominal conditions, the switchingfrequency is around 400kHz with no audio input signal.
Adjustments of Self-Oscillating Frequency
The PWM switching frequency in this type of self-oscillating scheme greatly impacts
audio performance, both in absolute frequency and frequency relative to the other
channels. At higher frequencies, distortion due to switching time becomes significant,
while at lower frequencies, the bandwidth of the amplifier suffers. In relative terms,
interference between channels is most significant if the relative frequency difference is
within the audible range. Normally when adjusting the self-oscillating frequency of the
different channels, it is best to either match the frequencies accurately, or have them
separated by at least 25kHz. In this design, it is possible to change the self-oscillating
frequency from about 180kHz up to 470kHz.
www.irf.com
6
Potentiometers for adjusting self-oscillating frequency
Component Number
Adjustment
R19
Switching Frequency for CH-1*
R20
Switching Frequency for CH-2*
R54
Switching Frequency for CH-3*
R55
Switching Frequency for CH-4*
R86
Switching Frequency for CH-5*
R87
Switching Frequency for CH-6*
*Adjustments have to be done at an idling condition with no signal input.
Switches and Indicators
There are three different indicators on the reference design:
– An orange LED, signifying a fault / shutdown condition when lit
– A green LED on the motherboard indicates power is applied to the motherboard
– Green LEDs on each of the three daughter boards, signify power is on
There are three switches on the reference design:
– Switch S1 is a “Shutdown” push-button. Pushing this button has the same effect as
having a fault condition. The circuit will re-start about 3 seconds after the shutdown
button is released.
– Switch S2: Internal clock-sync frequency selector. This feature demonstrates
avoiding AM radio interference by slightly modifying the switching frequency. With
S3 is set to INT, the two settings ‘H’ and ‘L’ will modify the internal clock frequency
by about 20kHz to 40kHz, either higher ‘H’ or lower ‘L’. The actual internal
frequency is set by potentiometer R180 - ‘INT OSC FREQ’.
– Switch S3: Oscillator selector – This 3-position switch selects between the internal
self oscillator (‘SELF’), internal- (‘INT’) or external clock-sync (‘EXT’).
Switching Frequency Lock / Synchronization Feature
For single-channel operation, the self-oscillating switching scheme will yield the best
audio performance. The self-oscillating frequency does, however, change with duty ratio.
This varying frequency can interfere with AM radio broadcasts. A constant switching
frequency, with its harmonics that are shifted away from the AM carrier frequency, is
preferred.
Apart from AM broadcasts, the addition of multiple channels can also reduce audio
performance at low power, and can lead to increased residual noise. Both characteristics
of the self-oscillating switching scheme can be improved through the addition of clock
frequency locking / synchronization.
Please note that the switching frequency lock / synchronization feature is not possible for
all frequencies and duty ratios, but only operates within a limited frequency and dutyratio range below the self-oscillating frequency (see figure below).
www.irf.com
7
450
Self-oscillating frequency
Frequency (kHz)
400
Self-Osc.(kHz)
Clk @ 250kHz
Clk @ 275kHz
350
Clk @ 300kHz
Lock frequency range
Clk @ 325kHz
300
Clk @ 350kHz
Clk @ 375kHz
Clk @ 395kHz
250
200
10
20
30
40
50
60
70
80
90
Duty-ratio (%)
Typical lock frequency range vs. PWM duty ratio for different internal clock frequencies
(Self-oscillating frequency set to 400kHz with no input)
Considering the THD+N ratio vs. output power results below, it can be seen that having
all channels driven (ACD) with the self oscillator, noise levels increase, especially below
the 5W range. Residual noise doubles (see Specifications – Audio Performance)
compared to having only a single channel driven. By locking the oscillator frequency,
the residual noise can be lowered to that of a single channel driven system. The output
power range, for which the frequency locking is successful, depends on how much lower
the locking frequency is with respect to the self-oscillating frequency. As the locking
frequency is lowered (from 395kHz to 350kHz and then 300kHz), the output power range
(where locking is achieved) is extended. Once locking is lost, however, the audio
performance is reduced, with lower locking frequencies leading to larger THD.
In the IRAUDAMP3, this switching frequency lock / synchronization feature can be
achieved through the use of either an internal or an external clock input (selectable
through S3). If internal (INT) clock is selected, the internally generated clock signal will
be used and can be adjusted by setting potentiometer R180 - ‘INT OSC FREQ’. If
external (EXT) clock signal is selected, a 0-5V, square-wave (50% duty-ratio) logicsignal must be applied to J17.
Offset Null (DC Offset)
The IRAUDAMP3 has been designed such that no output-offset nulling is required. The
reference boards will have DC offsets tested to be less than ±50mV.
www.irf.com
8
100
50
20
10
5
%
2
1
0.5
Int. Clk.. (ACD) @ 300kHz
0.2
Self Osc. (ACD) @ 400kHz
0.1
0.05
Int. Clk.. (ACD) @ 395kHz
Int. Clk.. (ACD) @ 350kHz
0.02
0.01
0.005
0.002
0.001
100m
Self Osc. (Single Channel Driven)
200m
500m
1
2
5
10
20
50
100
200
W
THD+N ratio vs. output power for different switching frequency lock / synchronization conditions
Gate Driver IC
The IRAUDAMP3 uses the IRS20124S, which is a high-voltage (200V), high-speed
power MOSFET gate driver with internal deadtime and shutdown functions specially
designed for Class D audio amplifier applications. In this design, deadtime can be
minimized to optimize performance while limiting shoot-through. Because of this, there is
no gate timing adjustment on the board. Selectable deadtime through the DT/SD pin
voltage is an easy and reliable function which requires only two external resistors, R1
and R2. The bi-directional current sensing feature is also selected externally by resistors
R3, R4, and R5 and can protect the IRS20124S and shutdown the DirectFET MOSFETs
during over-current conditions.
System-level view of gate driver IRS20124S
www.irf.com
9
Selectable Deadtime
The DT/SD pin provides two functions: 1) setting deadtime and 2) selecting shutdown.
The IRS20124S determines its operation mode based on the voltage applied to the
DT/SD pin. An internal comparator translates which mode is being used by comparing
internal reference voltages. Threshold voltages for each mode are set internally by a
resistive voltage divider off VCC, negating the need for a precise, absolute voltage to set
the mode.
1) Threshold voltages for the mode selection are set internally, based on different ratios
of VCC as indicated in the diagram below. In order to avoid drift from the input bias
current of the DT/SD pin, a bias current of greater than 0.5mA is suggested for the
external resistor divider circuit. Suggested values of resistance that are used to set a
deadtime are given below. Resistors with up to 5% tolerance can be used.
Deadtime / operation mode settings vs VDT/SD voltage
Dead-time mode
DT1
DT2
DT3
DT4
Dead-time
~15ns
~25ns
~35ns
~45ns
R1
<10kΩ
3.3kΩ
5.6kΩ
8.2kΩ
R2
open
8.2kΩ
4.7kΩ
3.3kΩ
DT/SD voltage
1.0 x VCC
0.71 x VCC
0.46 x VCC
0.29 x VCC
Default
2) In Shutdown mode, both MOSFETs are turned off simultaneously to stop operation
and protect the circuit during fault conditions. If the DT/SD pin detects an input voltage
below the threshold, 0.23 x VCC, the IRS20124S will output 0V at both HO and LO
outputs, forcing the switching output node to go into a high impedance state.
www.irf.com
10
Protection
The IRAUDAMP3 includes protection features for over-voltage (OVP), under-voltage
(UVP), over-current (OCP), DC-voltage (DCP) and over-temperature protection (OTP).
The OVP, DCP, OCP and OTP uses OR logic and will shutdown the output power
amplifier (MOSFETs) if any one or more protection feature is activated (by pulling the
DT/SD pin low). Once a fault condition is detected and the power amplifier is shutdown,
the shutdown pin will remain low (latched) for about three seconds. If a fault is not
cleared, or re-occurs after the restart of the power amplifier, the DT/SD pin will again
latch. Thus this circuit will hiccup until the fault is removed.
The under-voltage protection (UVP) is separate from the above protection circuit and
operates by turning off the VCC into to the IRS20124S once the input voltage drops too
low. When VCC starts dropping to zero, the UVLO protection within the IRS20124S will
shutdown the power amplifier.
Resetting the Protection Circuit
The IRAUDAMP3 has a number of protection circuits to safeguard the system and
speakers during operation. If any fault condition is detected, the Shutdown circuit will
latch for about three seconds, during which time the orange LED will turn on. If the fault
condition has not cleared, the protection circuit will hiccup until fault is removed. There is
no manual reset option.
DC Voltage Protection (DCP)
DC voltage output protection is provided to protect the speakers from DC current. This
abnormal condition is rare and is likely caused when the power amplifier fails and one of
the high-side or low-side IRF6645 MOSFETs remain in the ON state. DC protection is
activated if the output has more than ±4VDC offset (typical). Under this fault condition,
the feeding power supplies must be shutdown. Since these are external to the reference
design board, an isolated relay is provided (P1) for further systematic evaluation of DC
voltage protection to transmit this condition to the power supply controller and is
accessible through connector J21 (Pins of J21 are shorted during fault condition).
Functional block diagram of protection circuit implementation
www.irf.com
11
Over-Voltage Protection (OVP)
Over-voltage protection will shutdown the amplifier if the bus voltage between GND and
+B exceeds 40V. The threshold is determined by the sum of the Zener diode voltage of
Z11 and the VBE of Q11. As a result, it protects the board from bus-pumping at very low
audio signal frequencies by shutting down the amplifier. OVP will automatically reset
after three seconds. The isolated relay is also activated during this fault condition.
Since the +B and –B supplies are normally symmetrical, (bus pumping, although
asymmetrical in time, will pump the bus symmetrically in voltage level.) it is considered
sufficient to only sense one of the two supply voltages for OVP.
Over-Current Protection (OCP)
The internal over-current protection shuts down the IRS20124S if a trip threshold-level of
the bi-directional current-sensing circuit is exceeded. When this fault occurs, the OC-pin
is pulled low for at least 100ns. To keep the IRS20124S from re-starting, the OC-pin
output is fed back to the DT/SD pin, using the three second latch.
Bi-directional Over-Current Sensing
The bi-directional current sensing block has an internal 2.21V level shifter feeding the
signal to a comparator. The OCSET1 pin sets the positive current threshold, and is given
a trip level at VSOC+, which is OCSET1 - 2.21V. In the same way, the OCSET2 pin,
VSOC- is set at OCSET2 – 2.21V.
LO
Vs
OCSET1
+
-
OR
OCSET2
AND
OC
+
-
Simplified functional block diagram of bi-directional current sensing
How to Set OC-Threshold
The external resistors R3, R4, and R5 are used as voltage dividers to set OCSET1 and
OCSET2. The trip threshold voltages, VSOC+ and VSOC-, are determined by the
required trip current levels, ITRIP+ and ITRIP-, and the device on-resistance, RDS(on), in
the low-side MOSFET. Please note that since the on-resistance of the low-side
MOSFET is temperature dependent, the actual over-current trip level will decrease as
the MOSFET heats up.
www.irf.com
12
Since the sensed voltage of Vs is shifted up by 2.21V internally and compared with the
voltages fed to the OCSET1 and OCSET2 pins, the required value of OCSET1 with
respect to COM is:
VOCSET1 = VSOC+ + 2.21 = ITRIP+ x RDS(ON) + 2.21
The same relation holds between OCSET2 and VSOC-:
VOCSET2 = VSOC- + 2.21 = ITRIP- x RDS(ON) + 2.21
On the reference design, the values of R3, R4 and R5 have been set to 10.0kΩ, 1.30kΩ
and 1.74kΩ respectively. These values result in VSOC+ and VSOC- limits of ±0.60V and
for an RDS(ON) of 28mΩ (from datasheet of IRF6645), a over-current trip level of
approximately 21A is achieved.
Please refer to the IRS20124S data sheet for a complete description and method for
choosing R3, R4 and R5.
Due to the duty cycle limitation in bi-directional current sensing in the IRS20124, the
OCP will work up to 100W. For short-circuit protection beyond this, a number of
alternative solutions can be implemented. These include using either external currentsensing or alternative gate driver IC having current-sensing function that measure both
HS and LS MOSFET currents independently, such as the IRS20954.
Over-Temperature Protection (OTP)
A separate PTC resistor is placed in close proximity to the IRF6645 DirectFET
MOSFETs on each daughter board for each of the amplifier channels. If the resistor
temperature rises above 100°C, the OTP is activated. This temperature protection limit
yields a PCB temperature at the MOSFETs of about 100°C. This temperature protection
limit is due to the use of FR4 as a substrate material.
Under-Voltage Protection (UVP)
Under-voltage protection will shutdown the amplifier if the bus voltage between GND and
+B falls below 20V by cutting of the VCC supply to the IRS20124S IC. If the supply to the
IC drops below 9V (typical), the UVLO within the IC will shutdown the power amplifier.
Bridged Output
The IRAUDAMP3 is not intended for BTL operation. However, the BTL operation can be
achieved by connecting the speaker load between the ‘+’ terminals of two adjacent
channels and feeding the same input signal to both channels (with one input signal
inverted). In BTL operation, minimum load impedance is 8Ω, rated power is 240W, nonclipping.
www.irf.com
13
Thermal Considerations
From the nature of typical music signals, while the instantaneous power can reach
>120W, the average power is limited to 1/8th of rated power. This is generally considered
to be the normal operating condition in safety standards and the IRAUDAMP3 requires
no heatsinking under normal operation. For higher average power conditions, however,
additional cooling would be required.
100%
10% THD+N
95%
1% THD+N
Power Stage Efficiency (%)
90%
85%
80%
75%
70%
65%
60%
55%
50%
0
20
40
60
80
100
120
140
160
180
Output Power (W)
Efficiency vs. output power, 4Ω single channel driven, Tambient = 25°C
77°C
58°C
Thermal image of daughter board running at 2ch x 1/8th rated power - steady state, TC < 58°C
www.irf.com
14
Typical Performance
±B supply = ±35V, load impedance = 4Ω, 1kHz audio signal,
Self Oscillator @ 400kHz and internal volume control set to give required output with
1Vrms input signal, unless otherwise noted.
International Rectifier
A-ATHD+Nvs FREQUENCY
11/21/05 19:23:40
+4
+2
8Ω
+0
4Ω
-2
d
B
r
-4
-6
A
-8
-10
-12
-14
20
50
100
200
500
1k
2k
5k
10k
20k
50k
100k
200k
Hz
Green
Yellow
CH1 - 4Ω, 2V Output
CH1 - 8Ω, 2V Output
Frequency characteristics vs. load impedance
International Rectifier
A-A FREQUENCY RESPONSE
12/19/05 09:27:51
+0
-10
-20
-30
-40
-50
d
B
-60
-70
-80
-90
-100
-110
Self
Int.
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Red
Green
CH2 – CH1, 60W, Self Oscillator @ 400kHz
CH2 – CH1, 60W, Internal Clock @ 395kHz
Channel separation vs. frequency
www.irf.com
15
International Rectifier
A-A THD+Nvs POWER
100
50
11/21/05 18:55:20
T
20
10
5
%
±30V
2
1
0.5
±25V
0.2
0.1
0.05
0.02
0.01
0.005
±35V
0.002
0.001
100m
200m
500m
1
2
5
10
20
50
100
200
W
Green
Yellow
Red
CH1, ±B = ±35V, Volume gain 21.9V/V
CH1, ±B = ±30V, Volume gain 21.9V/V
CH1, ±B = ±25V, Volume gain 21.9V/V
THD+N ratio vs. output power
International Rectifier
A-A THD+Nvs POWER
100
50
11/21/05 18:37:01
T
20
10
5
%
±30V
2
1
0.5
±25V
0.2
0.1
0.05
0.02
0.01
0.005
±35V
0.002
0.001
100m
200m
500m
1
2
5
10
20
50
100
200
W
Green
Yellow
Red
CH1 - ACD, ±B = ±35V, Volume gain 21.9V/V
CH1 - ACD, ±B = ±30V, Volume gain 21.9V/V
CH1 - ACD, ±B = ±25V, Volume gain 21.9V/V
THD+N ratio vs. output power (ACD)
www.irf.com
16
International Rectifier
A-A THD+Nvs FREQUENCY
11/21/05 19:06:25
100
50
20
10
5
%
2
1
0.5
0.2
0.1
0.05
0.02
0.01
0.005
100W
10W
1W
0.002
0.001
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Green
Yellow
Red
CH1, 1W Output
CH1, 10W Output
CH1, 100W Output
THD+N ratio vs. frequency
International Rectifier
A-A THD+Nvs FREQUENCY
11/21/05 19:11:56
100
50
20
10
5
%
2
1
0.5
0.2
0.1
0.05
0.02
0.01
0.005
100W
1W
10W
0.002
0.001
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Green
Yellow
Red
CH1 - ACD, 1W Output
CH1 - ACD, 10W Output
CH1 - ACD, 100W Output
THD+N ratio vs. frequency (ACD)
www.irf.com
17
International Rectifier
A-A FFT SPECTRUMANALYSIS
11/22/05 10:27:21
+0
-10
-20
-30
-40
d
B
V
-50
-60
-70
-80
Self
-90
-100
-110
Int.
-120
10
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Green
Red
CH1 - ACD, 1V, 1kHz, Self Oscillator @ 400kHz
CH1 - ACD, 1V, 1kHz, Internal Clock @ 395kHz
Frequency spectrum (ACD)
International Rectifier
A-A FFT SPECTRUMANALYSIS
11/22/05 10:24:57
+0
-10
-20
-30
-40
d
B
V
-50
-60
-70
-80
Self
-90
-100
-110
-120
10
Int.
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Green
Red
CH1 - ACD, No signal, Self Oscillator @ 400kHz
CH1 - ACD, No signal, Internal Clock @ 395kHz
Residual noise (ACD)
www.irf.com
18
60W / 4Ω, 1kHz, THD+N=0.009%
174W / 4Ω, 1kHz, THD+N=10%
Measured output and distortion waveforms
Inductor current
OC pin
VS pin
VS pin
Inductor current
SD pin
OC pin
SD pin
Typical OCP waveforms showing OC output and SD input
www.irf.com
19
IRAUDAMP3 Design Documents
Motherboard Schematics:
Housekeeping and protection circuits
www.irf.com
20
Audio channels 1 and 2
www.irf.com
21
Audio channels 3 and 4
www.irf.com
22
Audio channels 5 and 6
www.irf.com
23
Daughter Board Schematics:
Daughter-board schematic with Class D stage for 2 audio channels
www.irf.com
24
IRAUDAMP3 Bill of Materials
Motherboard:
IRAUDAMP3 MOTHERBOARD BILL OF MATERIAL
NO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Designator
C1, C2, C3, C4
C5, C6, C30, C31, C54, C55
C7, C8, C10, C11, C32, C33, C35, C36, C56,
C57, C59, C60
C9, C12, C13, C14, C24, C25, C48, C49,
C72, C73, C146
C16, C17, C40, C41, C64, C65
C18, C19, C42, C43, C66, C67
C18_2, C19_2, C42_2, C43_2, C66_2,
C67_2
C20, C21, C130, C131, C132, C133
C22, C126, C127, C128, C129, C137
C23, C80
C26, C27, C28, C29, C50, C51, C52, C53
C46, C58, C70, C74, ,C75, C76, C77, C78,
C79, C81, C99, C100, C101, C110, C111,
C116, C121, C122
C82, C83, C84, C85, C86, C87
C88, C89, C90, C91, C92, C93
C94, C95
C96
C97, C117
C98, C124
C118
C119
C120
C123
C125, C134, C135, C136, C138, C139
D1, D2, D4, D5, D6, D7, D8, D10, D11, D12,
D13, D14, D15, D16, D17,D18, D19, D20,
D21
D3
D30, D31
HS1
J1, J7, J12
J2, J3, J8, J9, J13, J14
J4
J5, J6, J10, J11, J15, J16
J17
J18, J19, J20
J21
L1, L2, L3, L4, L5, L6
LED GR
LED ORANGE
P1
Q1, Q2, Q3, Q7, Q8, Q13, Q14, Q19, Q20,
Q26
Q4, Q5, Q9
Q6, Q10, Q11
Q27
R1, R5, R36, R40, R68, R72, R117
R2, R3, R4, R6, R7, R8, R14, R32, R37, R38,
R39, R41, R42, R43, R69, R70, R71, R73,
R74, R75, R96, R143, R168, R175, R191
R9, R11
R10, R13, R45, R112, R114, R118, R119,
R120, R176, R186, R187, R190
R12, R25, R139, R140, R141, R142
R15, R17, R50, R52, R67, R82, R84, R107,
R111, R121, R129, R154, R163, R172,
R179, R205
R16, R18, R21, R22, R23, R24, R51, R53,
R56, R57, R58, R59, R83, R85, R88, R89,
R90, R91, R122, R123, R125, R126, R136,
R137
R19, R20, R54, R55, R86, R87
www.irf.com
#
4
6
12
Footprint
1206
AXIAL0.19R
CR3225-1210
PartType
1nF, 200V
150pF, 500V
3.3uF, 50V
Part No
PCC2009CT-ND
338-1052-ND
445-1432-1-ND
11
0805
OPEN
OPEN
6
6
6
RB5/10
AXIAL0.2R
CAP MKP
470uF,50V
CAP
0.47uF, 250V
01E9650
OPEN
495-1298-ND
Newark
6
6
2
8
18
AXIAL0.3R
0805
RB2/5-16V
0805
RB2/5
0.1uF, 63V
120pF, 50V
100uF, 16V
1nF, 200V
10uF, 50V
BC2054-ND
PCC121CGCT-ND
493-1283-ND
PCC1997CT-ND
03B2235
Digikey
Digikey
Digikey
Digikey
Newark
6
6
2
1
2
2
1
1
1
1
6
19
CR3225-1210
AXIAL0.1R
0805
0805
0805
0805
0805
0805
0805
1206
1206
SOD-123
4.7uF, 25V
CAP
0.1uF, 50V
47pF, 50V
4.7uF, 16V
10nF, 50V
1nF, 50V
1500pF, 50V
220pF, 50V
47nF, 50V
0.1uF, 50V
1N4148
PCC2251CT-ND
OPEN
PCC1840CT-ND
PCC470CGCT-ND
PCC2323CT-ND
PCC103BNCT-ND
PCC102CGCT-ND
PCC2004CT-ND
PCC1953CT-ND
311-1178-1-ND
PCC104BCT-ND
1N4148WDICT-ND
Digikey
1
2
1
6
6
1
6
1
6
1
6
1
1
1
10
SOD-123
SOD-123
Heat_S6in1
CON EISA31
CP1418
J HEADER3
MKDS5/2-9.5
BNC-RA-CON
CON_POWER
ED1567
INDUCTOR
Led rb2/5
Led rb2/5
DIP-6
SOT23-BCE
MA2YD2300LCT-ND
294-1086-ND
A26453-ND
CP-1418-ND
277-1272-ND
277-1271-ND
A24497-ND
A26454-ND
ED1567
Custom made
404-1109-ND
404-1107-ND
PVT412-ND
MMBT5401DICT-ND
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
3
3
1
7
25
SOT23-BCE
SOT23-BCE
SOT89
1206
0805
MMBT5551
MMBT3904
FX941
1K
1K
MMBT5551DICT-ND
MMBT3904DICT-ND
FCX491TR-ND
P1.0KECT-ND
P1.0KACT-ND
Digikey
Digikey
Digikey
Digikey
Digikey
2
12
CR5025-2010
0805
46.4K, 1W
10K
01H0485
P10KACT-ND
Newark
Digikey
6
16
1206
0805
2.2K
100R
P2.2KECT-ND
P100ACT-ND
Digikey
Digikey
24
0805
4.7R
P4.7ACT-ND
Digikey
6
POT_SRM
1K
3361P-102GCT-ND
Digikey
OPEN
MA2YD2300LCT
HEAT SINK
CON EISA31
1418-ND
277-1272
277-1022
BNC
CON_POWER
ED1567
18uH
404-1109
404-1107
PVT412
MMBT5401
Vender
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
25
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
R26, R27, R31, R65, R66, R113, R150,
R151, R152, R181, R182, R183, R184
R28, R29, R60, R61, R92, R93
R30, R62, R79, R81, R97, R98, R130, R131,
R133, R145, R153, R164, R165, R169,
R170, R177, R189, R198, R199, R200
R33, R44, R46, R76, R78, R100, R101,
R102, R103, R104, R105, R146, R197
R34, R35, R193, R194, R195, R196
R94, R109, R127, R132, R135, R166, R216
R95, R99, R134, R155, R167, R171
R106
R108, R110, R218, R219
R115, R147
R116
R156
R178
R180
R188
R206, R207, R210, R211, R214, R215
R217
S1
S2
S3
TP
U1, U4, U7, U10, U11, U12
U2, U3, U5, U6, U8, U9, U17, U18, U19, U20,
U21, U22
U13
U14
U15
U16
U_1
U_2, U_3, U_4
U_5
W43, W51, W52, W53, W67, W68, W77,
W78, W96, W97, W101, W102, W104
W2, W3, W4, W6, W7, W8, W10, W11, W12,
W30, W54, W57, W91, W92, W93, W98,
W99, W100, W106, W109
W41
W14, W23, W34, W39, W40, W42, W59,
W103, W107
W16, W18, W36, W50, W56, W60, W69,
W81, W105
W45, W46, W62, W72
W22, W25, W27, W55, W85, W90, W95
W24, W47, W49, W63, W65, W66, W73,
W75, W76, W84
W44, W61, W71, W74, W94, W108
W20, W58, W79, W87, W88, W89
Z1
Z7, Z9
Z8
Z11
Z12
Volume control knob
Thermalloy with screw
Standoffs
screw
Washer Lock
13
0805
100K
P100KACT-ND
Digikey
6
20
1206
0805
3.3K
47R
P3.3KECT-ND
P47ACT-ND
Digikey
Digikey
13
0805
47K
P47KACT-ND
Digikey
6
7
6
1
4
2
1
1
1
1
1
6
1
1
1
1
1
6
12
2512
0805
1206
1206
2512
0805
1206
V_CONTROL
1206
POT
0805
0805
1206
SWITCH
SW-EG1908
SW-EG1944
OPEN
SO-8
SOT25
10, 1W
10R
4.7R
47K
47R, 1W
4.7K
10K
CT2265-ND
100R
5K POT
390R
OPEN
0R
SW-PB
SW_H-L
SW-3WAY_AB
OPEN
TLC081
74AHC1G04
PT10XCT
P10ACT-ND
P4.7ECT-ND
P47KECT-ND
PT47XCT-ND
P4.7KACT-ND
P10KECT-ND
CT2265-ND
P100ECT-ND
3362H-502-ND
P390ACT-ND
OPEN
P0.0ECT-ND
P8010S-ND
EG1908-ND
EG1944-ND
OPEN
299-7264-1-ND
296-1089-1-ND
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
MC78M12
MC78M05
MC79M05
MN13821TP
3310IR01
CS3310
74HC04
Jumper
MC78M12CTOS-ND
MC78M05CTOS-ND
MC79M05CTOS-ND
MN13821TPCT-ND
3310IR01
73C8016
296-1189-1-ND
ZO-1/8W-T
Digikey
Digikey
Digikey
Digikey
Japan*
Newark
Digikey
Digikey
1
1
1
1
1
3
1
27
TO-220 FULLPAK
TO-220 FULLPAK
TO-220 F
SOT23-123
N8A
SOIC16
M14A
J1-750
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
20
J1-975
Jumper
ZO-1/8W-T
Digikey
1
9
J1-720
J1-570
Jumper
Jumper
ZO-1/8W-T
ZO-1/8W-T
Digikey
Digikey
9
J1-650
Jumper
ZO-1/8W-T
Digikey
4
7
10
J1-350
J1-200
J1-300
Jumper
Jumper
Jumper
ZO-1/8W-T
ZO-1/8W-T
ZO-1/8W-T
Digikey
Digikey
Digikey
6
6
1
2
1
1
1
1
3
5
5
5
J1-430
J1-500
SOD-123
DL-41
SOD-123
SOD-123
SOD-123
Jumper
Jumper
18V
4.7V
15V
39V
24V
ZO-1/8W-T
Digikey
ZO-1/8W-T
Digikey
BZT52C18-FDICT-ND
Digikey
ZM4732ADICT-ND
Digikey
BZT52C15-FDICT-ND
Digikey
BZT52C39-13-FDITR-ND Digikey
BZT52C24-FDICT-ND
Digikey
MCCPMB1
Newark
46F4081
Newark
2210K-ND
Digikey
H354-ND
Digikey
H244-ND
Digikey
*Tachyonix Corporation,
14 Gonaka Jimokuji Jimokuji-cho,
Ama-gun Aichi, JAPAN 490-1111
http://www.tachyonix.co.jp
[email protected]
www.irf.com
26
Output Inductor Specification:
Core:
Wire:
# Turns:
Nominal Inductance:
Finish:
T94-2 from Micrometals
22 AWG
48
18uH
No varnish or dipping of core required
187.5mil radius
2x 60mil holes
375mil
1120mil
Suggested PCB footprint for custom output inductor
Voltage Regulator Mounting:
Item Description
7
8
www.irf.com
1
Insulator Thermalfilm
2
Shoulder Washer
3
Flat Washer #4
4
No. 4-40 UNC-2B Hex Nut
5
No. 4-40 UNC-2A X 1/2 Long Phillips
Pan Head Screw
6
Lockwasher, No.4
7
Heatsink
8
PCB
27
Daughter Board:
IRAUDAMP3 DAUTHER-BOARD BILL OF MATERIAL
NO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Designator
C1, C2
C3, C4
C5, C6
C7, C8, C20, R15, R16
C16, C17, C18, C19
C9, C21, C22
C10, C12, C14, C15
C11, C13
D1, D2, D3, D4
D5, D6
DS2
J1
J2
Q1
Q2, Q7
Q3, Q4, Q5, Q6
R1, R2
R3, R4
R5, R6
R7, R8
R9, R10
R11, R31, R33, R35, R40, R41
R12
R13, R14
R17, R18
R19, R20
R21, R22, R24, R39
R23, R26, R27, R28, R29, R30
R25, R32
R36
R37, R38
Rp1, Rp2
TP1, TP2
U1, U2
www.irf.com
#
2
2
2
5
5
3
4
2
4
2
1
2
2
1
2
4
2
2
2
2
2
6
1
2
2
2
4
6
2
1
2
2
2
2
Footprint
0805
1206
1206
0805
0805
0805
1206
0805
SOD-123
SMB
LED
CON EISA31
CON_POWER
SOT23-BCE
SOT23-BCE
DirectFet
0805
0805
0805
0805
0805
0805
0805
0805
0805
0805
0805
0805
0805
0805
0805
0805
TP
SO-14
Part Type
100pF
2.2uF, 16V
0.33uF, 25V
OPEN
10nF
47nF
0.1uF
0.1uF
1N4148
MURA120T30SCT
160-1414-1
CON EISA31
CON_POWER
MMBT3904
MMBT5401
IRF6645
0R
100R
3.3K
10.0K ,1%
10R
100K
4.7K
8.2K
1.74K,1%
1.30K, 1%
1K
4.7R
47K
10K
1R
100C
TP
IRS20124S
Part No
PCC101CGCT-ND
PCC1898CT-ND
PCC1889CT-ND
OPEN
PCC103BNCT-ND
PCC1836CT-ND
PCC2239CT-ND
PCC1840CT-ND
1N4148WDICT-ND
MURA120T3OSCT-ND
160-1414-1-ND
A26568-ND
A26570-ND
MMBT3904DICT-ND
MMBT5401DICT-ND
IRF6645
P0.0ACT-ND
P100ACT-ND
P3.3KACT-ND
P10.0KCCT-ND
P10ACT-ND
P100KACT-ND
P4.7KACT-ND
P8.2KACT-ND
P1.74KCCT-ND
P1.30KCCT-ND
P1.0KACT-ND
P4.7ACT-ND
P47KACT-ND
P10KACT-ND
P1.0ACT-ND
594-2322-675-21007
OPEN
IRS20124S
Vendor
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
IR
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
Digikey
MOUSER
IR
28
IRAUDAMP3 PCB Specifications
Motherboard:
Material:
FR4, UL 125°C
Layer Stack:
1 Layer, 2 oz. Cu
Dimensions:
5.014” x 13.685” x 0.062”
Solder Mask:
LPI Solder mask, SMOBC on top and bottom layers
Plating:
Open copper solder finish
Silkscreen:
On top and bottom layers
Daughter-board layer stack
Daughter-board:
Material:
FR4, UL 125°C
Layer Stack:
2 Layers, 2 oz. Cu each, through-hole plated
Dimensions:
3.127” x 1.492” x 0.062”
Solder Mask:
LPI Solder mask, SMOBC on top and bottom layers (BLACK)
Plating:
Open copper solder finish
Silkscreen:
On top and bottom layers (RED)
www.irf.com
29
IRAUDAMP3 PCB Layers
Motherboard:
Bottom layer and pads (1 of 2)
www.irf.com
30
Bottom layer and pads (2 of 2)
www.irf.com
31
Bottom-side solder-mask and silkscreen (1 of 2)
www.irf.com
32
Bottom-side solder-mask and silkscreen (2 of 2)
www.irf.com
33
4.0
Top-side solder-mask and silkscreen (1 of 2)
www.irf.com
34
www.irf.com
35
Top-side solder-mask and silkscreen (2 of 2)
Daughter Board:
PCB Layout – Top layer and pads
PCB Layout – Top-side solder-mask and silkscreen
www.irf.com
36
PCB Layout – Bottom layer and pads
4.0
PCB Layout – Bottom-side solder-mask and silkscreen
www.irf.com
37
IRAUDAMP3 Mechanical Construction
Motherboard
4.0
www.irf.com
38
Top and bottom sides of motherboard showing component locations
Daughter Board
Top side showing component locations
4.0
Bottom side showing connector locations
Patent and Trademark Notice
IR’s proprietary DirectFET® technology is covered by US Patents 6624522, 6784540 and
multiple other US and foreign pending patent applications. IR®, HEXFET® and
DirectFET® are registered trademarks of International Rectifier Corporation. All other
product names noted herein may be trademarks of their respective holders.
www.irf.com
39