PD - 9.1507A PRELIMINARY IRFR/U9120N HEXFET® Power MOSFET l l l l l l l Ultra Low On-Resistance P-Channel Surface Mount (IRFR9120N) Straight Lead (IRFU9120N) Advanced Process Technology Fast Switching Fully Avalanche Rated D VDSS = -100V RDS(on) = 0.48Ω G ID = -6.6A S Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D-Pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications. D -P ak T O -2 52 A A I-P ak T O -25 1 A A Absolute Maximum Ratings ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds -6.6 -4.2 -26 40 0.32 ± 20 100 -6.6 4.0 -5.0 -55 to + 150 Units A W W/°C V mJ A mJ V/ns °C 300 (1.6mm from case ) Thermal Resistance Parameter RθJC RθJA RθJA Junction-to-Case Junction-to-Ambient (PCB mount)** Junction-to-Ambient Typ. Max. Units ––– ––– ––– 3.1 50 110 °C/W 3/16/98 IRFR/U9120N Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. -100 ––– ––– -2.0 1.4 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– -0.11 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 14 47 28 31 LD Internal Drain Inductance ––– 4.5 LS Internal Source Inductance ––– 7.5 Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance ––– ––– ––– 350 110 70 V(BR)DSS IDSS IGSS Drain-to-Source Leakage Current Max. Units Conditions ––– V VGS = 0V, ID = -250µA ––– V/°C Reference to 25°C, ID = -1mA 0.48 Ω VGS = -10V, ID = -3.9A -4.0 V VDS = VGS, ID = -250µA ––– S VDS = -50V, ID = -4.0A -25 VDS = -100V, VGS = 0V µA -250 VDS = -80V, VGS = 0V, TJ = 150°C 100 VGS = 20V nA -100 VGS = -20V 27 ID = -4.0A 5.0 nC VDS = -80V 15 VGS = -10V, See Fig. 6 and 13 ––– VDD = -50V ––– ID = -4.0A ns ––– RG = 12 Ω ––– RD =12 Ω, See Fig. 10 D Between lead, ––– 6mm (0.25in.) nH G from package ––– and center of die contact S ––– VGS = 0V ––– pF VDS = -25V ––– ƒ = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS ISM V SD t rr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– -6.6 showing the A G integral reverse ––– ––– -26 p-n junction diode. S ––– ––– -1.6 V TJ = 25°C, IS = -3.9A, VGS = 0V ––– 100 150 ns TJ = 25°C, IF = -4.0A ––– 420 630 nC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Starting TJ = 25°C, L = 13mH RG = 25Ω, IAS = -3.9A. (See Figure 12) ISD ≤ -4.0A, di/dt ≤ 300A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C Pulse width ≤ 300µs; duty cycle ≤ 2%. This is applied for I-PAK, LS of D-PAK is measured between lead and center of die contact Uses IRF9520N data and test conditions. ** When mounted on 1" square PCB (FR-4 or G-10 Material ) . For recommended footprint and soldering techniques refer to application note #AN-994 IRFR/U9120N 100 100 VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V BOTTOM -4.5V VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V BOTTOM -4.5V TOP -I D , Drain-to-Source Current (A) -I D , Drain-to-Source Current (A) TOP 10 1 -4.5V 20µs PULSE WIDTH TJ = 25 °C 0.1 0.1 1 10 100 10 1 -4.5V 2.5 R DS(on) , Drain-to-Source On Resistance (Normalized) -I D , Drain-to-Source Current (A) 100 TJ = 25 ° C TJ = 150 ° C 1 V DS = -50V 20µs PULSE WIDTH 4 5 6 7 8 9 -VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics 10 100 Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics 0.1 1 -VDS , Drain-to-Source Voltage (V) -VDS , Drain-to-Source Voltage (V) 10 20µs PULSE WIDTH TJ = 150 °C 0.1 0.1 10 ID = -6.7A 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = -10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( °C) Fig 4. Normalized On-Resistance Vs. Temperature IRFR/U9120N 600 Ciss Coss 400 Crss 200 ID = -4.0 A VDS =-80V VDS =-50V VDS =-20V 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 0 1 10 0 100 5 10 15 20 25 QG , Total Gate Charge (nC) -VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 100 OPERATION IN THIS AREA LIMITED BY RDS(on) 10us -II D , Drain Current (A) -ISD , Reverse Drain Current (A) C, Capacitance (pF) VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd -VGS , Gate-to-Source Voltage (V) 20 800 TJ = 150 ° C 10 TJ = 25 ° C 1 0.1 0.2 10 100us 1ms 1 10ms TC = 25 ° C TJ = 150 ° C Single Pulse V GS = 0 V 0.8 1.4 2.0 -VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 2.6 0.1 1 10 100 -VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area 1000 IRFR/U9120N 8.0 VGS -ID , Drain Current (A) RD VDS D.U.T. RG 6.0 + VDD -10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 4.0 Fig 10a. Switching Time Test Circuit 2.0 td(on) tr t d(off) tf VGS 10% 0.0 25 50 75 100 125 150 TC , Case Temperature ( ° C) 90% VDS Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 D = 0.50 1 0.20 0.10 0.05 0.1 0.01 0.00001 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 10 IRFR/U9120N - VV DD + DD D .U .T RG IA S -20V tp A D R IV E R 0.0 1Ω 15V Fig 12a. Unclamped Inductive Test Circuit IAS EAS , Single Pulse Avalanche Energy (mJ) L VDS 250 ID -1.7A -2.5A BOTTOM -3.9A TOP 200 150 100 50 0 25 50 75 100 125 150 Starting TJ , Junction Temperature( ° C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current tp V (BR)DSS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF -10V QGS QGD D.U.T. +VDS VGS VG -3mA Charge Fig 13a. Basic Gate Charge Waveform IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit IRFR/U9120N Peak Diode Recovery dv/dt Test Circuit + D.U.T* Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + • dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test RG VGS * + - VDD Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. D= Period P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode [VDD] Forward Drop Inductor Curent Ripple ≤ 5% *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For P-Channel HEXFETS [ ISD] IRFR/U9120N Package Outline TO-252AA Outline Dimensions are shown in millimeters (inches) 2.38 (.094) 2.19 (.086) 6.73 (.265) 6.35 (.250) 1.14 (.045) 0.89 (.035) -A1.27 (.050) 0.88 (.035) 5.46 (.215) 5.21 (.205) 0.58 (.023) 0.46 (.018) 4 6.45 (.245) 5.68 (.224) 6.22 (.245) 5.97 (.235) 1.02 (.040) 1.64 (.025) 1 2 10.42 (.410) 9.40 (.370) LE A D A S S IG N M E N T S 1 - GATE 3 0.51 (.020) M IN . -B1.52 (.060) 1.15 (.045) 3X 2X 1.14 (.045) 0.76 (.030) 0.89 (.035) 0.64 (.025) 0.25 (.010) 2 - D R A IN 3 - SOURCE 4 - D R A IN 0.58 (.023) 0.46 (.018) M A M B N O TE S : 1 D IM E N S IO N IN G & TO LE R A N C IN G P E R A N S I Y 14.5M , 1982. 2.28 (.090) 2 C O N TR O LLIN G D IM E N S IO N : IN C H . 3 C O N F O R M S T O JE D E C O U TLIN E TO -252A A . 4.57 (.180) 4 D IM E N S IO N S S H O W N A R E B E F O R E S O LD E R D IP , S O LD E R D IP M A X. +0.16 (.006). Part Marking Information TO-252AA (D-Pak) E XA M P L E : T H IS IS A N IR F R 1 2 0 W IT H A S S E M B L Y LOT CODE 9U1P IN T E R N A T IO N A L R E C T IF IE R LO G O A IR F R 120 9U ASSEMBLY LOT CODE F IR S T P O R T IO N OF PART NUMBER 1P S E C O N D P O R T IO N OF PART NUMBER IRFR/U9120N Package Outline TO-251AA Outline Dimensions are shown in millimeters (inches) 6.73 (.265) 6.35 (.250) 2.38 (.094) 2.19 (.086) -A- 0.58 (.023) 0.46 (.018) 1.27 (.050) 0.88 (.035) 5.46 (.215) 5.21 (.205) LE A D A S S IG N M E N T S 4 1 - GATE 2 - D R A IN 6.45 (.245) 5.68 (.224) 3 - SOURCE 4 - D R A IN 6.22 (.245) 5.97 (.235) 1.52 (.060) 1.15 (.045) 1 2 3 -B- N O TE S : 1 D IM E N S IO N IN G & TO LE R A N C IN G P E R A N S I Y 14.5M , 1982. 2.28 (.090) 1.91 (.075) 2 C O N T R O LLIN G D IM E N S IO N : IN C H . 3 C O N F O R M S TO J E D E C O U T LIN E T O -252A A . 9.65 (.380) 8.89 (.350) 4 D IM E N S IO N S S H O W N A R E B E F O R E S O LD E R D IP , S O LD E R D IP M A X. +0.16 (.006). 3X 1.14 (.045) 0.76 (.030) 2.28 (.090) 3X 1.14 (.045) 0.89 (.035) 0.89 (.035) 0.64 (.025) 0.25 (.010) 2X M A M B 0.58 (.023) 0.46 (.018) Part Marking Information TO-251AA (I-Pak) E X A M P L E : T H IS IS A N IR F U 1 2 0 W IT H A S S E M B L Y LO T CODE 9U1P IN T E R N A T IO N A L R E C T IF IE R LO GO IR F U 120 9U ASSEMBLY LOT CODE F IR S T P O R T IO N OF PART NUMBER 1P S E C O N D P O R T IO N OF PART NUMBER IRFR/U9120N Tape & Reel Information TO-252AA TR TRR 1 6.3 ( .6 41 ) 1 5.7 ( .6 19 ) 12 .1 ( .4 7 6 ) 11 .9 ( .4 6 9 ) F E E D D IR E C T IO N TRL 16 .3 ( .64 1 ) 15 .7 ( .61 9 ) 8 .1 ( .3 18 ) 7 .9 ( .3 12 ) F E E D D IR E C T IO N NOTES : 1 . C O N T R O LL IN G D IM E N S IO N : M ILL IM E T E R . 2 . A LL D IM E N S IO N S A R E S H O W N IN M ILL IM E T E R S ( IN C H E S ). 3 . O U T L IN E C O N F O R M S T O E IA -4 81 & E IA -54 1. 1 3 IN C H 16 m m NO TES : 1. O U T L IN E C O N F O R M S T O E IA -4 81 . WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 3/98 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/