HT1632 32´8 & 24´16 LED Driver Features · Operating voltage: 2.4V~5.5V · Integrated 256kHz RC oscillator · Multiple LED display - 32 out bits/8 commons and · Serial MCU interface - CS, RD, WR, DATA 24 out bits/16 commons · Data mode & command mode instruction · Integrated display RAM - select 32 out bits & · Cascading function for extended applications 8 commons for 64´4 display RAM, or select 24 outbits & 16 commons for 96´4 display RAM · Selectable NMOS open drain output driver and PMOS open drain output driver for commons · 16-level PWM brightness control · 52-pin QFP package Applications · Industrial control indicator · Other consumer application · Digital clock, thermometer, counter, voltmeter · LED Displays · Instrumentation readouts General Description The HT1632 is a memory mapping LED display controller/driver, which can select a number of out bits and commons. These are 32 out bits & 8 commons and 24 out bits & 16 commons. The device supports 16-gradation LEDs for each out line using PWM control with software instructions. A serial interface is conveniently provided for the command mode and data mode. Only three or four lines are required for the interface between the host controller and the HT1632. The display can be extended by cascading the HT1632 for wider applications. Block Diagram V D D V S S D is p la y R A M C O M 0 C S R D W R C o n a n T im C ir c C O M 7 tro l d in g u it O U T B IT 0 L E D D r iv e r D A T A O U T B IT 2 3 O U T B IT 2 4 /C O M 1 5 O U T B IT 3 1 /C O M 8 L E D _ V S S O S C S Y N C Rev. 1.30 T im in g G e n e ra to r P W M 1 C o n tro l June 28, 2011 HT1632 Pin Assignment O U O U O U L E O U O U O U O U O U O U O U O U L E T B T B T B D _ T B T B T B T B T B T B T B T B D _ IT 2 IT 2 IT 2 V S IT 1 IT 1 IT 1 IT 1 IT 1 IT 1 IT 1 IT 1 V S S S 2 1 0 9 8 7 1 0 3 8 3 3 7 4 3 6 5 3 5 7 6 6 4 8 H T 1 6 3 2 5 7 5 2 Q F P -A 9 3 1 0 1 2 1 1 0 3 9 2 8 S 6 5 2 5 1 5 0 4 9 4 8 4 7 4 6 4 5 4 4 4 3 4 2 4 1 4 0 1 9 5 B IT 1 B IT 1 T B IT T B IT T B IT T B IT T B IT T B IT _ V S T B IT T B IT T B IT T B IT 4 3 2 O U T O U T O U O U O U O U O U O U L E D O U O U O U O U 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 3 4 3 3 3 2 3 1 3 0 2 9 2 8 2 7 O U T O U T O U T O U T O U T L E D O U T O U T O U T O U T C O M C O M C O M B IT B IT B IT B IT B IT _ V S B IT B IT B IT B IT 7 6 5 2 3 2 4 /C 2 5 /C 2 6 /C 2 7 /C S 2 8 /C 2 9 /C 3 0 /C 3 1 /C O M 1 O M 1 O M 1 O M 1 5 4 3 2 O M 1 1 O M 1 0 O M 9 O M 8 C O M C O M C O M C O M C O M V D D S Y N C S R D W R D A T O S C V S S C A 4 3 2 1 0 Pin Description Pad Name I/O Description OUTBIT0~OUTBIT23 O Line drivers. These pins drive the LEDs. OUTBIT24/COM15~ OUTBIT31/COM8 O Drive LED output or Common output COM0~COM7 O Common outputs SYNC I/O If the MASTER MODE command is programmed, the synchronous signal is output to SYN pin. If the SLAVE MODE command is programmed, the synchronous signal is input from SYN pin. OSC I/O If the system clock is is sourced from an external clock source, the external clock source should be connected to this pad. If the on-chip RC oscillator is selected, this pad can be connected to a high or low level. If the cascade mode is selected, this pad is the driver clock signal. DATA I/O Serial data input or output with pull-high resistor WR I WRITE clock input with pull-high resistor Data on the DATA lines are latched into the HT1632 on the rising edge of the WR signal. RD I READ clock input with pull-high resistor. The HT1632 RAM data is clocked out on the falling edge of the RD signal. The clocked out data will appear on the DATA line. The host controller can use the next rising edge to latch the clocked out data. CS I Chip select input with pull-high resistor When the CS line is high, the data and command read from or written to the HT1632 is disabled, and the serial interface circuit is also reset. If CS is low, the data and command transmission between the host controller and the HT1632 are all enabled. LED_VSS ¾ Negative power supply for driver circuit, ground. VSS ¾ Negative power supply for logic circuit, ground. VDD ¾ Positive power supply for logic and driver circuit. Rev. 1.30 2 June 28, 2011 HT1632 Absolute Maximum Ratings Supply Voltage ...........................VSS-0.3V to VSS+5.5V Storage Temperature ............................-50°C to 125°C Input Voltage.............................VSS-0.3V to VDD+0.3V Operating Temperature...........................-40°C to 85°C Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. D.C. Characteristics Symbol Parameter VDD=2.4V~5.5V, Ta=25°C (Unless otherwise specified) Test Conditions VDD Conditions ¾ Min. Typ. Max. Unit 2.4 5.0 5.5 V VDD Operating Voltage ¾ IDD Operating Current 5V No load, LED ON, on-chip RC oscillator ¾ 0.3 0.6 mA ISTB Standby Current 5V No load, power down mode ¾ 1.5 3.0 mA VIL Input Low Voltage 5V DATA, WR, CS, RD 0 ¾ 0.3VDD V VIH Input High Voltage 5V DATA, WR, CS, RD 0.7VDD ¾ 5 V IOL1 DATA 5V VOL=0.5V 2.5 4.0 ¾ mA IOH1 DATA 5V VOH=4.5V -2.0 -3.5 ¾ mA IOL2 OSC, SYNC 5V VOL=0.5V 5 7 ¾ mA IOH2 OSC, SYNC 5V VOH=4.5V -3.5 -5.0 ¾ mA IOL3 Common Sink Current 5V VOL=0.5V 100 140 ¾ mA IOH3 Common Source Current 5V VOH=4.5V -40 -55 ¾ mA IOL4 LED Out Driver 5V VOL=0.5V 110 160 ¾ mA RPH Pull-high Resistor 5V DATA, WR, CS, RD 18 27 40 kW Rev. 1.30 3 June 28, 2011 HT1632 A.C. Characteristics Symbol VDD=2.4V~5.5V, Ta=25°C (Unless otherwise specified) Test Conditions Parameter VDD Conditions Min. Typ. Max. Unit 192 256 320 kHz fSYS System Clock 5V On-chip RC oscillator fLED LED Duty Cycle & Frame Frequency 5V 1/8 duty ¾ fSYS/2624 ¾ Hz 5V 1/16 duty ¾ fSYS/2624 ¾ Hz fCLK1 Serial Data Clock (WR pin) 5V Duty cycle 50% ¾ ¾ 1 MHz fCLK2 Serial Data Clock (RD pin) 5V Duty cycle 50% ¾ ¾ 500 kHz tCS Serial Interface Reset Pulse Width ¾ CS 250 ¾ ¾ ns tCLK Write mode 0.5 WR, RD Input Pulse Width 5V ¾ ¾ Read mode 1.0 ¾ ¾ ms tr, tf Rise/Fall Time Serial Data Clock Width (Figure 1) ¾ ¾ ¾ 50 100 ns tsu Setup Time for DATA to WR, RD Clock Width (Figure 2) ¾ ¾ 50 100 ¾ ns th Hold Time for DATA to WR, RD, Clock Width (Figure 2) ¾ ¾ 100 200 ¾ ns tsu1 Setup Time for CS to WR, RD, Clock Width (Figure 3) ¾ ¾ 200 300 ¾ ns th1 Hold Time for CS to WR, RD, Clock Width (Figure 3) ¾ ¾ 100 200 ¾ ns tod Data Output Delay Time (Figure 4) ¾ ¾ ¾ 100 200 ns tf W R , R D C lo c k 9 0 % 5 0 % 1 0 % tr tC V tC L K V a lid D a ta D D D A T A G N D L K ts W R C lo c k Figure 1 V D D 5 0 % G N D th u V D D 5 0 % G N D Figure 2 tC C S V th u 1 G N D V L a s t C lo c k V G N D d V R D D D D D 5 0 % to 1 5 0 % F ir s t C lo c k D A T A D D 5 0 % ts W R , R D C lo c k S D D G N D G N D Figure 4 Figure 3 Rev. 1.30 4 June 28, 2011 HT1632 Functional Description Display Memory - RAM data in RAM is set to ²1², the corresponding LED will be lighted. Data in the RAM can be accessed by the READ, WRITE, and READ-MODIFY-WRITE commands. The contents of the RAM can be read or written from bit 0 of the specific address. The following is a mapping from the RAM to the LED pattern: The static display memory (RAM) is organised into 64´4 bits or 96´4 bits and is used to store the display data. If 32 outbits & 8 commons is selected, the RAM size is 64´4 bits. If 24 outbits & 16 commons is selected, the RAM size is 96´4 bits. The contents of the RAM are directly mapped to the contents of the LED driver. If the Com7 Com6 Com5 Com4 Com3 Com2 Com1 Com0 Out0 01H 00H Out1 03H 02H Out2 05H 04H Out3 07H 06H Out4 09H 08H Out5 0BH 0AH Out6 0DH 0CH Out7 0FH 0EH Out8 11H 10H Out9 13H 12H Out10 15H 14H Out11 17H 16H Out12 19H 18H Out13 1BH 1AH Out14 1DH 1CH Out15 1FH 1EH Out16 21H 20H Out17 23H 22H Out18 25H 24H Out19 27H 26H Out20 29H 28H Out21 2BH 2AH Out22 2DH 2CH Out23 2FH 2EH Out24 31H 30H Out25 33H 32H Out26 35H 34H Out27 37H 36H Out28 39H 38H Out29 3BH 3AH Out30 3DH 3CH Out31 3FH 3EH D3 D2 D1 D0 Addr. Data D3 D2 D1 D0 Addr. Data 32 Outbits & 8 Common for 64´4 Display RAM Rev. 1.30 5 June 28, 2011 HT1632 Com15 Com14 Com13 Com12 ......... Com3 Com2 Com1 Com0 Out0 03H 00H Out1 07H 04H Out2 0BH 08H Out3 0FH 0CH Out4 13H 10H Out5 17H 14H Out6 1BH 18H Out7 1FH 1CH Out8 23H 20H Out9 27H 24H Out10 2BH 28H Out11 2FH Out12 33H ......... 2CH 30H Out13 37H 34H Out14 3BH 38H Out15 3FH 3CH Out16 43H 40H Out17 47H 44H Out18 4BH 48H Out19 4FH 4CH Out20 53H 50H Out21 57H 54H Out22 5BH 58H Out23 5FH D3 D2 D1 D0 ......... Addr. Data 5CH D3 D2 D1 D0 Addr. Data 24 Outbits & 16 Common for 96´4 Display RAM Rev. 1.30 6 June 28, 2011 HT1632 System Oscillator The HT1632 system clock is used to generate the time base clock frequency, LED-driving clock. The clock may be sourced from an on-chip RC oscillator (256kHz), or an external clock using the S/W setting. The configuration of the system oscillator is as shown. After the SYS DIS command is executed, the system clock will stop and the LED duty cycle generator will turn off. This command is, however, available only for the on-chip RC oscillator. Once the system clock stops, the LED display will become blank, and the time base will also lose its function. The LED OFF command is used to turn the LED duty cycle generator off. After the LED duty cycle generator switches off by issuing the LED OFF command, using the SYS DIS command reduces power consumption, serving as a system power down command. But if the external clock source is chosen as the system clock, using the SYS DIS command can neither turn the oscillator off nor execute the power down mode. The crystal oscillator option can be applied to connect an external frequency source to the OSC pin. In this case, the system fails to enter the power down mode, similar to the case in the external clock source operation. At the initial system power on, the HT1632 is in the SYS DIS state. O S C Command Code Name LED OFF 10000000010X Turn off LED outputs LED ON 10000000011X Turn on LED outputs ab=00: N-MOS open drain output and 8 common option ab=01: N-MOS open drain output and 16 Commons common option 1000010abXXX Option ab=10: P-MOS open drain output and 8 common option ab=11: P-MOS open drain output and 16 common option V D D C O M C u r r e n t- lim itin g r e s is to r E x te r n a l C lo c k S o u r c e O n - c h ip R C O s c illa to r 2 5 6 k H z Function O U T B IT S y s te m C lo c k NMOS Open Drain Driving Mode Configuration System Oscillator Configuration LED Driver The HT1632 has a 256 (32´8) and 384 (24´16) pattern LED driver. It can be configured in a 32´8 or 24´16 pattern and common pad N-MOS open drain output or P-MOS open drain output LED driver using the S/W configuration. This feature makes the HT1632 suitable for multiple LED applications. The LED-driving clock is derived from the system clock. The driving clock frequency is always 256kHz, an on-chip RC oscillator freq u e n c y, o r a n ex t e r nal f r e q u e n c y. Th e L E D corresponding commands are summarized in the table. The bold form of 1 0 0, namely 1 0 0, indicates the command mode ID. If successive commands have been issued, the command mode ID except for the first command will be omitted. The LED OFF command turns the LED display off by disabling the LED duty cycle generator. The LED ON command, on the other hand, turns the LED display on by enabling the LED duty cycle generator. LED Color Current-limiting Resistor Red 120W at VDD=5V Green 100W at VDD=5V Recommended Current-limiting Resistor for NMOS Open Drain Driving Mode V D D C O M C u r r e n t- lim itin g r e s is to r O U T B IT PMOS Open Drain Driving Mode Configuration Rev. 1.30 7 June 28, 2011 HT1632 LED Driver Mode output Waveform · N-MOS open drain of 32x8 driver mode (COM pin with transistor buffer) 320*tCLK 8*tCLK OFF OUTBIT0~ OUTBIT31 ON ~ 324*tCLK OFF COM0 ON 4*tCLK OFF COM1 ON OFF COM2 ON ~ OFF COM5 ON OFF COM6 ON OFF COM7 ON 1*tCLK SYNC 1 Frame = 8*328*tCLK Note: tCLK=1/fSYS · P-MOS open drain of 24*16 driver mode 160*tCLK 4*tCLK OFF OUTBIT0~ OUTBIT23 ~ ON 162*tCLK ON COM0 OFF 2*tCLK ON COM1 OFF ON COM2 OFF ~ ON ROW26/COM13 OFF ON ROW25/COM14 OFF ON ROW24/COM15 OFF 1/2*tCLK SYNC 1 Frame = 16*164*tCLK Note: tCLK=1/fSYS Rev. 1.30 8 June 28, 2011 HT1632 Digital Dimming The Display Dimming capabilities of the HT1632 are very versatile. The whole display can be dimmed using pulse width modulation techniques for the OUTBIT driver with the Dimming command. The relationship between OUTBIT and COM digital dimming duty time are shown as below: OFF COM OUTBIT 1/16 Duty OUTBIT 2/16 Duty ON OFF 1*T ON OFF 2*T OUTBIT 3/16 Duty OUTBIT 4/16 Duty OUTBIT 5/16 Duty OUTBIT 6/16 Duty OUTBIT 7/16 Duty OUTBIT 8/16 Duty OUTBIT 9/16 Duty OUTBIT 10/16 Duty ON OFF 3*T ON OFF 4*T ON OFF 5*T ON OFF 6*T ON OFF 7*T ON OFF 8*T ON OFF 9*T ON OFF 10*T OUTBIT 11/16 Duty ON OFF 11*T OUTBIT 12/16 Duty OUTBIT 13/16 Duty OUTBIT 14/16 Duty OUTBIT 15/16 Duty OUTBIT 16/16 Duty Note: ON OFF 12*T ON OFF 13* T ON OFF 14*T ON OFF 15*T ON OFF 16*T ON (1) T=20 x tCLK(32x8 driver mode) (2) T=10 x tCLK(24x16 driver mode) (3) tCLK=1/fSYS Rev. 1.30 9 June 28, 2011 HT1632 Cascade operation The mode command should be issued before the data or command is transferred. If successive commands have been issued, the command mode ID, namely 1 0 0, can be omitted. While the system is operating in the non-successive command or the non-successive address data mode, the CS pin should be set to ²1² and the previous operation mode will be reset also. Once the CS pin returns to ²0², a new operation mode ID should be issued first. For the cascade operation, the first IC is set to master mode and its SYNC and OSC pins are set to output pins. The second IC is set to slave mode and its SYNC and OSC pins are set to input pins which are connected to the the master IC. Please refer to the ²Cascade control flow chart² for detail settings. Blinker The HT1632 has display blinking capabilities. The blink function generates all LED blinking. The blink rates is 0.25s LED on and 0.25s LED off for one blinking period. This blinking function can be effectively performed by setting the BLINK ON or BLINK OFF command. Interfacing Only four lines are required to interface to the HT1632. The CS line is used to initialise the serial interface circuit and to terminate the communication between the host controller and the HT1632. If the CS pin is set to 1, the data and command issued between the host controller and the HT1632 are first disabled and then initialised. Before issuing a mode command or mode switching, a high level pulse is required to initialise the serial interface of the HT1632. The DATA line is the serial data input/output line. Data to be read or written or commands to be written have to be passed through the DATA line. The RD line is the READ clock input. Data in the RAM is clocked out on the falling edge of the RD signal, and the clocked out data will then appear on the DATA line. It is recommended that the host controller reads in the correct data during the interval between the rising edge and the next falling edge of the RD signal. The WR line is the WRITE clock input. The data, address, and command on the DATA line are all clocked into the HT1632 on the rising edge of the WR signal. Command Format The S/W setting can configure the HT1632. There are two mode commands to configure the HT1632 resources and to transfer the LED display data. The configuration mode of the HT1632 is knows as the command mode,with a command mode ID of 1 0 0. The command mode consists of a system configuration command, a system frequency selection command, a LED configuration command, and an operating command. The data mode, on the other hand, includes READ, WRITE, and READ-MODIFY-WRITE operations. The following are the data mode ID and the command mode ID: Operation Mode ID READ Data 110 WRITE Data 101 READ-MODIFY-WRITE COMMAND Data 101 Command 100 L E D T u rn O n T u rn O ff 0 .2 5 s 0 .2 5 s B lin k O n B lin k O ff Example of Waveform for Blinker Rev. 1.30 10 June 28, 2011 HT1632 Timing Diagrams READ Mode - Command Code = 1 1 0 C S W R R D D A T A 1 1 0 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 M e m o ry A d d re s s 1 (M A 1 ) D a ta (M A 1 ) 1 1 0 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 M e m o ry A d d re s s 2 (M A 2 ) D a ta (M A 2 ) READ Mode - Successive Address Reading C S W R R D D A T A 1 1 0 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 M e m o ry A d d re s s (M A ) D a ta (M A ) D a ta (M A + 1 ) D a ta (M A + 2 ) D a ta (M A + 3 ) WRITE Mode - Command Code = 1 0 1 C S W R D A T A 1 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 M e m o ry A d d re s s 1 (M A 1 ) D a ta (M A 1 ) 1 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 M e m o ry A d d re s s 2 (M A 2 ) D a ta (M A 2 ) WRITE Mode - Successive Address Writing C S W R D A T A Rev. 1.30 1 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 M e m o ry A d d re s s (M A ) D a ta (M A ) D a ta (M A + 1 ) D a ta (M A + 2 ) D a ta (M A + 3 ) 11 June 28, 2011 HT1632 READ-MODIFY-WRITE Mode - Command Code = 1 0 1 C S W R R D D A T A 1 0 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 M e m o ry A d d re s s 1 (M A 1 ) D a ta (M A 1 ) D a ta (M A 1 ) 1 1 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 M e m o ry A d d re s s 2 (M A 2 ) D a ta (M A 2 ) READ-MODIFY-WRITE Mode - Successive Address Accessing C S W R R D 1 D A T A 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 M e m o ry A d d re s s (M A ) D a ta (M A ) D a ta (M A ) D a ta (M A + 1 ) D a ta (M A + 1 ) D a ta (M A + 2 ) Command Mode - Command Code = 1 0 0 C S W R D A T A 1 0 0 C 8 C 7 C 6 C 5 C 4 C 3 C 2 C 1 C 0 C 8 C 7 C 6 C 5 C 4 C 3 C 2 C 1 C 0 C o m m a n d 1 C o m m a n d ... C o m m a n d i C o m m a n d o r D a ta M o d e Mode - Data and Command Mode C S W R D A T A C o m m a n d o r D a ta M o d e Rev. 1.30 A d d re s s a n d D a ta C o m m a n d o r D a ta M o d e 12 A d d re s s a n d D a ta C o m m a n d o r D a ta M o d e A d d re s s a n d D a ta June 28, 2011 HT1632 Application Circuits Single Connect Example for 32 Outbits & 8 Commons (NMOS) V D D C O M 0 C O M 1 C O M 2 C S C S W R W R R D R D D A T A C O M 3 D A T A C O M 0 ~ C O M 7 M C U H T 1 6 3 2 C O M 4 C O M 5 C O M 6 C O M 7 S Y N C O S C O U T B IT 0 ~ L E D O U T B IT 3 1 M a tr ix Note: Common & outbit are all NMOS open drain output structures and only supply sink current. Rev. 1.30 13 June 28, 2011 HT1632 Single Connect Example for 24 Outbits & 16 Commons (NMOS) V D D C O M 0 C O M 1 C O M 2 C S C S W R W R R D R D D A T A C O M 3 D A T A C O M 0 ~ C O M 1 5 M C U C O M 4 C O M 5 C O M 6 C O M 7 C O M 8 C O M 9 H T 1 6 3 2 C O M 1 0 C O M 1 1 C O M 1 2 C O M 1 3 C O M 1 4 C O M 1 5 S Y N C O S C O U T B IT 0 ~ L E D O U T B IT 2 3 M a tr ix Note: Common & outbit are all NMOS open drain output structures and only supply sink current. Rev. 1.30 14 June 28, 2011 HT1632 Single Connect Example for 32 Outbits & 8 Commons (PMOS) C O M 0 C O M 1 C S C S W R W R R D R D D A T A C O M 2 C O M 3 D A T A C O M 0 ~ C O M 4 C O M 7 M C U C O M 5 H T 1 6 3 2 C O M 6 C O M 7 S Y N C O S C O U T B IT 0 ~ L E D O U T B IT 3 1 Note: M a tr ix Outbit are NMOS open drain output structures and only supply sink current, common are PMOS open drain output structures and only supply source current. If the P-MOS open drain structure is used for the commons, the brightness of the LEDs may be not enough and the uniformity of the LEDs may be not good. If user cares about the brightness and uniformity of the LEDs, the N-MOS open drain structure is suggested being used for the commons. Rev. 1.30 15 June 28, 2011 HT1632 Single Connect Example for 24 Outbits & 16 Commons (PMOS) C O M 0 C O M 1 C S C S W R W R R D R D D A T A C O M 2 C O M 3 D A T A C O M 0 ~ C O M 4 C O M 1 5 M C U C O M 5 C O M 6 C O M 7 C O M 8 C O M 9 C O M 1 0 H T 1 6 3 2 C O M 1 1 C O M 1 2 C O M 1 3 C O M 1 4 S Y N C C O M 1 5 O S C O U T B IT 0 ~ L E D O U T B IT 2 3 Note: M a tr ix Outbit are NMOS open drain output structures and only supply sink current, common are PMOS open drain output structures and only supply source current. If the P-MOS open drain structure is used for the commons, the brightness of the LEDs may be not enough and the uniformity of the LEDs may be not good. If user cares about the brightness and uniformity of the LEDs, the N-MOS open drain structure is suggested being used for the commons. Rev. 1.30 16 June 28, 2011 HT1632 Cascade Connect Example for 32 Outbits & 8 Commons C S 1 C S 2 C S 3 W R R D M C U D A T A V D D V D D C O M 0 C S C O M 0 ~ W R C O M 7 R D D A T A C O M 7 H T 1 6 3 2 (M a s te r) O S C O U T B IT 0 ~ S Y N C O U T B IT 3 1 L E D M a tr ix O U T B IT 0 O U T B IT 3 1 C S W R R D D A T A H T 1 6 3 2 L E D M a tr ix (S la v e ) O S C O U T B IT 0 ~ S Y N C O U T B IT 3 1 O U T B IT 0 O U T B IT 3 1 C S W R R D D A T A Note: H T 1 6 3 2 L E D M a tr ix (S la v e ) O S C O U T B IT 0 ~ S Y N C O U T B IT 3 1 O U T B IT 0 O U T B IT 3 1 It also can set cascade mode by software. User must set the Slaves in external clock mode with command. The CS pin must be connected to MCU individually for independent read-write. Rev. 1.30 17 June 28, 2011 HT1632 Cascade Connect Example for 24 Outbits & 16 Commons C S 1 C S 2 C S 3 W R R D M C U D A T A V D D V D D C O M 0 C S C O M 0 ~ W R C O M 1 5 R D D A T A C O M 1 5 H T 1 6 3 2 (M a s te r) O S C O U T B IT 0 ~ S Y N C O U T B IT 2 3 L E D M a tr ix O U T B IT 0 O U T B IT 2 3 C S W R R D D A T A L E D M a tr ix H T 1 6 3 2 (S la v e ) O S C O U T B IT 0 ~ S Y N C O U T B IT 2 3 O U T B IT 0 O U T B IT 2 3 C S W R R D D A T A Note: H T 1 6 3 2 (S la v e ) O S C O U T B IT 0 ~ S Y N C O U T B IT 2 3 L E D M a tr ix O U T B IT 0 O U T B IT 2 3 It also can set cascade mode by software. User must set the Slaves in external clock mode with command. The CS pin must be connected to MCU individually for independent read-write. Rev. 1.30 18 June 28, 2011 HT1632 Cascade Control Flow P o w e r o n S Y S D IS ( M a s te r , S la v e ) C o m m o n s O p tio n ( M a s te r , S la v e ) M a s te r M o d e (M a s te r) S la v e M o d e ( S la v e ) S Y S O N ( M a s te r , S la v e ) L E D O N ( M a s te r , S la v e ) W r ite R A M D a ta ( M a s te r , S la v e ) U p d a te R A M D a ta ( M a s te r , S la v e ) Rev. 1.30 19 June 28, 2011 HT1632 Command Summary Name ID Command Code D/C READ 110 A6A5A4A3A2A1A0D0D1D2D3 D Read data from the RAM WRITE 101 A6A5A4A3A2A1A0D0D1D2D3 D Write data to the RAM READ-MODIFYWRITE 101 A6A5A4A3A2A1A0D0D1D2D3 D Read and Write data to the RAM SYS DIS 100 0000-0000-X C Turn off both system oscillator and LED duty cycle generator SYS EN 100 0000-0001-X C Turn on system oscillator LED OFF 100 0000-0010-X C Turn off LED duty cycle generator LED ON 100 0000-0011-X C Turn on LED duty cycle generator BLINK OFF 100 0000-1000-X C Turn off blinking function BLINK ON 100 0000-1001-X C Turn on blinking function SLAVE MODE 100 0001-00XX-X Set slave mode and clock source from external clock MASTER MODE 100 0001-01XX-X Set master mode and clock source on-chip RC oscillator, the system clock output to OSC pin RC 100 0001-10XX-X C System clock source, on-chip RC oscillator EXT CLK 100 0001-11XX-X C System clock source, external clock source COMMONS OPTION Function 100 0010-abXX-X C ab=00: N-MOS open drain output and 8 common option ab=01: N-MOS open drain output and 16 common option ab=10: P-MOS open drain output and 8 common option ab=11: P-MOS open drain output and 16 common option 100 101X-0000-X C PWM 1/16 duty 100 101X-0001-X C PWM 2/16 duty 100 101X-0010-X C PWM 3/16 duty 100 101X-0011-X C PWM 4/16 duty 100 101X-0100-X C PWM 5/16 duty 100 101X-0101-X C PWM 6/16 duty 100 101X-0110-X C PWM 7/16 duty 100 101X-0111-X C PWM 8/16 duty 100 101X-1000-X C PWM 9/16 duty 100 101X-1001-X C PWM 10/16 duty 100 101X-1010-X C PWM 11/16 duty 100 101X-1011-X C PWM 12/16 duty 100 101X-1100-X C PWM 13/16 duty 100 101X-1101-X C PWM 14/16 duty 100 101X-1110-X C PWM 15/16 duty 100 101X-1111-X C PWM 16/16 duty Default Yes Yes Yes Yes ab =10 PWM Duty Rev. 1.30 20 Yes June 28, 2011 HT1632 Note: X: Don¢t care A6~A0: RAM addresses D3~D0: RAM data D/C: Data/command mode Default: Power on reset default All the bold forms, namely 1 1 0, 1 0 1, and 1 0 0, are mode commands. Among these, 1 0 0 indicates the command mode ID. If successive commands have been issued, the command mode ID except for the first command will be omitted. The source of the tone frequency and of the time base clock frequency can be derived from an on-chip RC oscillator or an external clock. Calculation of the frequency is based on the system frequency sources as stated above. It is recommended that the host controller should initialize the HT1632 after power on reset, for power on reset may fail, which in turn leads to the malfunction of the HT1632 Rev. 1.30 21 June 28, 2011 HT1632 Package Information 52-pin QFP (14mm´14mm) Outline Dimensions C H D 3 9 G 2 7 I 2 6 4 0 F A B E 1 4 5 2 K J 1 Symbol A Dimensions in inch Min. Nom. Max. 0.681 ¾ 0.689 B 0.547 ¾ 0.555 C 0.681 ¾ 0.689 D 0.547 ¾ 0.555 E ¾ 0.039 ¾ F ¾ 0.016 ¾ G 0.098 ¾ 0.122 H ¾ ¾ 0.134 I ¾ 0.004 ¾ J 0.029 ¾ 0.041 K 0.004 ¾ 0.008 a 0° ¾ 7° Symbol A Rev. 1.30 1 3 Dimensions in mm Min. Nom. Max. 17.30 ¾ 17.50 B 13.90 ¾ 14.10 C 17.30 ¾ 17.50 D 13.90 ¾ 14.10 E ¾ 1.00 ¾ F ¾ 0.40 ¾ G 2.50 ¾ 3.10 H ¾ ¾ 3.40 I ¾ 0.10 ¾ J 0.73 ¾ 1.03 K 0.10 ¾ 0.20 a 0° ¾ 7° 22 June 28, 2011 HT1632 Holtek Semiconductor Inc. (Headquarters) No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan Tel: 886-3-563-1999 Fax: 886-3-563-1189 http://www.holtek.com.tw Holtek Semiconductor Inc. (Taipei Sales Office) 4F-2, No. 3-2, YuanQu St., Nankang Software Park, Taipei 115, Taiwan Tel: 886-2-2655-7070 Fax: 886-2-2655-7373 Fax: 886-2-2655-7383 (International sales hotline) Holtek Semiconductor Inc. (Shenzhen Sales Office) 5F, Unit A, Productivity Building, No.5 Gaoxin M 2nd Road, Nanshan District, Shenzhen, China 518057 Tel: 86-755-8616-9908, 86-755-8616-9308 Fax: 86-755-8616-9722 Holtek Semiconductor (USA), Inc. (North America Sales Office) 46729 Fremont Blvd., Fremont, CA 94538 Tel: 1-510-252-9880 Fax: 1-510-252-9885 http://www.holtek.com Copyright Ó 2011 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek¢s products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. Rev. 1.30 23 June 28, 2011