HT1632C 32×8 & 24×16 LED Driver Features Applications • Operating voltage: 2.4V~5.5V • Industrial control indicator • Multiple LED display − 32 ROW /8 COM and 24 ROW & 16 COM • Digital clock, thermometer, counter, voltmeter • Integrated display RAM − select 32 ROW & 8 COM for 64×4 display RAM, or select 24 ROW & 16 COM for 96×4 display RAM • Other consumer application • Instrumentation readouts • LED Displays • 16-level PWM brightness control General Description • Integrated 256kHz RC oscillator The HT1632C is a memory mapping LED display controller/driver, which can select a number of ROW and commons. These are 32 ROW & 8 Commons and 24 ROW & 16 Commons. The device supports 16-gradation LEDs for each out line using PWM control with software instructions. A serial interface is conveniently provided for the command mode and data mode. Only three or four lines are required for the interface between the host controller and the HT1632C. The display can be extended by cascading the HT1632C for wider applications. • Serial MCU interface − CS, RD, WR, DATA • Data mode & command mode instruction • Cascading function for extended applications • Selectable NMOS open drain output driver and PMOS open drain output driver for commons • 52-pin LQFP package Block Diagram Rev. 1.30 1 February 11, 2014 HT1632C Pin Assignment Pin Description Pad Name I/O Description ROW0~ROW23 O Line drivers. These pins drive the LEDs. ROW24/COM15~ ROW31/COM8 O Drive LED outputs or common outputs. Each COM pin is double bonded. COM0~COM7 O Common outputs. Each COM pin is double bonded. I/O If the RC Master Mode or EXT CLK Master Mode command is programmed, the synchronous signal is output to SYN pin. If the Slave Mode command is programmed, the synchronous signal is input from SYN pin. OSC I/O If the RC Master Mode command is programmed, the system clock source is from onchip RC oscillator and system clock is output to OSC pin. If the Slave Mode or EXT CLK Master Mode command is programmed, the system clock source is input from external clock via the OSC pin. DATA I/O Serial data input or output with pull-high resistor SYNC WR I WRITE clock input with pull-high resistor Data on the DATA lines are latched into the HT1632C on the rising edge of the WR signal. RD I READ clock input with pull-high resistor. The HT1632C RAM data is clocked out on the falling edge of the RD signal. The clocked out data will appear on the DATA line. The host controller can use the next rising edge to latch the clocked out data. CS I Chip select input with pull-high resistor When the CS line is high, the data and command read from or written to the HT1632C is disabled, and the serial interface circuit is also reset. If CS is low, the data and command transmission between the host controller and the HT1632C are all enabled. LED_VDD — Positive power supply for driver circuit. Each LED_VDD pin is double bonded. LED_VSS — Negative power supply for driver circuit, ground. Each LED_VSS pin is double bonded. VSS — Negative power supply for logic circuit, ground. VDD — Positive power supply for logic circuit. Rev. 1.30 2 February 11, 2014 HT1632C Absolute Maximum Ratings Supply Voltage........................... VSS−0.3V to VSS+6.0V Input Voltage............................. VSS−0.3V to VDD+0.3V Storage Temperature............................−50°C to 125°C Operating Temperature..........................−40°C to 85°C Note: These are stress ratings only. Stresses exceeding the range specified under ″Absolute Maximum Ratings″ may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. D.C. Characteristics VDD=2.4V~5.5V, Ta=25°C (Unless otherwise specified) Symbol Parameter Test Conditions VDD Conditions Min. Typ. Max. Unit Operating Voltage — — 2.4 5.0 5.5 V IDD Operating Current No load, LED ON, 5V on-chip RC oscillator — 0.3 0.6 mA ISTB Standby Current 5V No load, power down mode — 1.5 3.0 µA VIL Input Low Voltage 5V DATA, WR, CS, RD 0 — 0.3VDD V VDD VIH Input High Voltage 5V DATA, WR, CS, RD 0.7VDD — 5 V IOL1 OSC, SYNC, DATA 5V VOL=0.5V 18 25 — mA IOH1 OSC, SYNC, DATA 5V VOH=4.5V -10 -13 — mA IOL2 ROW Sink Current 5V VOL=0.5V 12 16 — mA IOH2 ROW Source Current 5V VOH=4.5V -50 -70 — mA IOL3 COM Sink Current 5V VOL=0.5V 250 350 — mA IOH3 COM Source Current 5V VOH=4.5V -45 -60 — mA RPH Pull-high Resistor 5V DATA, WR, CS, RD 18 27 40 kW Rev. 1.30 3 February 11, 2014 HT1632C A.C. Characteristics VDD=2.4V~5.5V, Ta=25°C (Unless otherwise specified) Symbol Test Conditions Parameter Conditions VDD Min. Typ. Max. Unit 230 256 282 kHz — fSYS/2624 — Hz fSYS System Clock 5V fLED LED Duty Cycle & Frame Frequency 5V 1/16 duty — fSYS/2624 — Hz fCLK1 Serial Data Clock (WR pin) 5V Duty cycle 50% — — 1 MHz fCLK2 Serial Data Clock (RD pin) 5V Duty cycle 50% — — 500 kHz tCS Serial Interface Reset Pulse Width — CS 250 — — ns tCLK WR, RD Input Pulse Width 5V µs tr, tf Rise/Fall Time Serial Data Clock Width (Figure 1) tsu On-chip RC oscillator 1/8 duty Write mode 0.5 — — Read mode 1.0 — — — — — 50 100 ns Setup Time for DATA to WR, RD Clock Width (Figure 2) — — 50 100 — ns th Hold Time for DATA to WR, RD, Clock Width (Figure 2) — — 100 200 — ns tsu1 Setup Time for CS to WR, RD, Clock Width (Figure 3) — — 200 300 — ns th1 Hold Time for CS to WR, RD, Clock Width (Figure 3) — — 100 200 — ns tod Data Output Delay Time (Figure 4) — — — 100 200 ns 5 0 % W R , R D C lo c k th u 1 1 5 0 % F ir s t C lo c k L a s t C lo c k S V D D G N D V G N D D D Figure 3 Rev. 1.30 Figure 2 tC ts Figure 1 C S Figure 4 4 February 11, 2014 HT1632C Functional Description directly mapped to the contents of the LED driver. If the data in RAM is set to ″1″, the corresponding LED will be lighted. Data in the RAM can be accessed by the READ, WRITE, and READ-MODIFY-WRITE commands. The contents of the RAM can be read or written from bit 0 of the specific address. The following is a mapping from the RAM to the LED pattern: Display Memory − RAM The static display memory (RAM) is organized into 64×4 bits or 96×4 bits and is used to store the display data. If 32 ROW & 8 COM is selected, the RAM size is 64×4 bits. If 24 ROW & 16 COM is selected, the RAM size is 96×4 bits. The contents of the RAM are COM7 COM6 COM5 COM4 COM3 COM2 COM1 COM0 ROW0 01H 00H ROW1 03H 02H ROW2 05H 04H ROW3 07H 06H ROW4 09H 08H ROW5 0BH 0AH ROW6 0DH 0CH ROW7 0FH 0EH ROW8 11H 10H ROW9 13H 12H ROW10 15H 14H ROW11 17H 16H ROW12 19H 18H ROW13 1BH 1AH ROW14 1DH 1CH ROW15 1FH 1EH ROW16 21H 20H ROW17 23H 22H ROW18 25H 24H ROW19 27H 26H ROW20 29H 28H ROW21 2BH 2AH ROW22 2DH 2CH ROW23 2FH 2EH ROW24 31H 30H ROW25 33H 32H ROW26 35H 34H ROW27 37H 36H ROW28 39H 38H ROW29 3BH 3AH ROW30 3DH 3CH ROW31 3FH 3EH D3 D2 D1 D0 Addr. Data D3 D2 D1 D0 Addr. Data 32 ROW & 8 COM for 64×4 Display RAM Rev. 1.30 5 February 11, 2014 HT1632C COM15 COM14 COM13 COM12 ......... COM3 COM2 COM1 COM0 ROW0 03H ROW1 07H 04H ROW2 0BH 08H ROW3 0FH 0CH ROW4 13H 10H ROW5 17H 14H ROW6 1BH 18H ROW7 1FH 1CH ROW8 23H 20H ROW9 27H 24H ROW10 2BH 28H ROW11 2FH 2CH ROW12 33H 30H ROW13 37H 34H ROW14 3BH 38H ......... 00H ROW15 3FH 3CH ROW16 43H 40H ROW17 47H 44H ROW18 4BH 48H ROW19 4FH 4CH 50H ROW20 53H ROW21 57H 54H ROW22 5BH 58H ROW23 5FH D3 D2 D1 D0 ......... Addr. Data 5CH D3 D2 D1 D0 Addr. Data 24 ROW & 16 COM for 96×4 Display RAM Rev. 1.30 6 February 11, 2014 HT1632C System Oscillator O S C The HT1632C system clock is used to generate the time base clock frequency, LED-driving clock. The clock may be sourced from an on-chip RC oscillator (256kHz), or an external clock using the S/W setting. The configuration of the system oscillator is as shown. After the SYS DIS command is executed, the system clock will stop and the LED duty cycle generator will turn off. This command is, however, available only for the on-chip RC oscillator. Once the system clock stops, the LED display will become blank, and the time base will also lose its function. The LED OFF command is used to turn the LED duty cycle generator off. After the LED duty cycle generator switches off by issuing the LED OFF command, using the SYS DIS command reduces power consumption, serving as a system power down command. But if the external clock source is chosen as the system clock, using the SYS DIS command can neither turn the oscillator off nor execute the power down mode. The crystal oscillator option can be applied to connect an external frequency source to the OSC pin. In this case, the system fails to enter the power down mode, similar to the case in the external clock source operation. At the initial system power on, the HT1632C is in the SYS DIS state. S y s te m C lo c k O n - c h ip R C O s c illa to r 2 5 6 k H z System Oscillator Configuration LED Driver The HT1632C has a 256 (32×8) and 384 (24×16) pattern LED driver. It can be configured in a 32×8 or 24×16 pattern and common pad N-MOS open drain output or P-MOS open drain output LED driver using the S/W configuration. This feature makes the HT1632C suitable for multiple LED applications. The LED-driving clock is derived from the system clock. The driving clock frequency is always 256kHz, an onchip RC oscillator frequency, or an external frequency. The LED corresponding commands are summarized in the table. The bold form of 1 0 0, namely 1 0 0, indicates the command mode ID. If successive commands have been issued, the command mode ID except for the first command will be omitted. The LED OFF command turns the LED display off by disabling the LED duty cycle generator. The LED ON command, on the other hand, turns the LED display on by enabling the LED duty cycle generator. Command Code Name E x te r n a l C lo c k S o u r c e Function LED OFF 10000000010X Turn off LED outputs LED ON 10000000011X Turn on LED outputs 1000010abXXX ab=00: N-MOS open drain output and 8 common option ab=01: N-MOS open drain output and 16 common option ab=10: P-MOS open drain output and 8 common option ab=11: P-MOS open drain output and 16 common option Commons Option Cascade Operation For the cascade operation, the first IC is set to master mode and its SYNC and OSC pins are set to output pins. The second IC is set to slave mode and its SYNC and OSC pins are set to input pins which are connected to the the master IC. Please refer to the ″Cascade control flow chart″ for detail settings. Blinker The HT1632C has display blinking capabilities. The blink function generates all LED blinking. The blink rates is 0.25s LED on and 0.25s LED off for one blinking period . This blinking function can be effectively performed by setting the BLINK ON or BLINK OFF command. Example of Waveform for Blinker Rev. 1.30 7 February 11, 2014 HT1632C Command Format The command mode consists of a system configuration command, a system frequency selection command, a LED configuration command, and an operating command. The data mode, on the other hand, includes READ, WRITE, and READ-MODIFY-WRITE operations. The S/W setting can configure the HT1632C. There are two mode commands to configure the HT1632C resources and to transfer the LED display data. The configuration mode of the HT1632C is knows as the command mode,with a command mode ID of 1 0 0. LED Driver Mode Output Waveform N-MOS Open Drain of 32×8 Driver Mode 320*tCLK 8*tCLK ~ ROW0~ROW31 ON OFF 324*tCLK OFF COM0 ON 4*tCLK OFF COM1 ON OFF COM2 ON ~ OFF COM5 ON OFF COM6 ON OFF COM7 ON 1/2*tCLK SYNC 1 Frame = 8*328*tCLK Note: tCLK=1/fSYS P-MOS Open Drain of 24×16 Driver Mode (COM pin with Transistor Buffer) 160*tCLK 4*tCLK ROW0~ROW23 ~ 162*tCLK ON OFF ON COM0 OFF 2*tCLK ON COM1 OFF ON COM2 OFF ~ ON ROW26/COM13 OFF ON ROW25/COM14 OFF ON ROW24/COM15 OFF 1/2*tCLK SYNC 1 Frame = 16*164*tCLK Note: tCLK=1/fSYS Rev. 1.30 8 February 11, 2014 HT1632C Digital Dimming The Display Dimming capabilities of the HT1632 are very versatile. The whole display can be dimmed using pulse width modulation techniques for the ROW driver with the Dimming command. The relationship between ROW and COM digital dimming duty time are shown as below: OFF COM ROW 1/16 Duty ROW 2/16 Duty ROW 3/16 Duty ON ON 1*T OFF ON 2*T OFF ON 3*T ROW 4/16 Duty ROW 5/16 Duty ROW 6/16 Duty ROW 7/16 Duty ROW 8/16 Duty ROW 9/16 Duty ROW 10/16 Duty ROW 11/16 Duty OFF ON 4*T OFF ON 5*T OFF ON 6*T OFF ON 7*T OFF ON 8*T OFF ON 9*T OFF ON 10*T OFF ON 11*T ROW 12/16 Duty ROW 13/16 Duty ROW 14/16 Duty ROW 15/16 Duty ROW 16/16 Duty OFF ON 12*T OFF ON 13*T OFF ON 14*T OFF 15*T 16*T ON OFF ON OFF Note: (1) T=20 × tCLK (32×8 driver mode) (2) T=10 × tCLK (24×16 driver mode) (3) tCLK=1/fSYS Rev. 1.30 9 February 11, 2014 HT1632C Interfacing The following are the data mode ID and the command mode ID: Operation Mode ID Read Data 110 Write Data 101 Read-Modify-Write Data 101 Command 100 Command Only four lines are required to interface to the HT1632C. The CS line is used to initialise the serial interface circuit and to terminate the communication between the host controller and the HT1632C. If the CS pin is set to 1, the data and command issued between the host controller and the HT1632C are first disabled and then initialised. Before issuing a mode command or mode switching, a high level pulse is required to initialise the serial interface of the HT1632C. The DATA line is the serial data input/ output line. Data to be read or written or commands to be written have to be passed through the DATA line. The RD line is the READ clock input. Data in the RAM is clocked out on the falling edge of the RD signal, and the clocked out data will then appear on the DATA line. It is recommended that the host controller reads in the correct data during the interval between the rising edge and the next falling edge of the RD signal. The WR line is the WRITE clock input. The data, address, and command on the DATA line are all clocked into the HT1632 on the rising edge of the WR signal. The mode command should be issued before the data or command is transferred. If successive commands have been issued, the command mode ID, namely 1 0 0, can be omitted. While the system is operating in the non-successive command or the non-successive address data mode, the CS pin should be set to ″1″ and the previous operation mode will be reset also. Once the CS pin returns to ″0″, a new operation mode ID should be issued first. Timing Diagrams READ Mode − Command Code = 1 1 0 C S W R R D D A T A 1 1 0 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 M e m o ry A d d re s s 1 (M A 1 ) D a ta (M A 1 ) 1 1 0 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 M e m o ry A d d re s s 2 (M A 2 ) D a ta (M A 2 ) READ Mode − Successive Address Reading C S W R R D D A T A Rev. 1.30 1 1 0 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 M e m o ry A d d re s s (M A ) D a ta (M A ) D a ta (M A + 1 ) D a ta (M A + 2 ) D a ta (M A + 3 ) 10 February 11, 2014 HT1632C WRITE Mode − Command Code = 1 0 1 C S W R D A T A 1 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 M e m o ry A d d re s s 1 (M A 1 ) D a ta (M A 1 ) 1 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 M e m o ry A d d re s s 2 (M A 2 ) D a ta (M A 2 ) WRITE Mode − Successive Address Writing C S W R 1 D A T A 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 M e m o ry A d d re s s (M A ) D a ta (M A ) D a ta (M A + 1 ) D a ta (M A + 2 ) D a ta (M A + 3 ) READ-MODIFY-WRITE Mode − Command Code = 1 0 1 C S W R R D 1 D A T A 0 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 M e m o ry A d d re s s 1 (M A 1 ) D a ta (M A 1 ) D a ta (M A 1 ) 1 1 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 M e m o ry A d d re s s 2 (M A 2 ) D a ta (M A 2 ) READ-MODIFY-WRITE Mode − Successive Address Accessing C S W R R D D A T A Rev. 1.30 1 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 M e m o ry A d d re s s (M A ) D a ta (M A ) D a ta (M A ) D a ta (M A + 1 ) D a ta (M A + 1 ) D a ta (M A + 2 ) 11 February 11, 2014 HT1632C Command Mode − Command Code = 1 0 0 C S W R D A T A 1 0 0 C 8 C 7 C 6 C 5 C 4 C 3 C 2 C 1 C 0 C 8 C 7 C 6 C 5 C 4 C 3 C 2 C 1 C 0 C o m m a n d 1 C o m m a n d ... C o m m a n d i C o m m a n d o r D a ta M o d e Mode − Data and Command Mode Rev. 1.30 12 February 11, 2014 HT1632C Application Circuits Low Power LED Application (Direct Drive) 32 ROW × 8 COM Example Note: Values of the ″R″ resistors are selected depending on the power consumption of the LEDs. 24 ROW × 16 COM Example Note: Values of the ″R″ resistors are selected depending on the power consumption of the LEDs. Rev. 1.30 13 February 11, 2014 HT1632C Middle Power LED Application (COM with Transistor Buffer) 32 ROW × 8 COM Example Note: Values of the ″R″ resistors are selected depending on the power consumption of the LEDs. 24 ROW × 16 COM Example Note: Values of the ″R″ resistors are selected depending on the power consumption of the LEDs. Rev. 1.30 14 February 11, 2014 HT1632C High Power LED Application (ROW & COM with Transistor Buffer) 32 ROW × 8 COM Example Note: Values of the ″R″ resistors are selected depending on the power consumption of the LEDs. Rev. 1.30 15 February 11, 2014 HT1632C 24 ROW × 16 COM Example Note: Values of the ″R″ resistors are selected depending on the power consumption of the LEDs. Rev. 1.30 16 February 11, 2014 HT1632C Cascade Function 32 ROW × 8 COM Example (Direct Drive) Note: 1. It also can set cascade mode by software. User must set the Master in master mode and Slaves in slave mode with command. The CS pin must be connected to MCU individually for independent read and write. 2. Values of the ″R″ resistors are selected depending on the power consumption of the LEDs. Rev. 1.30 17 February 11, 2014 HT1632C 32 ROW × 8 COM Example (COM with Transistor Buffer) Note: 1. It also can set cascade mode by software. User must set the Master in master mode and Slaves in slave mode with command. The CS pin must be connected to MCU individually for independent read and write. 2. Values of the ″R″ resistors are selected depending on the power consumption of the LEDs. Rev. 1.30 18 February 11, 2014 HT1632C 24 ROW × 16 COM Example (Direct Drive) Note: 1. It also can set cascade mode by software. User must set the Master in master mode and Slaves in slave mode with command. The CS pin must be connected to MCU individually for independent read and write. 2. Values of the ″R″ resistors are selected depending on the power consumption of the LEDs. Rev. 1.30 19 February 11, 2014 HT1632C 24 ROW × 16 COM Example (COM with Transistor Buffer) Note: 1. It also can set cascade mode by software. User must set the Master in master mode and Slaves in slave mode with command. The CS pin must be connected to MCU individually for independent read and write. 2. Values of the ″R″ resistors are selected depending on the power consumption of the LEDs. Rev. 1.30 20 February 11, 2014 HT1632C Cascade Control Flow Command Summary Name ID Command Code D/C Function READ 1 1 0 A6A5A4A3A2A1A0D0D1D2D3 D Read data from the RAM WRITE Default 1 0 1 A6A5A4A3A2A1A0D0D1D2D3 D Write data to the RAM READ-MODIFY1 0 1 A6A5A4A3A2A1A0D0D1D2D3 WRITE D Read and Write data to the RAM SYS DIS 1 0 0 0000-0000-X C Turn off both system oscillator and LED duty cycle generator SYS EN 1 0 0 0000-0001-X C Turn on system oscillator LED Off 1 0 0 0000-0010-X C Turn off LED duty cycle generator LED On 1 0 0 0000-0011-X C Turn on LED duty cycle generator BLINK Off 1 0 0 0000-1000-X C Turn off blinking function BLINK On 1 0 0 0000-1001-X C Turn on blinking function C Set slave mode and clock source from external clock, the system clock input from OSC pin and synchronous signal input from SYN pin C Set master mode and clock source from on-chip RC oscillator, the system clock output to OSC pin and synchronous signal output to SYN pin SLAVE Mode RC Master Mode Rev. 1.30 1 0 0 0001-0XXX-X 1 0 0 0001-10XX-X 21 Yes Yes Yes Yes February 11, 2014 HT1632C Name EXT CLK Master Mode COM Option PWM Duty ID Command Code D/C Function C Set master mode and clock source from external clock, the system clock input from OSC pin and synchronous signal output to SYN pin 1 0 0 0010-abXX-X C ab=00: N-MOS open drain output and 8 COM option ab=01: N-MOS open drain output and 16 COM option ab=10: P-MOS open drain output and 8 COM option ab=11: P-MOS open drain output and 16 COM option 1 0 0 101X-0000-X C PWM 1/16 duty 1 0 0 101X-0001-X C PWM 2/16 duty 1 0 0 101X-0010-X C PWM 3/16 duty 1 0 0 101X-0011-X C PWM 4/16 duty 1 0 0 101X-0100-X C PWM 5/16 duty 1 0 0 101X-0101-X C PWM 6/16 duty 1 0 0 101X-0110-X C PWM 7/16 duty 1 0 0 101X-0111-X C PWM 8/16 duty 1 0 0 101X-1000-X C PWM 9/16 duty 1 0 0 101X-1001-X C PWM 10/16 duty 1 0 0 101X-1010-X C PWM 11/16 duty 1 0 0 101X-1011-X C PWM 12/16 duty 1 0 0 101X-1100-X C PWM 13/16 duty 1 0 0 101X-1101-X C PWM 14/16 duty 1 0 0 101X-1110-X C PWM 15/16 duty 1 0 0 101X-1111-X C PWM 16/16 duty 1 0 0 0001-11XX-X Default ab =00 Yes Note: X: Don′t care A6~A0: RAM addresses D3~D0: RAM data D/C: Data/command mode Default: Power on reset default All the bold forms, namely 1 1 0, 1 0 1, and 1 0 0, are mode commands. Among these, 1 0 0 indicates the command mode ID. If successive commands have been issued, the command mode ID except for the first command will be omitted. The source of the tone frequency and of the time base clock frequency can be derived from an on-chip RC oscillator or an external clock. Calculation of the frequency is based on the system frequency sources as stated above. It is recommended that the host controller should initialize the HT1632C after power on reset, for power on reset may fail, which in turn leads to the malfunction of the HT1632C Rev. 1.30 22 February 11, 2014 HT1632C Package Information Note that the package information provided here is for consultation purposes only. As this information may be updated at regular intervals users are reminded to consult the Holtek website for the latest version of the package information. Additional supplementary information with regard to packaging is listed below. Click on the relevant section to be transferred to the relevant website page. • Further Package Information (include Outline Dimensions, Product Tape and Reel Specifications) • Packing Meterials Information • Carton information Rev. 1.30 23 February 11, 2014 HT1632C 52-pin LQFP (14mm × 14mm) Outline Dimensions Symbol A Dimensions in inch Min. Nom. Max. 0.622 0.630 0.638 B 0.547 0.551 0.555 C 0.622 0.630 0.638 D 0.547 0.551 0.555 E ― 0.039 BSC ― F 0.015 ― 0.019 G 0.053 0.055 0.057 H — — 0.063 I 0.002 — 0.008 J 0.018 — 0.030 K 0.005 — 0.007 α 0° ― 7° Symbol Rev. 1.30 Dimensions in mm Min. Nom. Max. A 15.80 16.00 16.20 B 13.90 14.00 14.10 C 15.80 16.00 16.20 D 13.90 14.00 14.10 E — 1.00 BSC — F 0.39 — 0.48 G 1.35 1.40 1.45 H — — 1.60 I 0.05 — 0.20 J 0.45 — 0.75 K 0.13 — 0.18 α 0° ― 7° 24 February 11, 2014 HT1632C Copyright© 2014 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek's products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. Rev. 1.30 25 February 11, 2014