HD74LS191 Synchronous Up / Down 4-bit Binary Counter (single clock line) REJ03D0453–0200 Rev.2.00 Feb.18.2005 Synchronous operation is provided by having all flip-flops clocked simultaneously so that the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple clock) counters. The outputs of the four master-slave flip-flops are triggered on a low-to-high-level transition of the clock input if the enable input is high. The direction of the count is determined by the level of the down / up input. When low, the counter counts up and when high, it counts down. Level changes at the down / up input should be made only when the clock input is high. This counter is fully programmable; that is, the outputs may be preset to either level by placing a low on the load input and entering the desired data at the data inputs. The output will change to agree with the data inputs independently of the level of the clock input. This feature allows the counters to be used as modulo-N dividers by simply modifying the count length with the preset inputs. The clock, down / up, and load inputs are buffered to lower the drive requirement which significantly reduces the number of clock drivers, etc., required for long parallel words. Two outputs have been made available to perform the cascading function; ripple clock and made available to perform the cascading function; ripple clock and maximum / minimum count. The latter output produces a high-level output pulse with a duration approximately equal to one complete cycles to the clock when the counter overflows or underflows. The ripple clock output produces a low-level output pulse equal in width to the low-level portion of the clock input when an overflow or underflow condition exists. The counters can be easily cascaded by feeding the ripple clock output to the enable input of the succeeding counter if parallel clocking is used, or to the clock input if parallel enabling is used. The maximum / minimum count output can be used to accomplish look-ahead for high-speed operation. Features • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation Taping Abbreviation (Quantity) HD74LS191P DILP-16 pin PRDP0016AE-B (DP-16FV) P — HD74LS191FPEL SOP-16 pin (JEITA) PRSP0016DH-B (FP-16DAV) FP EL (2,000 pcs/reel) Note: Please consult the sales office for the above package availability. Rev.2.00, Feb.18.2005, page 1 of 10 HD74LS191 Pin Arrangement Data B Input 1 QB 2 QB QA 3 QA Enable G 4 G Down/Up 5 QC 16 VCC 15 Data A CK 14 Clock Ripple Clock 13 Ripple Clock Dn/Up Max/ Min 12 Max/Min 6 QC Load 11 Load QD 7 QD C 10 Data C GND 8 9 Data D B A Outputs Inputs Inputs Outputs Outputs D (Top view) Rev.2.00, Feb.18.2005, page 2 of 10 Inputs HD74LS191 Block Diagram Clock Ripple Clock Down/Up Max/Min Output Data Input A Preset J QA Output QA CK Enable G K QA Clear Data Input B Preset J QB Output QB CK K QB Clear Data Input C Preset J QC Output QC CK K QC Clear Data Input D Preset J QD Output QD CK K QD Clear Load Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage VCC 7 V Input voltage VIN 7 V PT 400 mW Tstg –65 to +150 °C Power dissipation Storage temperature Note: Voltage value, unless otherwise noted, are with respect to network ground terminal. Rev.2.00, Feb.18.2005, page 3 of 10 HD74LS191 Recommended Operating Conditions Item Symbol Min Typ Max Unit VCC 4.75 5.00 5.25 V IOH — — –400 µA IOL — — 8 mA Operating temperature Topr –20 25 75 °C Clock frequency ƒclock 0 — 20 MHz Clock pulse width tw (CK) 25 — — ns Load pulse width tw (Load) 35 — — ns Setup time tsu 20 — — ns Hold time th (data) 3 — — ns Enable time tenable 40 — — ns Supply voltage Output current Electrical Characteristics (Ta = –20 to +75 °C) Item Input voltage Symbol VIH VIL VOH Output voltage VOL Input current Enable Others Enable Others Enable Others IIH IIL II min. 2.0 — typ.* — — max. — 0.8 Unit V V 2.7 — — V — — — — — — — — — — — — — — — — 0.4 0.5 60 20 –1.2 –0.4 0.3 0.1 V VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V, IOH = –400 µΑ IOL = 4 mA VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V IOL = 8 mA µA VCC = 5.25 V, VI = 2.7 V mA VCC = 5.25 V, VI = 0.4 V mA VCC = 5.25 V, VI = 7 V Short-circuit output IOS –20 — –100 mA current Supply current** ICC — 20 35 mA Input clamp voltage VIK — — –1.5 V Notes: * VCC = 5 V, Ta = 25°C ** ICC is measured with all outputs open and all inputs grounded. Rev.2.00, Feb.18.2005, page 4 of 10 Condition VCC = 5.25 V VCC = 5.25 V VCC = 4.75 V, IIN = –18 mA HD74LS191 Switching Characteristics (VCC = 5 V, Ta = 25°C) Item Maximum clock frequency Propagation delay time Symbol Inputs Outputs min. typ. max. Unit ƒmax Clock QA, QB, QC, QD 20 25 — MHz Load QA, QB, QC, QD Data A, B, C, D QA, QB, QC, QD Clock Ripple Clock Clock QA, QB, QC, QD Clock Max / Min Down / Up Ripple Clock Down / Up Max / Min Enable Ripple Clock — — — — — — — — — — — — — — — 22 33 20 27 13 16 16 24 28 37 30 30 21 22 21 33 50 32 40 20 24 24 36 42 52 45 45 33 33 33 — 22 33 tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Rev.2.00, Feb.18.2005, page 5 of 10 Condition ns ns ns ns ns ns ns ns CL = 15 pF, RL = 2 kΩ HD74LS191 Count Sequences Load A B C D Clock Down/Up Enable G QA QB QC QD Max/Min Ripple Clock 13 14 15 0 Count Up 1 2 2 Inhibit 1 0 15 Count Down Load Illustrated below is the following sequence: 1. Load (preset) to binary thirteen. 2. Count up to fourteen, fifteen (maximum), zero, one and two. 3. Inhibit 4. Count down to one, zero (minimum), fifteen, fourteen, and thirteen. Rev.2.00, Feb.18.2005, page 6 of 10 14 13 HD74LS191 Testing Method Test Circuit VCC Output 4.5V RL Ripple Clock Enable Down/Up Clock See Testing Table Input P.G. Zout = 50Ω Load circuit 1 CL Output Max/Min Same as Load Circuit 1. Output A B QA Same as Load Circuit 1. Output C D Load QB Same as Load Circuit 1. Output QC Same as Load Circuit 1. Output QD Notes: Same as Load Circuit 1. 1. CL includes probe and jig capacitance. 2. All diodes are 1S2074(H). Waveforms 1 tTHL tTLH 3V 90% 1.3V Data Input 90% 1.3V 10% 10% tsu 0V tsu 3V Load Input 1.3V 10% 90% tTLH 1.3V 10% 90% 0V tTLH VOH Output VOL Note: Input pulse: tTLH, tTHL ≤ 10 ns, PRR = 1 MHz, duty cycle ≤ 50% Rev.2.00, Feb.18.2005, page 7 of 10 HD74LS191 Waveforms 2 Load→Q, Data→Q 3V Load 1.3V 1.3V 0V 3V 1.3V Data (A to D) 1.3V 0V VOH Output Q 1.3V 1.3V 1.3V 1.3V VOL tPHL tPLH Note: tPLH tPHL Conditions on other inputs are irrelevant. Waveforms 3 G→Ripple CK, CK→Ripple CK, Down / Up→Ripple CK, Down / Up→Max / Min 3V Load 0V 3V Down/Up 1.3V 1.3V 0V 3V Clock 1.3V 1.3V 0V 3V G 0V tPHL tPLH tPHL tPLH VOH Ripple/Clock 1.3V 1.3V 1.3V 1.3V VOL tPLH tPHL VOH Max/Min 1.3V 1.3V VOL Rev.2.00, Feb.18.2005, page 8 of 10 HD74LS191 Waveforms 4 Clock→Q 3V Load 0V 3V Data (A to D) 0V 3V Down/Up 0V 3V Clock 1.3V 1.3V 0V VOH Q Enable = 0V 1.3V 1.3V tPLH tPHL VOL Waveforms 5 Clock→Max / Min 3V Load 0V 3V A 0V Inputs 3V B, C, D 0V 3V Down/Up 0V 3V Clock 1.3V 1.3V 1.3V 1.3V 0V VOH Max/Min Enable = 0V 1.3V 1.3V 1.3V 1.3V VOL tPLH Rev.2.00, Feb.18.2005, page 9 of 10 tPHL tPLH tPHL HD74LS191 Package Dimensions JEITA Package Code P-DIP16-6.3x19.2-2.54 RENESAS Code PRDP0016AE-B MASS[Typ.] 1.05g Previous Code DP-16FV D 9 E 16 1 8 b3 0.89 Z A1 A Reference Symbol L e Nom θ c e1 D 19.2 E 6.3 JEITA Package Code P-SOP16-5.5x10.06-1.27 RENESAS Code PRSP0016DH-B *1 Previous Code FP-16DAV 7.4 A1 0.51 b p 0.40 b 3 0.48 0.56 1.30 c 0.19 θ 0° e 2.29 0.25 0.31 2.54 2.79 15° 1.12 L 2.54 MASS[Typ.] 0.24g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. D F 16 20.32 5.06 Z ( Ni/Pd/Au plating ) Max 7.62 1 A bp e Dimension in Millimeters Min 9 c HE *2 E bp Index mark Reference Symbol Terminal cross section ( Ni/Pd/Au plating ) 1 Z *3 bp Nom D 10.06 E 5.50 Max 10.5 A2 8 e Dimension in Millimeters Min x A1 M 0.00 0.10 0.20 0.34 0.40 0.46 0.15 0.20 0.25 7.80 8.00 A L1 2.20 bp b1 c A c A1 θ y L Detail F 1 θ 0° HE 7.50 e 1.27 x 0.12 y 0.15 0.80 Z L L Rev.2.00, Feb.18.2005, page 10 of 10 8° 0.50 1 0.70 1.15 0.90 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. http://www.renesas.com RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 © 2005. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .2.0