HD74LS669 Synchronous Up / Down 4-bit Binary Counter REJ03D0493–0200 Rev.2.00 Feb.18.2005 This synchronous preset table 4-bit binary counter features an internal carry look-ahead for cascading in high-speed counting applications. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable inputs and internal gating. This mode of operation helps eliminate the output counting spikes that are normally associated with asynchronous (ripple-clock) counters. A buffered clock input trigger the four master-slave flip-flops on the rising (positive-going) edge of the clock waveform. This counter is fully programmable; that is, the outputs may each be preset to either level. the load input circuitry allows loading with the carry-enable output of cascaded counters. As loading is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the data inputs after the next clock pulse. The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are two count enable inputs and a carry output. Both count enable inputs (P and T) must be low to count. The direction of the count is determined by the level of the up / down input. when the input is high, the counter counts up; when low, it counts down. Input T is fed forward to enable the carry output. The carry output thus enabled will produce a low-level output pulse with a duration approximately equal to the high portion of the QA output when counting up and approximately equal to the low portion of the QA output when counting down. This low level overflow carry pulse can be used to enable successive cascaded stages. Transitions at the enable P or T inputs are allowed regardless of the level of the clock input. All inputs are diodeclamped to minimize transmission-line effects, thereby simplifying system design. This counter features a fully independent clock circuit. Changes at control inputs (enable P, enable T, load, up / down) that will modify the operating mode have no effect until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) will be dictated solely by the conditions meeting the stable setup and hold times. Features • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation PRSP0016DH-B FP (FP-16DAV) Note: Please consult the sales office for the above package availability. HD74LS669FPEL SOP-16 pin (JEITA) Rev.2.00, Feb.18.2005, page 1 of 8 Taping Abbreviation (Quantity) EL (2,000 pcs/reel) HD74LS669 Pin Arrangement U/D 1 16 VCC CK 2 15 Ripple Carry Output A 3 14 QA B 4 13 QB C 5 12 QC D 6 11 QD Enable P 7 10 Enable T GND 8 9 Load Data Inputs Outputs (Top view) Block Diagram Clock U/D D Q QA CK Q Load Enable P Enable T D Q Data A QB CK Q Data B D Q QC CK Q Data C D Q QD CK Q Data D Rev.2.00, Feb.18.2005, page 2 of 8 Ripple Carry Output HD74LS669 Absolute Maximum Ratings Symbol Ratings Unit Supply voltage Item VCC 7 V Input voltage VIN 7 V Power dissipation PT 400 mW Tstg –65 to +150 °C Storage temperature Note: Voltage value, unless otherwise noted, are with respect to network ground terminal. Recommended Operating Conditions Item Symbol Min Typ VCC 4.75 5.00 5.25 V IOH — — –400 µA Supply voltage Output current Operating temperature Max Unit IOL — — 8 mA Topr –20 25 75 °C Count frequency ƒcount 0 — 25 MHz Clock pulse width tw (CK) 25 — — ns 25 — — 35 — — 30 — — Input Data A, B, C, D Enable P, T Setup time tsu Load Up/Down Hold time th 35 — — 0 — — ns ns Electrical Characteristics (Ta = –20 to +75 °C) Item Input voltage Symbol VIH VIL min. 2.0 — typ.* — — max. — 0.8 Unit V V VOH 2.7 — — V — — 0.4 V — — — 0.5 20 20 V IIH — — — VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V, IOH = –400 µA IOL = 4 mA VCC = 4.75 V, IOL = 8 mA VIH = 2 V, VIL = 0.8 V µA VCC = 5.25 V, VI = 2.7 V IIL — — — — — — 40 –0.4 –0.4 mA VCC = 5.25 V, VI = 0.4 V — — — — –0.8 0.1 — — 0.1 mA VCC = 5.25 V, VI = 7 V Output voltage VOL Input current A, B, C, D, P, U/D Clock, T Load A, B, C, D, P, U/D Clock, T Load A, B, C, D, P, U/D Clock, T II Condition Load — — 0.2 Short-circuit output current IOS –20 — –100 mA VCC = 5.25 V Supply current** ICC — 20 34 mA VCC = 5.25 V Input clamp voltage VIK — — –1.5 V VCC = 4.75 V, IIN = –18 mA Notes: * VCC = 5 V, Ta = 25°C ** ICC is measured after applying a momentary 4.5 V, then ground, to clock input with all other inputs grounded the outputs open. Rev.2.00, Feb.18.2005, page 3 of 8 HD74LS669 Switching Characteristics (VCC = 5 V, Ta = 25°C) Item Maximum clock frequency Propagation delay time Symbol ƒmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Inputs Outputs Clock Ripple Carry Clock QA to QD Enable T Ripple Carry Up/Down Ripple Carry min. 25 — — — — — — — — typ. 32 26 40 18 18 11 29 22 26 max. — 40 60 27 27 17 45 35 40 Unit MHz ns ns CL = 15 pF, RL = 2 kΩ ns ns Count Sequence Load A Data Inputs B C D Clock U/D P and T QA QB QC QD Ripple Carry Output 13 14 15 0 Count Up Load Rev.2.00, Feb.18.2005, page 4 of 8 1 2 2 Inhibit 2 1 0 15 Condition 14 Count Down 13 HD74LS669 Testing Method Test Circuit VCC Output 4.5V RL Load circuit 1 QA CL U/D Input Input P.G. Zout = 50Ω See Waveforms P.G. Zout = 50Ω A C E·P Same as Load Circuit 1. Output QC Same as Load Circuit 1. Output D QD Same as Load Circuit 1. Output Load 1. CL includes probe and jig capacitance. 2. All diodes are 1S2074(H). Rev.2.00, Feb.18.2005, page 5 of 8 QB B E·T Notes: Output CK RCO Same as Load Circuit 1. HD74LS669 Waveforms 1 tTLH tTHL 3V Clock 90% 1.3V 90% 1.3V 1.3V 1.3V 1.3V 10% 10% tw (CK) tsu Load 0V tw (CK) tsu 3V th 1.3V 1.3V 0V tsu th 3V Data Inputs A, B, C, D 1.3V 1.3V 0V tsu th 3V Enable P or Enable T 1.3V 1.3V 0V tsu th tsu th 3V Up/Down 1.3V 1.3V 1.3V 1.3V 0V 3V Enable T Input 1.3V 1.3V tPHL tPLH 0V Ripple Carry Output Notes: VOH 1.3V 1.3V VOL 1. tPLH and tPHL from enable T input to ripple carry output assume that the counter is at the maximum count (QA through QD high). 2. Propagation delay time from up / douwn to ripple carry must be measured with the counter at either aminimum or a maximum count. As the logic level of the up / down input is changed, the riiple carry output will follow. If the count is minimum (0) are ripple carry output transition will be in phase. If the count is macimum (15) the ripple carry output will be out of phase. 3. Input pulse; tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz Rev.2.00, Feb.18.2005, page 6 of 8 HD74LS669 Waveforms 2 tTLH tTHL 3V 90% Clock 10% tPLH QA 1.3V 1.3V (Measure at tn + 1) 10% tw (CK) 1.3V 1.3V 0V tPHL (Measure at tn + 2) VOH 1.3V 1.3V tPHL tPLH (Measure at tn + 2) (Measure at tn + 4) QB 1.3V VOL VOH 1.3V VOL tPLH (Measure at tn + 4) tPHL (Measure at tn + 8) QC 1.3V VOH 1.3V VOL tPHL (Measure at tn + 16) QD tPLH (Measure at tn + 8) 1.3V VOH 1.3V VOL tPLH Ripple Carry Output Notes: (Measure before 1 clock of tn + 16) tPHL (Measure at tn + 16) VOH 1.3V 1.3V 1. Input pulse; tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz, duty cycle 50%. 2. For ƒmax tTLH = tTHL ≤ 2.5 ns. 3. tn is the bit-time when all outputs are low. Rev.2.00, Feb.18.2005, page 7 of 8 VOL HD74LS669 Package Dimensions JEITA Package Code P-SOP16-5.5x10.06-1.27 RENESAS Code PRSP0016DH-B *1 Previous Code FP-16DAV MASS[Typ.] 0.24g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. D F 16 9 c HE *2 E bp Index mark Reference Symbol Terminal cross section ( Ni/Pd/Au plating ) 1 Z *3 bp Nom D 10.06 E 5.50 Max 10.5 A2 8 e Dimension in Millimeters Min x A1 M 0.00 0.10 0.34 0.40 0.46 0.15 0.20 0.25 7.80 8.00 A L1 0.20 2.20 bp b1 c A c A1 θ y L Detail F 1 θ 0° HE 7.50 e 1.27 x 0.12 y 0.15 0.80 Z L L Rev.2.00, Feb.18.2005, page 8 of 8 8° 0.50 1 0.70 1.15 0.90 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. http://www.renesas.com RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 © 2005. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .2.0