RENESAS HD74HC160P

HD74HC160/HD74HC161/HD74HC162/
HD74HC163
Synchronous Decade Counter (Direct Clear)
Synchronous 4-bit Binary Counter (Direct Clear)
Synchronous Decade Counter (Synchronous Clear)
Synchronous 4-bit Binary Counter (Synchronous Clear)
REJ03D0579-0200
(Previous ADE-205-455)
Rev.2.00
Oct 11, 2005
Description
The HD74HC160 and the HD74HC162 are 4 bit decade counters, and the HD74HC161 and the HD74HC163 are 4 bit
binary counters All flip-flops are clocked simultaneously on the low to high to transition (positive edge) of the clock
input waveform.
These counters may be preset using the load input. Presetting of all four flip-flops is synchronous to the rising edge of
clock. When load is held low counting is disabled and the data on the A, B, C, and D inputs is loaded into the counter
on the rising edge of clock. If the load input is taken high before the positive edge of clock the count operation will be
unaffected.
All of these counters may be cleared by the utilizing clear input. The clear function on the HD74HC162 and
HD74HC163 counters are synchronous to the clock. That is, the counters are cleared on the positive edge of clock
while the clear input is held low.
The HD74HC160 and HD74HC161 counters are cleared asynchronously. When the clear is taken low the counter is
cleared immediately regardless of the clock.
Two active high enable inputs Enable P and Enable T and a ripple carry output are provided to enable easy cascading of
counters. Both enable inputs must be high to count. The Enable T input also enables the Ripple Carry output. When
enabled, the Ripple Carry outputs a positive pulse when the counter overflows. This pulse is approximately equal in
duration to the high level portion of the QA outputs. The Ripple Carry output is fed to successive cascaded stages to
facilitate easy implementation of N-bit counters.
Features
•
•
•
•
•
High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Rev.2.00, Oct 11, 2005 page 1 of 14
HD74HC160, HD74HC161, HD74HC162, HD74HC163
• Ordering Information
Part Name
HD74HC160P
HD74HC161P
HD74HC162P
HD74HC163P
HD74HC160FPEL
HD74HC161FPEL
HD74HC162FPEL
HD74HC163FPEL
Package Type
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
DILP-16 pin
PRDP0016AE-B
(DP-16FV)
P
—
SOP-16 pin (JEITA)
PRSP0016DH-B
(FP-16DAV)
FP
EL (2,000 pcs/reel)
HD74HC160RPEL
HD74HC162RPEL
HD74HC163RPEL
SOP-16 pin (JEDEC)
PRSP0016DG-A
(FP-16DNV)
RP
EL (2,500 pcs/reel)
HD74HC161TELL
TSSOP-16 pin
PTSP0016JB-A
(TTP-16DAV)
T
ELL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
Outputs
Clear*
Load
Enable P
L
X
X
H
L
X
H
H
H
H
H
L
H
H
X
H : High level L : Low level X : Irrelevant
Note: 1. 162 and 163 Only-160 and 161 are Asynchronous Clear Devices
Decade Counter
Clock
1
Asynchronous clear
Synchronous clear
Enable T
X
X
H
X
L
Binary Counter
HD74HC160
HD74HC162
HD74HC161
HD74HC163
Pin Arrangement
Clear 1
16 VCC
A 3
A
CLR
Ripple
Carry
QA
B 4
Data
Inputs C 5
B
QB
13 QB
C
QC
12 QC
D 6
D
QD
11 QD
Enable P 7
P
Clock 2
CK
T
14 QA
10 Enable T
9 Load
GND 8
(Top view)
Rev.2.00, Oct 11, 2005 page 2 of 14
Ripple
15 Carry Output
Outputs
Load
Qn
Reset-clear
Load input data
Count
No count
No count
HD74HC160, HD74HC161, HD74HC162, HD74HC163
Logic Diagram
HD74HC160
Decade Counter with Asynchronous Clear
T1
CLR
C
C
Load
Load
P1
A
T2
CLR
C
C
Load
Load
P2
B
T3
CLR
C
C
Load
Load
P3
C
T4
CLR
C
C
Load
Load
P4
D
Enable P
VCC
Enable T
Clear
CLR
Clock
C
C
Load
Load
Load
Rev.2.00, Oct 11, 2005 page 3 of 14
QA
QA
QA
QB
QB
QB
QC
QC
QC
QD
QD
QD
Ripple
Carry
Output
HD74HC160, HD74HC161, HD74HC162, HD74HC163
HD74HC161
4-bit Binary Counter with Asynchronous Clear
T1
CLR
C
C
Load
Load
P1
A
T2
CLR
C
C
Load
Load
P2
B
T3
CLR
C
C
Load
Load
P3
C
T4
CLR
C
C
Load
Load
P4
D
Enable P
QA
QA
QB
QB
QB
QC
QC
QC
QD
QD
QD
Ripple
Carry
Output
Enable T
Clear
CLR
Clock
C
C
Load
Load
Load
Rev.2.00, Oct 11, 2005 page 4 of 14
QA
HD74HC160, HD74HC161, HD74HC162, HD74HC163
HD74HC162
Decade Counter with Synchronous Clear
QA
A
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
QB
B
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
QC
C
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
D
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
P
VCC
RCO
T
CK
CK
CK
LD
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Rev.2.00, Oct 11, 2005 page 5 of 14
QD
CLR
HD74HC160, HD74HC161, HD74HC162, HD74HC163
HD74HC163
4-bit Binary Counter with Synchronous Clear
QA
A
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
QB
B
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
QC
C
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
D
T
Q
CR
CR
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
P
RCO
T
CK
CK
CK
LD
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Rev.2.00, Oct 11, 2005 page 6 of 14
QD
CLR
HD74HC160, HD74HC161, HD74HC162, HD74HC163
Timing Diagram
HD74HC160/HD74HC162
Sequence illustrated in waveforms.
1.
2.
3.
4.
Clear outputs to zero.
Preset to BCD seven.
Count to eight, nine, zero, one, two and three.
Inhibit
Clear(HC160)
(Asynchronous)
Clear(HC162)
(Synchronous)
Load
A
Data
Inputs
B
C
D
Clock(HC160)
Clock(HC162)
Count
Enables
Enable P
Enable T
QA
Outputs
QB
QC
QD
Ripple
Carry
Output
7
Clear Load
Rev.2.00, Oct 11, 2005 page 7 of 14
8
9
0
1
Count
2
3
Inhibit
HD74HC160, HD74HC161, HD74HC162, HD74HC163
HD74HC161/HD74HC163
Sequence illustrated in waveforms.
1.
2.
3.
4.
Clear outputs to zero.
Preset to binary twelve.
Count to thirteen, fourteen, fifteen, zero, one and two.
Inhibit
Clear(HC161)
(Asynchronous)
Clear(HC163)
(Synchronous)
Load
A
Data
Inputs
B
C
D
Clock(HC161)
Clock(HC163)
Count
Enables
Enable P
Enable T
QA
Outputs
QB
QC
QD
Ripple
Carry
Output
12 13 14
Clear Load
Rev.2.00, Oct 11, 2005 page 8 of 14
15
0
Count
1
2
Inhibit
HD74HC160, HD74HC161, HD74HC162, HD74HC163
Absolute Maximum Ratings
Item
Supply voltage range
Input voltage
Output voltage
Output current
DC current drain per VCC, GND
DC input diode current
DC output diode current
Power dissipation per package
Storage temperature
Symbol
Rating
Unit
VCC
VIN
VOUT
IOUT
ICC, IGND
IIK
IOK
PT
Tstg
–0.5 to +7.0
–0.5 to VCC + 0.5
–0.5 to VCC + 0.5
±25
±50
±20
±20
500
–65 to +150
V
V
V
mA
mA
mA
mA
mW
°C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Recommended Operating Conditions
Item
Supply voltage
Symbol
VCC
Ratings
2 to 6
Unit
V
Input / Output voltage
Operating temperature
VIN, VOUT
Ta
0 to VCC
–40 to 85
V
°C
tr , tf
0 to 1000
0 to 500
ns
Input rise / fall time
*1
0 to 400
Note:
Conditions
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Electrical Characteristics
Ta = 25°C
Item
Input voltage
Symbol VCC (V)
VIH
VIL
Output voltage
VOH
VOL
Ta = –40 to+85°C
Unit
Test Conditions
2.0
Min
1.5
Typ
—
Max
—
Min
1.5
Max
—
4.5
6.0
3.15
4.2
—
—
—
—
3.15
4.2
—
—
2.0
4.5
—
—
—
—
0.5
1.35
—
—
0.5
1.35
6.0
2.0
—
1.9
—
2.0
1.8
—
—
1.9
1.8
—
4.5
6.0
4.4
5.9
4.5
6.0
—
—
4.4
5.9
—
—
4.5
6.0
4.18
5.68
—
—
—
—
4.13
5.63
—
—
2.0
4.5
—
—
0.0
0.0
0.1
0.1
—
—
0.1
0.1
6.0
4.5
—
—
0.0
—
0.1
0.26
—
—
0.1
0.33
—
—
—
—
0.26
±0.1
—
—
0.33
±1.0
IOL = 5.2 mA
µA Vin = VCC or GND
—
—
4.0
—
40
µA Vin = VCC or GND, Iout = 0 µA
Input current
Iin
6.0
6.0
Quiescent supply
current
ICC
6.0
Rev.2.00, Oct 11, 2005 page 9 of 14
V
V
V
Vin = VIH or VIL IOH = –20 µA
IOH = –4 mA
IOH = –5.2 mA
V
Vin = VIH or VIL IOL = 20 µA
IOL = 4 mA
HD74HC160, HD74HC161, HD74HC162, HD74HC163
Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25°C
Item
Maximum clock
frequency
Propagation delay
time
Setup time
Hold time
Removal time
Pulse width
Output rise/fall
time
Input capacitance
Symbol VCC (V)
fmax
tPLH, tPHL
tsu
th
trem
tw
tTLH, tTHL
Cin
Ta = –40 to +85°C
2.0
4.5
6.0
2.0
4.5
6.0
Min
—
—
—
—
—
—
Typ
—
—
—
—
18
—
Max
5
25
29
160
32
27
Min
—
—
—
—
—
—
Max
4
20
23
200
40
34
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
—
—
—
—
—
—
—
—
—
—
23
—
—
15
—
—
16
—
225
45
38
150
30
26
200
40
34
—
—
—
—
—
—
—
—
—
280
56
48
190
38
33
250
50
43
2.0
4.5
6.0
2.0
125
25
21
125
—
9
—
—
—
—
—
—
156
31
26
156
—
—
—
—
4.5
6.0
25
21
15
—
—
—
31
26
—
—
2.0
4.5
125
25
—
—
—
—
156
31
—
—
6.0
2.0
4.5
6.0
2.0
4.5
6.0
21
0
0
0
100
20
17
—
—
–7
—
—
7
—
—
—
—
—
—
—
—
26
0
0
0
125
25
21
—
—
—
—
—
—
—
2.0
4.5
6.0
2.0
4.5
6.0
—
80
16
14
—
—
—
—
—
6
—
—
5
—
5
—
—
—
75
15
13
10
100
20
17
—
—
—
—
—
—
—
95
19
16
10
Rev.2.00, Oct 11, 2005 page 10 of 14
Unit
Test Conditions
MHz
ns
Clock to Q
ns
Clear to Q
(HC160, HC161 only)
ns
Enable T to Ripple Carry
output
ns
Clock to Ripple carry output
ns
Data to Clock
ns
Load to Clock
ns
Clear to Clock
(HC162, HC163 only)
ns
ns
ns
ns
pF
HD74HC160, HD74HC161, HD74HC162, HD74HC163
Function Table
Count Enable/Disable
Control Inputs
Load
H
L
X
X
X
H : High level
Result at Outputs
Enable P
Enable T
H
H
H
H
L
H
H
L
L
L
L : Low level X : Irrelevant
QA to QD
Count
No count
No count
No count
No count
Ripple Carry Output
High when QA to QD are maximum
High when QA to QD are maximum
L
L
Test Circuit
Measurement point
CL*
Note: CL includes the probe and fig capacitance.
Rev.2.00, Oct 11, 2005 page 11 of 14
HD74HC160, HD74HC161, HD74HC162, HD74HC163
Waveforms
1.
2.
tW(H)
Clock
tW(L)
50%
tPHL
QA, QB,
QC, QD
tW
Clear
or
Load
50%
tPLH
trem
50%
50%
Clock
tPHL
QA, QB,
QC, QD
3.
Enable T
50%
4.
50%
50%
Clock
tPLH
Ripple
Carry
Output
tPLH
tPHL
Ripple
Carry
Output
50%
tPHL
50%
5.
50%
50%
Clock
tsu
50%
Data
Rev.2.00, Oct 11, 2005 page 12 of 14
th
tsu
50%
th
50%
HD74HC160, HD74HC161, HD74HC162, HD74HC163
Package Dimensions
JEITA Package Code
P-DIP16-6.3x19.2-2.54
RENESAS Code
PRDP0016AE-B
Previous Code
DP-16FV
MASS[Typ.]
1.05g
D
9
E
16
1
8
b3
0.89
Z
A1
A
Reference
Symbol
L
e
Nom
c
e1
D
19.2
E
6.3
JEITA Package Code
P-SOP16-3.95x9.9-1.27
RENESAS Code
PRSP0016DG-A
*1
Previous Code
FP-16DNV
7.4
A1
0.51
b
p
0.40
b
3
0.48
0.56
1.30
c
0.19
θ
0°
e
2.29
0.25
0.31
2.54
2.79
15°
1.12
L
2.54
MASS[Typ.]
0.15g
D
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
F
16
20.32
5.06
Z
( Ni/Pd/Au plating )
Max
7.62
1
A
θ
bp
e
Dimension in Millimeters
Min
9
c
*2
Index mark
HE
E
bp
Reference
Symbol
Terminal cross section
( Ni/Pd/Au plating )
Dimension in Millimeters
Min
Nom
Max
D
9.90
10.30
E
3.95
A2
1
Z
8
e
*3
bp
x
A1
0.10
0.14
0.25
0.34
0.40
0.46
0.15
0.20
0.25
6.10
6.20
1.75
A
M
L1
bp
b1
c
A
c
A1
θ
L
y
Detail F
1
θ
0°
HE
5.80
1.27
e
x
0.25
y
0.15
Z
0.635
0.40
L
L
Rev.2.00, Oct 11, 2005 page 13 of 14
8°
1
0.60
1.08
1.27
HD74HC160, HD74HC161, HD74HC162, HD74HC163
JEITA Package Code
P-SOP16-5.5x10.06-1.27
RENESAS Code
PRSP0016DH-B
*1
Previous Code
FP-16DAV
MASS[Typ.]
0.24g
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
D
F
16
9
*2
c
E
HE
bp
Index mark
Reference
Symbol
Terminal cross section
( Ni/Pd/Au plating )
1
*3
e
Nom
D
10.06
E
5.50
Max
10.5
A2
8
Z
Dimension in Millimeters
Min
bp
x
A1
M
0.00
0.10
0.20
0.34
0.40
0.46
0.15
0.20
0.25
7.80
8.00
2.20
A
L1
bp
b1
c
A
c
θ
A1
y
L
Detail F
1
θ
0°
HE
7.50
1.27
e
x
0.12
y
0.15
Z
0.80
0.50
L
L
JEITA Package Code
P-TSSOP16-4.4x5-0.65
RENESAS Code
PTSP0016JB-A
*1
Previous Code
TTP-16DAV
0.70
0.90
1.15
1
MASS[Typ.]
0.05g
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
D
F
16
8°
9
*2
E
HE
c
bp
Reference
Symbol
Terminal cross section
( Ni/Pd/Au plating )
Index mark
Dimension in Millimeters
Min
Nom
Max
D
5.0
5.3
E
4.40
A2
A1
1
Z
e
*3
bp
L1
x
0.07
0.10
0.15
0.20
0.25
0.10
0.15
0.20
6.40
6.60
1.10
bp
M
b1
c
A
c
A1
θ
L
y
Detail F
1
θ
0°
HE
6.20
8°
0.65
e
x
0.13
y
0.10
Z
0.65
0.4
L
L
Rev.2.00, Oct 11, 2005 page 14 of 14
0.03
A
8
1
0.5
1.0
0.6
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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Renesas Technology Europe Limited
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K.
Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900
Renesas Technology Hong Kong Ltd.
7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong
Tel: <852> 2265-6688, Fax: <852> 2730-6071
Renesas Technology Taiwan Co., Ltd.
10th Floor, No.99, Fushing North Road, Taipei, Taiwan
Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999
Renesas Technology (Shanghai) Co., Ltd.
Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China
Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952
Renesas Technology Singapore Pte. Ltd.
1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632
Tel: <65> 6213-0200, Fax: <65> 6278-8001
Renesas Technology Korea Co., Ltd.
Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea
Tel: <82> 2-796-3115, Fax: <82> 2-796-2145
Renesas Technology Malaysia Sdn. Bhd.
Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia
Tel: <603> 7955-9390, Fax: <603> 7955-9510
© 2005. Renesas Technology Corp., All rights reserved. Printed in Japan.
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