Application Note 1662 ISL97682 LED Driver Evaluation Board User Manual Introduction The ISL97682IRTZEVALZ Evaluation Board provides a complete testing platform for the ISL97682, a two channel LED driver. Please refer to the product datasheet (ISL97682, FN7689) for detailed information including pinout, pin function description, electrical specifications, applications related information, etc. Instructions Please follow the steps described below to start your evaluation. 1. For both switch #1 and #2 (SW1 and SW2 shown on the board), set them to position 3 (left side). 2. For enable control jumper JP1, put the shunt to the “ON” position (right side) to connect EN pin to VIN. When the shunt is set to the “OFF” position, it will disable the chip by pulling the EN pin to ground. 3. Connect JP14 so the VIN pin is connected to PVIN. 4. For JP20, connect the shunt to the upper position. Please refer to the “ISL97682IRTZEVALZ Evaluation Board Schematic” on page 2 for more details. • LED dimming frequency and duty cycle. - As mentioned in step #4 above, when the shunt on JP20 is connected to the upper position, FPWM/DPWM pin is connected to VDC, the device enters direct PWM mode, which means both the LED dimming frequency and the duty cycle are synchronized with the external PWM signal applied on the PWMI pin. - When the shunt on JP20 is connected to the lower position, the FPWM/DPWM pin is connected to a resistor. Under such conditions, the LED dimming frequency of the chip is programmed by the resistance connected on the FPWM/DPWM pin as per Equation 2: 7 10 FPWM ( Hz ) = 12.4 • ----------------------------------R_FPWM ( Ω ) (EQ. 2) The duty cycle is still modulated by the external PWM signal applied on PWMI pin. On board, potentiometer R11 and a few other resistors are provided for easily adjusting the LED dimming frequency under such a configuration. 5. Connect WR and JP2-JP6. 6. Apply 1.5V~5.5V PWM signal between PWMI pin and AGND. 7. Apply 4V~26.5V between PVIN and PGND and the LEDs should be lit, and you can start the evaluation. NOTE: In step #1 above, the SW1, SW2 position can be adjusted to different positions for different configurations, see Table 1 for details. TABLE 1. SW1 SW2 POSITION POSITION DESCRIPTION 1 1 LX switching frequency = 600kHz, PFM CH1 and CH3 3 3 LX switching frequency = 1MHz, PFM CH1 and CH3 3 1 LX switching frequency = 600kHz, No PFM CH1 and CH3 1 3 LX switching frequency = 1MHz, No PFM CH1 and CH3 • The LED maximum DC current adjustment. For each channel, the maximum DC current is set by resistance connected to RSET pin. The current for each channel can be calculated as shown in Equation 1: 402 I_LED ( mA ) = ---------------------------RSET ( kΩ ) (EQ. 1) On the board, a potentiometer R5 and a few other resistors are provided for easily adjust the LED maximum DC current. October 11, 2011 AN1662.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011. All Rights Reserved. Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL97682IRTZEVALZ Evaluation Board Schematic JP11 P8 AGND P7 R8 R6 3 1 3 SW1 P4 5 PWMI 6 EN JP1 7 VIN NC 14 8 FPWN/DPWM VDC 0 R13 VIN Open F1 P1 PVIN LED9 LED33 LED8 LED32 LED7 LED31 LED6 LED30 LED5 LED29 LED4 LED28 OVP R3 10k C10 3.3nF/50V C11 1nF/50V 357k C9 100pF/50V JP15 TP2 VOUT D1 L1 JP17 LED3 LED27 LED2 LED26 15µH 2A Fuse C1 10µF/50V R4 LX JP19 C13 1nF/50V VDC C4 1µF/16V TP1 JP14 12 VDC VDC 100k 11 9 R10 PGND LX 2 3 JP20 27k LED34 TP3 CH1 CH1 13 10 1 C2 0.1µF/50V R11 LED10 TP5 CH3 CH3 15 ISL97682 2 3 R12 LED35 XAL6060-153MEB PMEG6030 2-layer board. Connect top layer PGND and bottom layer AGND C5 4.7µF/ 50V C6 4.7µF/ 50V C7 NC C8 NC LED1 When SW1 = SW2 = 3: Fsw = 600kHz, WITH phase shift SW1 = 1, SW2 = 3: Fsw = 1.2MHz, WITHOUT phase shift SW1 = 3, SW2 = 1: Fsw = 600kHz, WITHOUT phase shift SW1 = SW2 = 1: Fsw = 1.2MHz, WITH phase shift AN1662.0 October 11, 2011 EN can be connected in the following ways to enable/disable the device: (1) Connected it to VIN directly on JP1 to enable (2) Connected it to GND directly on JP1 to disable (3) Directly apply external voltage on P3(EN) to enable/disable the device without putting shunt on JP1. JP7 JP2 I_OUT JP2: For measuring total output current JP3-JP6: For measuring current on CH1-CH4 respectively JP7-JP10, JP13-JP16: For easy configuration of 8x LED or 10x LED per string JP3 JP9 LED25 JP5 Application Note 1662 P3 P2 NC 16 U1 1 LED11 U2 SW2 PWMI EN 1 1 C15 8.2nF C3 33pF TP9 FSW/PHS AGND VDC 2 2 2 PGND R1 150k R2 100k LED36 R9 10k 2 Open COMP R7 P9 3 PGND P5 TP8 RSET RSET AGND AGND 0 R5 1M P10 4 5k P6 FSW AGND JP12 LED12 PCB Layout 3 Application Note 1662 FIGURE 1. TOP SILKSCREEN LAYER + TOP LAYER AN1662.0 October 11, 2011 (Continued) PCB Layout 4 Application Note 1662 FIGURE 2. BOTTOM LAYER AN1662.0 October 11, 2011 Application Note 1662 Bill of Materials (BOM) DESIGNATOR PART TYPE FOOTPRINT R1 150k 603 R2 100k 603 R3 357k 603 R4 10k 603 R5 1M VRES R6 open R7 38.3k 603 R8 5k 603 R9 10k 603 R10 0 603 R11 100k VRES R12 0 603 R13 Open 603 L1 15µH CoilCraft (XAL6060-153MEB) D1 PMEG6030 C1 10µF/35V 1210 C2 0.1µF/50V 603 General purpose Ceramic X5R/X7R capacitors C3 33pF 603 C4 1µF/16V 603 C5 4.7µF/50V 1210 C6 4.7µF/50V 1210 C7 Place Holder 1210 C8 Place Holder 1210 C9 100pF/50V 603 C10 3.3nF/50V 603 C11 1nF/50V 603 C12 Place Holder 603 C13 1nF/50V 603 C14 Place Holder 603 C15 8.2nF 603 F1 2A Fuse 1206 U1 QFN16 3MM Intersil, ISL97682/3/4 JP2-JP19 JUMPER-2PIN JUMPER-2PIN WR JUMPER-2PIN JUMPER-2PIN FCI 68000-236HLF-1x2 JP1 JUMPER-3PIN JUMPER-3PIN JP20 JUMPER-3PIN JUMPER-3PIN LED1-12 LED25-36 LED-SMT LW_Y87C 5 PART MANUFACTURER/NUMBER 1% SMD Resistor General purpose Murata, GRM32ER71H475KA88L Not Populated General purpose Ceramic X5R/X7R capacitors Bel Fuse Inc, C1Q 2 FCI 68000-236HLF-1x3 AN1662.0 October 11, 2011 Application Note 1662 Bill of Materials (BOM) (Continued) DESIGNATOR PART TYPE FOOTPRINT TP1 LX TEST POINT TP2 VOUT TEST POINT TP3 CH1 TEST POINT TP4 CH2 TEST POINT TP5 CH3 TEST POINT TP6 CH4 TEST POINT TP7 VDC TEST POINT TP8 RSET TEST POINT TP9 FSW/PHS TEST POINT P5 AGND TEST POINT P6 AGND TEST POINT P9 PGND TEST POINT P1 PVIN POWERPOST P2 VIN POWERPOST P3 EN POWERPOST P4 PWMI POWERPOST P7 AGND POWERPOST P8 AGND POWERPOST P10 PGND POWERPOST SW2 SPDT SWITCH-SLIDE-SPDT SW1 SPDT SWITCH-SLIDE-SPDT PART MANUFACTURER/NUMBER Keystone Electronics 5010 Keystone Electronics 5011 Mill Max 3156-1-00-00-00-00-08-0 EAO 09.03201.02 Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 6 AN1662.0 October 11, 2011