RENESAS HD74LS48P

HD74LS48
BCD-to-Seven-Segment Decoder / Driver (Internal Pull-up outputs)
REJ03D0411–0300
Rev.3.00
Jul.22.2005
HD74LS48 features active high outputs for driving lamp buffers. This circuit has full ripple blanking input / output
controls and a lamp test input. Display patterns for BCD input counts above 9 are unique symbols to authenticate input
conditions. This circuit incorporates automatic leading and / or trailing-edge zero-blanking control (RBI and RBO).
Lamp test (LT) of these types may be performed at any time when the BI / RBO node is at a high level. It contains an
overriding blanking input (BI) which can be used to control the lamp intensity be pulsing or to inhibit the outputs.
Inputs and outputs are entirely compatible for use with TTL or DTL logic outputs.
Features
• Ordering Information
Part Name
Package Type
HD74LS48P
DILP-16 pin
Package Code
(Previous Code)
PRDP0016AE-B
(DP-16FV)
Package
Abbreviation
Taping Abbreviation
(Quantity)
P
—
Pin Arrangement
B
1
C
2
Lamp
Test
BI/RBO
16
VCC
15
f
Inputs
B
f
3
C
g
14
g
4
LT
a
13
a
BI/RBO
b
RBI
c
12
b
D
d
11
c
A
e
10
d
9
e
RBI
5
D
6
Inputs
A
7
GND
8
(Top view)
Rev.3.00, Jul.22.2005, page 1 of 6
Outputs
HD74LS48
Function Table
Decimal or
Function
Inputs
BI /
RBO
Outputs
Note
H
a
H
b
H
c
H
d
H
e
H
f
H
g
L
H
L
H
H
L
H
H
H
H
L
L
H
L
H
L
L
L
H
H
L
H
L
H
H
H
L
H
H
H
H
H
L
L
L
L
H
H
H
H
H
L
H
H
L
H
H
H
L
L
L
H
H
H
H
L
H
H
H
H
H
L
H
H
L
H
L
H
L
H
H
H
H
H
H
H
H
L
H
L
H
L
H
L
H
X
X
H
H
L
L
L
H
H
L
H
H
H
L
H
L
H
L
L
H
L
H
H
L
H
H
H
H
X
X
H
H
L
H
H
L
H
L
H
H
L
L
L
H
H
L
H
L
L
L
L
H
H
H
13
14
H
H
X
X
H
H
H
H
L
H
H
L
H
H
H
L
L
L
L
L
H
H
L
H
H
H
H
H
15
BI
H
X
X
X
H
X
H
X
H
X
H
X
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
2
RBI
LT
H
L
L
X
L
X
L
X
L
X
L
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
3
4
0
LT
H
RBI
H
D
L
C
L
B
L
A
L
1
2
H
H
X
X
L
L
L
L
L
H
3
4
H
H
X
X
L
L
L
H
5
6
H
H
X
X
L
L
7
8
H
H
X
X
9
10
H
H
11
12
1
H; high level, L; low level, X, irrelevant
Notes: 1. The blanking input (BI) must be open or held at a high logic level when output functions 0 through 15 are
desired.
2. When a low logic level is applied directly to the blanking input (BI), all segment outputs are low regardless of
the level of any other input.
3. When ripple-blanking input (RBI) and inputs A, B, C, and D are at a low level with the lamp-test input high, all
segment outputs go low and the ripple-blanking output (RBO) goes to a low level (response condition).
4. When a blanking input / ripple blanking output (BI / RBO) is open or held high and a low is applied to the
lamp-test input, all segment outputs are high.
a
f
g
e
c
d
Rev.3.00, Jul.22.2005, page 2 of 6
b
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
HD74LS48
Block Diagram
a
A
b
B
Inputs
C
c
Outputs
D
d
Blanking Input or
Ripple Blanking
Output (BI/RBO)
e
f
Lamp Test (LT)
Inputs
g
Ripple Blanking (RBI)
Absolute Maximum Ratings
Item
Supply voltage
Symbol
VCC
Ratings
7
Unit
V
VIN
PT
7
400
V
mW
Input voltage
Power dissipation
°C
Storage temperature
Tstg
–65 to +150
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item
Symbol
VCC
Min
4.75
Typ
5.00
Max
5.25
Unit
V
Output current
IOH (a to g)
IOH (BI/RBO)
—
—
—
—
–100
–50
µA
µA
Output current
IOL (a to g)
IOL (BI/RBO)
—
—
—
—
6
3.2
mA
mA
Topr
-20
25
75
°C
Supply voltage
Operating temperature
Rev.3.00, Jul.22.2005, page 3 of 6
HD74LS48
Electrical Characteristics
(Ta = –20 to +75 °C)
Item
Input voltage
a to g
BI / RBO
Output voltage
Symbol
VIH
min.
2.0
typ.*
—
max.
—
Unit
V
VIL
—
2.4
—
—
0.8
—
V
V
2.4
—
—
—
—
0.4
V
—
—
—
—
0.5
0.4
—
–1.3
—
—
0.5
—
mA
IOL = 3.2 mA
VCC = 4.75 V, VO = 0.85 V,
—
—
—
—
20
–0.4
µA
mA
VCC = 5.25 V, VI = 2.7 V
VCC = 5.25 V, VI = 0.4 V
—
—
–1.2
mA
VCC = 5.25 V, VI = 0.4 V
II
—
—
0.1
mA
VCC = 5.25 V, VI = 7 V
IOS
–0.3
—
–2
mA
VCC = 5.25 V
ICC
—
25
38
mA
VOH
a to g
VOL
BI / RBO
Output current**
Input current
a to g
IO
except BI
/ RBO
IIH
BI / RBO
except BI
/ RBO
Short-circuit
BI / RBO
output current
Supply current***
IIL
Input clamp voltage
VIK
—
—
–1.5
Notes: * VCC = 5 V, Ta = 25°C
** Input condition as for VOH
*** ICC is measured with all outputs open and inputs at 4.5 V.
V
V
V
Condition
IOH = –100 µA
IOH = –50 µA
IOL = 2 mA
IOL = 6 mA
IOL = 1.6 mA
VCC = 4.75 V,
VIH = 2 V, VIL = 0.8 V
VCC = 4.75 V,
VIH = 2 V, VIL = 0.8 V
VCC = 5.25 V
VCC = 4.75 V, IIN = –18 mA
Switching Characteristics
(VCC = 5 V, Ta = 25°C)
Item
Symbol
Input
min.
typ.
max.
Unit
Condition
Turn-on time
tPHL
tPLH
A
—
—
—
—
100
100
ns
CL = 15 pF, RL = 4 kΩ
Turn-off time
tPHL
tPLH
RBI
—
—
—
—
100
100
ns
CL = 15 pF, RL = 6 kΩ
Rev.3.00, Jul.22.2005, page 4 of 6
HD74LS48
Testing Method
Test Circuit
VCC
4.5V
RL
Output
a
See Testing Table
A
B
C
D
Input
P.G.
Zout = 50Ω
b
c
d
e
f
LT
RBI
BI/RBO
CL
g
Waveform
tTLH
tTHL
Input
3V
90%
1.3 V
90%
1.3 V
10%
10%
0V
tPHL
tPLH
VOH
In phase output
1.3 V
1.3 V
VOL
tPHL
tPLH
VOH
1.3 V
Out of phase output
1.3 V
VOL
Testing Table
Item
tPLH
tPHL
Inputs
Outputs
RBI
4.5 V
D
GND
C
GND
B
GND
A
IN
a
OUT
b
—
c
—
d
OUT
e
OUT
f
OUT
g
—
4.5 V
4.5 V
GND
GND
GND
4.5 V
4.5 V
4.5 V
IN
IN
—
OUT
—
OUT
OUT
—
—
OUT
OUT
OUT
—
OUT
—
OUT
IN
GND
GND
GND
GND
OUT
OUT
OUT
OUT
OUT
OUT
—
Rev.3.00, Jul.22.2005, page 5 of 6
HD74LS48
Package Dimensions
JEITA Package Code
P-DIP16-6.3x19.2-2.54
RENESAS Code
PRDP0016AE-B
MASS[Typ.]
1.05g
Previous Code
DP-16FV
D
9
E
16
1
8
b3
0.89
Z
A1
A
Reference
Symbol
L
e
e
bp
Dimension in Millimeters
Min
D
19.2
E
6.3
A
θ
c
e1
A1
0.51
b
p
0.40
b
3
20.32
7.4
0.48
0.56
1.30
c
0.19
θ
0°
e
2.29
L
Max
5.06
Z
( Ni/Pd/Au plating )
Rev.3.00, Jul.22.2005, page 6 of 6
Nom
7.62
1
0.25
0.31
2.54
2.79
15°
1.12
2.54
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