5 4 3 +5V 2 +3.3V 1 +5V +3.3VorBat +5.0V_USB_CABLE -> +3.3V Rail +3.3V_USB +5V_USB Q4 D IRLML6402PbF 3 DI R53 1M DNI Q2 IRF240 U8 R54 4.7k SM/R_0603 DI R60 1k SM/R_0603 DI C23 0.33uF DI D2 Blue SM/D_0603 DI [pg3] PWR_ENABLEb R59 10k DNI IN C8 10uF DI SM/C_0805 OUT TAB 20 DNI SM/R_0603 DNI Q1 IRLML6402PbF DI 2 4 NSR0530P2T5G D3 BT1 3 GND C7 6.8uF DI SM/C_1206 NCP1117 DI +5V R27 SOT-223_checkpins D 1 Vbat+2 Batt_Cell_Holder R29 10k DI SM/R_0603 R28 100k DI SM/R_0603 Vbat+ V- 2 + 1 R24 10k DI CR2032 Battery Clip/ Optional Charger R5 100k DI USB plugged in => +5V is High, Q4=ON, Q5=OFF USB un plugged => +5V is Low, Q4=OFF, Q5=ON C C Core Current +1.2V +3.3V or Bat -> +1.2V Rail VCCIO_EXT U2 3 B C1 1uF DI VIN VOUT GND 1 2 C2 1uF MCP1703T-1202E/CB DI R18 1 1% SM/R_0603 DI C21 1uF DI VCC_IO TP1 1 R85 DI TP1-TP4 are 10mil free Via's Locate TP1 & TP2 very close to R35 Locate TP3 & TP4 very close to R34 DI 1 1% SM/R_0603 DI 1 +1.2V Q3 IRLML6402PbF DI 1 +3.3VorBat I/O Current R19 1M DI SM/R_0603 TP3 DI TP4 B TP2 VCC_CORE 1 To U9 sense for current Thin signal traces Direct path from R34 to U7 DI To U9 sense for current Thin signal traces or non load bearing copper pour Direct path from R35 to U7 A A Lattice Semiconductor Applications Email: [email protected] Phone (503) 268-8001 -or- (800) LATTICE Title USB 5V, XO Power Rails 3.0V Batt, 1.2V Rail and Current Monitors Size B Date: 5 4 3 2 Project MACHXO2 Pico Board Friday, March 4, 2011 Sheet 1 Schematic Rev A Board Rev 1 of 6 E 5 4 3 2 1 PWR_AMP +3.3VorBat LMP7708 U15A C24 0.1uF DI 8 D R45 50 0.1% DI 3 + R58 A +1.2V DI R57 2k 0.1% DI 4 C26 0.1uF DI 1k DI 1% R61 2k DI 1% VCC_IO 7 9 12 14 VCC 2S1 2S2 D1 D2 D3 D4 3S1 3S2 123SEL 4SEL 4S1 4S2 GND 2 Vrefin R42 2k 0.1% DI 16 5 8 13 11 [pg5] R79 1k DI 1% 3 10 [pg5] R75 0 DI DSOutVcc [pg5] R81 500 DI 1% DSVrefVcc [pg5] 0 DI PWR_AMP STG3693QTR C C27 220pF DI R39 50 0.1% DI EnAMP C LMP7708 U15B 5 + High = Powered (S1) Low = Disabled (S2) Delta Sig Icco Measurement 8 4 6 1S1 1S2 R50 B R41 50 0.1% DI DI R40 7 6 - R51 2k 0.1% DI 4 VCCIO_EXT 15 1 DSInVcc 0 C30 0.047uF DI DI R65 U20 VCC_CORE D R64 1 2 R52 50 0.1% DI Delta Sig Icc Measurement 1k DI 1% Vrefin R38 2k 0.1% DI C22 220pF DI R46 2k DI 1% R92 1k DI 1% B DSInVcco [pg5] DSOutVcco [pg5] C19 0 DI 0.047uF DI R49 R89 0 DI DSVrefVcco [pg5] R91 0 500 DI DI 1% B Power Supply Enable Mux +3.3VorBat VCC_IO C25 0.1uF DI +3.3VorBat PWR_AMP Vrefin U21 15 1 1S1 1S2 4 6 2S1 2S2 7 9 3S1 3S2 123SEL 4SEL 4S1 4S2 GND A 12 14 VCC D1 D2 D3 D4 2 16 5 8 13 PWR_I2CSPI A R96 11 Lattice Semiconductor Applications Email: [email protected] Phone (503) 268-8001 -or- (800) LATTICE R97 3 10 EnAMP EnI2CSPI 0 DI 0 DI STG3693QTR [pg5] [pg5] Title Current Sense Amplifiers, Power Enable Mux High = Powered (S1) Low = Disabled (S2) Size B Date: 5 4 3 2 Project MACHXO2 Pico Board Friday, March 4, 2011 Sheet 1 Schematic Rev A Board Rev 2 of 6 E 5 4 3 2 1 +3.3V +3.3VorBat L3 2 1 600ohm 500mA +3.3V +3.3V C13 4.7uF DI C12 0.1uF DI C9 0.1uF DI +5V_USB C57 0.1uF DI VCC18FT D C58 0.1uF DI R36 3.3k DNI 2 R15 R16 VCC 1 DD+ 2 3 NC GND 4 5 CASE CASE CASE CASE 6 7 8 9 VREGIN 49 VREGOUT VCCIO VCCIO VCCIO VCCIO SM/C_0603 7 8 DM DP TYPE_B 14 2.2k DI 10nF DI C5 R7 DI 10 11 MH1 MH2 RESET# R98 SHLD_Debug 12k DI 100k 6 63 62 61 2 +3.3V REF EECS EECLK EEDATA 16 17 18 19 21 22 23 24 ACBUS0 ACBUS1 ACBUS2 ACBUS3 ACBUS4 ACBUS5 ACBUS6 ACBUS7 26 27 28 29 30 32 33 34 BDBUS0 BDBUS1 BDBUS2 BDBUS3 BDBUS4 BDBUS5 BDBUS6 BDBUS7 38 39 40 41 43 44 45 46 BCBUS0 BCBUS1 BCBUS2 BCBUS3 BCBUS4 BCBUS5 BCBUS6 BCBUS7 48 52 53 54 55 57 58 59 PWREN# 60 SUSPEND# 36 OSCI X3 C3 0.1uF 8 7 6 5 VCC NC ORG GND CS SK DIN DOUT M93C46-WMN6TP DI SOIC-8 M93C46-WMN6TP Manuf:ST Micro R26 C55 18pF DI 13 TEST FTDI High-Speed USB DI EECS EESK EEDATA 1 2 3 4 4 FT2232H R31 [pg4] 2.2k USB_12MHZ AGND B 2 G1 G2 C56 18pF 12MHZ DI OSCO 0 DI 10 U1 3 3 2S1 2S2 4 6 USB_TDI [pg5] 3S1 123SEL 3S2 4SEL 4S1 GND 4S2 7 9 USB_TDO [pg5] 12 14 USB_TMS [pg5] D FT2232 Controlled High = JTAG Low = I2C R11 C 0 DI R34 R35 0 DI R43 0 DI R47 0 DI R55 0 DI R20 0 DI R21 0 DI R56 0 DI BDBUS0 [pg5] BDBUS1 [pg5] BDBUS2 [pg5] BDBUS3 [pg5] BDBUS4 [pg5] BDBUS5 [pg5] BDBUS6 [pg5] BDBUS7 [pg5] 0 DI B PWR_ENABLEb [pg1] GND GND GND GND GND GND GND GND R4 R3 10k R1 10k SM/R_0603 10k SM/R_0603 SM/R_0603 1 3 [pg5] 1 5 11 15 25 35 47 51 1 +3.3V 3 10 0 DI USB_TCK STG3693QTR ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 R30 C 0 DI 20 31 42 56 12 37 64 4 9 50 VCORE VCORE VCORE C6 10nF R8 0 DI USB_MINI_B DI 0 DI 15 1 D1 D2 D3 D4 11 VPHY VPLL USB Connection J1 +3.3V L1 Ferrite_bead SM/R_0603 DI DI [pg4,5] 1S1 1S2 VCC 16 5 8 13 R13 0 DI C54 0.1uF DI U23 FT2232HL [pg4,5] U22 R14 C51 3.3uF DI USB_SCL USB_SDA Digi-Key Part Number 497-5090-1-ND DI A A Lattice Semiconductor Applications Email: [email protected] Phone (503) 268-8001 -or- (800) LATTICE Title USB to JTAG and I2C for the XO2 Size B Date: 5 4 3 2 Project MACHXO2 Pico Board Friday, March 4, 2011 Sheet 1 Schematic Rev A Board Rev 3 of 6 E 5 4 3 2 1 U10A PWR_I2CSPI D R78 10k DI R84 3.3k DI R80 3.3k DI [pg3] USB_12MHZ Tmp_I2C_ALERT PT9A PT9B A3 C4 PT10A PT10B PT15C PT15D/PROGRAMN B9 C10 B5 C6 PT11A PT11B PT16A PT16B A10 C11 A7 B7 PT12A/PCLKT0_1 PT12B/PCLKC0_1 PT16C PT16D A11 B12 PT17A PT17B C12 A12 PT17C/INITN PT17D/DONE B13 A13 C8 B8 [pg3,5] USB_SCL [pg3,5] USB_SDA PT15A PT15B PT12C/SCL/IO2/PCLKT0_0 PT12D/SDA/IO3/PCLKC0_0 XO2_TDO XO2_TDI A4 B4 TDO TDI [pg5] XO2_TCK [pg5] XO2_TMS B6 A6 TCK TMS [pg5] [pg5] Bank0 A2 B3 C9 A9 4 Char LCD U7 D PROTO_C10 [pg5] LCD_COM0_LP LCD_COM1_LP LCD_COM2_LP LCD_COM3_LP 1 2 3 4 COM0 COM1 COM2 COM3 LCD-S401M16KR PROTO_B13 [pg5] PROTO_A13 [pg5] LCD_COM0 U10B LCD_COM0 LCD_COM1 B14 C13 PR2A PR2B LCD_COM2 LCD_COM3 C14 D12 5 6 LCD_5_LP LCD_6_LP 2D,2E,2G,2F DP2,2C,2B,2A 7 8 LCD_7_LP LCD_8_LP 3D,3E,3G,3F DP3,3C,3B,3A 9 10 LCD_9_LP LCD_10_LP 4D,4E,4G,4F COL,4C,4B,4A 11 12 LCD_11_LP LCD_12_LP LowPass Filter LCMXO2-1200-CSBGA132 C 1D,1E,1G,1F DP1,1C,1B,1A Bank1 LCD_COM3 R63 5.49k DI LCD_COM0_LP PR8A PR8B J12 J14 LCD_5 LCD_6 PR2C PR2D PR8C PR8D J13 K12 LCD_7 LCD_8 E12 E14 PR3A PR3B PR9A PR9B K13 K14 LCD_9 LCD_10 E13 F12 PR4A PR4B PR9C PR9D L14 M13 LCD_11 LCD_12 F13 F14 PR4C PR4D PR10A PR10B M12 M14 G12 G14 PR5A PR5B PR10C PR10D N13 N14 G13 H12 PR5C/PCLKT1_0 PR5D/PCLKC1_0 C29 0.01uF DI LCD_COM1 LCD_5 LCD_6 LCMXO2-1200-CSBGA132 C39 0.01uF DI R87 5.49k DI LCD_11_LP C43 0.01uF DI LCD_12 R72 5.49k DI LCD_6_LP C33 0.01uF DI R76 5.49k DI LCD_8_LP C36 0.01uF DI LCD_9 C32 0.01uF DI C R82 5.49k DI LCD_10_LP LCD_11 R74 5.49k DI LCD_5_LP C34 0.01uF DI R68 5.49k DI LCD_COM2_LP R77 5.49k DI LCD_7_LP C37 0.01uF DI LCD_8 R62 5.49k DI LCD_COM1_LP LCD_COM2 LCD_10 C31 0.01uF DI C28 0.01uF DI B LCD_7 R67 5.49k DI LCD_COM3_LP R83 5.49k DI LCD_9_LP C40 0.01uF DI B R86 5.49k DI LCD_12_LP C42 0.01uF DI Temperature Sensor Slave Addr 1001010 PWR_I2CSPI C20 PWR_I2CSPI A [pg3,5] USB_SCL [pg3,5] USB_SDA DI R23 0 DI R17 U5 0_1uF R22 4 VCC ALERT 3 1 SCL ADD0 5 GND 2 6 0 DI SDA Tmp_I2C_ALERT A 0 DI Lattice Semiconductor Applications Email: [email protected] Phone (503) 268-8001 -or- (800) LATTICE TMP101 DI Title XO2 Bank 0-1, LCD, I2C Temp Size B Date: 5 4 3 2 Project MACHXO2 Pico Board Friday, March 4, 2011 Sheet 1 Schematic Rev A Board Rev 4 of 6 E 5 4 3 2 1 U10C [pg2] [pg2] EnAMP EnI2CSPI XO2_SPI_CS0 PushBtn D XO2_SPI_CLK XO2_SPI_OUT P2 N2 PB4A PB4B P3 M3 PB4C/CSSPIN PB4D N3 P4 M4 N4 Bank2 PB6A PB6B PB6C/MCLK/CCLK PB6D/SO/SPISO/IO1 PB11A/PCLKT2_1 PB11B/PCLKC2_1 M7 N8 PROTO_M7 PROTO_N8 PB15A PB15B P8 M8 DSVrefVcc DSInVcc PB15C PB15D P9 N9 PB18A PB18B M9 N10 CapBtn1 CapBtn2 CapBtn3 CapBtn4 N5 M5 PB9C PB9D PB18C PB18D M10 P11 N6 P6 PB9A/PCLKT2_0 PB9B/PCLKC2_0 PB20A PB20B M11 P12 P7 N7 PB11C PB11D PB20C/SN PB20D/SI/SISPI/IO0 N12 P13 Header [pg2] [pg2] DSOutVcc DSOutVcco [pg2] [pg2] DSVrefVcco DSInVcco [pg2] [pg2] +3.3VorBat VCCIO_EXT D [pg3] USB_TDI [pg3] USB_TDO [pg3] USB_TCK [pg3] USB_TMS [pg3,4] USB_SDA [pg3,4] USB_SCL [pg4] PROTO_B13 [pg4] PROTO_A13 [pg4] PROTO_C10 XO2_SPI_SN XO2_SPI_IN LCMXO2-1200-CSBGA132 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 XO2_SPI_SN XO2_SPI_CS0 XO2_SPI_CLK XO2_SPI_IN XO2_SPI_OUT U10D C H1 H3 PL5C PL5D J1 J2 PL8A PL8B J3 K2 PROTO_K1 PROTO_K3 K1 K3 L3 M1 M2 Bank3 PL8C PL8D PL9A/PCLKT3_0 PL9B/PCLKC3_0 PL10B PL10C PL10D PL2A/L_GPLLT_FB PL2B/L_GPLLC_FB B1 B2 PROTO_B1 PROTO_B2 PL2C/L_GPLLT_IN PL2D/L_GPLLC_IN C1 C3 PROTO_C1 PROTO_C3 PL3A/PCLKT3_2 PL3B/PCLKC3_2 C2 D1 PROTO_C2 PROTO_D1 PL3C PL3D E1 E2 BDBUS0 BDBUS1 [pg3] [pg3] PL4A PL4B E3 F2 BDBUS2 BDBUS3 [pg3] [pg3] PL4C PL4D F1 F3 BDBUS4 BDBUS5 [pg3] [pg3] PL5A/PCLKT3_1 PL5B/PCLKC3_1 G3 H2 BDBUS6 BDBUS7 [pg3] [pg3] XO2_TDI XO2_TDO PROTO_K1 PROTO_K3 PROTO_M7 PROTO_N8 PROTO_B1 PROTO_B2 PROTO_C1 PROTO_C3 PROTO_C2 PROTO_D1 XO2_TMS [pg4] [pg4] XO2_TCK [pg4] [pg4] R44 10k DI 4MBit SPI PWR_I2CSPI Package: SOIC8 (WIDE) R71 U9 8 7 3 4 Vcc Reset W Vss U17 8 7 3 4 C10 0_1uF DI B S C D Q 1 6 5 2 AT25DF041A-SH-B VCCIO_EXT R70 R66 R69 0 DI 0 DI 0 DI XO2_SPI_CS0 XO2_SPI_CLK XO2_SPI_IN XO2_SPI_OUT 0 DI Package: UDFN Vcc Reset W Vss S C D Q 1 6 5 2 XO2_SPI_CS0 XO2_SPI_CLK XO2_SPI_IN XO2_SPI_OUT B AT25DF041A-MH R90 100k DNI U11 0 DI C LCMXO2-1200-CSBGA132 R88 100k DNI R2 R32 R33 R37 R48 1 3 5 7 9 11 DI 0 13 DI 0 15 DI 0 17 DI 68 19 DI 0 21 23 25 27 29 31 HEADER 16X2 Capacitive Touch Pads VCCIO_EXT R95 U3 GSR/Wake from Standby U12 VCCIO_EXT CapBtn1 1 CapBtn C47 0.1uF DNI CapTouch CapBtn2 1 C48 0.1uF DNI CapBtn R25 10k DI CapTouch PushBtn VCCIO_EXT VCCIO_EXT 4 R94 100k DNI A C11 0.1uF DI R93 100k DNI U14 1 S1 GlobalReset 3 2 U13 A DI CapBtn3 1 CapBtn C49 0.1uF DNI CapTouch CapBtn4 C50 0.1uF DNI 1 Lattice Semiconductor Applications Email: [email protected] Phone (503) 268-8001 -or- (800) LATTICE PCB Footprint = SMT_SW CapBtn Part Number:EVQ Q2K03W Panasonic SMD Title XO2 Bank 2-3, Cap Pads, Expansion Header, SPI CapTouch Size B Date: 5 4 3 2 Project MACHXO2 Pico Board Friday, March 4, 2011 Sheet 1 Schematic Rev A Board Rev 5 of 6 E 5 4 3 Board Logos G4 Lattice Logo G6 WEEE G5 E-Friendly 2 1 Board Mounting Holes MH10 MH12 MH9 MH11 1 1 1 1 M_HOLE1 DI IW_MNT0 M_HOLE1 DI IW_MNT0 M_HOLE1 DI IW_MNT0 M_HOLE1 DI IW_MNT0 DI 1 1 D 1 D DI DI VCC_CORE VCC_CORE U10E VCC_IO C N1 P14 A1 A14 VCC VCC VCC VCC L2 G2 D2 L13 P10 P5 A5 B11 D13 H13 GND GND GND GND GND GND GND GND GND GND NC C C7 VCCIO0 VCCIO0 VCCIO0 C5 A8 B10 VCCIO1 VCCIO1 VCCIO1 L12 H14 D14 VCCIO2 VCCIO2 VCCIO2 N11 M6 P1 VCCIO3 VCCIO3 VCCIO3 L1 D3 G1 C46 0.1uF DI C44 0.1uF DI C35 0.1uF DI C41 0.1uF DI VCC_IO C38 0.1uF DI C45 0.1uF DI LCMXO2-1200-CSBGA132 B B A A Lattice Semiconductor Applications Email: [email protected] Phone (503) 268-8001 -or- (800) LATTICE Title XO2 Power Size B Date: 5 4 3 2 Project MACHXO2 Pico Board Friday, March 4, 2011 Sheet 1 Schematic Rev A Board Rev 6 of 6 E