RENESAS R1LV0816ABG-7SI

R1LV0816ABG -5SI, 7SI
8Mb Advanced LPSRAM (512k word x 16bit)
REJ03C0393-0100
Rev.1.00
2009.12.08
Description
The R1LV0816ABG is a family of low voltage 8-Mbit static RAMs organized as 524,288-words by 16-bit,
fabricated by Renesas's high-performance 0.15um CMOS and TFT technologies.
The R1LV0816ABG is suitable for memory applications where a simple interfacing, battery operating and
battery backup are the important design objectives.
The R1LV0816ABG is packaged in a 48balls fine pitch ball grid array [f-BGA / 7.5 mm×8.5mm with the
ball-pitch of 0.75mm and 6x8 array]. It gives the best solution for a compaction of mounting area as well
as flexibility of wiring pattern of printed circuit boards.
Features
Single 2.4-3.6V power supply
Small stand-by current: 1.2 A (Vcc=3.0V, typ.)
No clocks, No refresh
All inputs and outputs are TTL compatible
Easy memory expansion by CS1#, CS2, LB# and UB#
Common Data I/O
Three-state outputs: OR-tie capability
OE# prevents data contention in the I/O bus
Operation temperature: -40 ~ +85°C
Ordering information
Type No.
Power supply
Access time
R1LV0816ABG-5SI
2.7V to 3.6V
2.4V to 2.7V
55 ns
70 ns
R1LV0816ABG-7SI
2.4V to 3.6V
70 ns
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 1 of 15
Temperature
Range
Package
-40 ~ +85°C
48-ball fBGA with 0.75mm ball pitch
PTBG0048HB-A(48FHH)
R1LV0816ABG –5SI, 7SI
Pin Arrangement
1
2
3
4
5
6
A
LB#
OE#
A0
A1
A2
CS2
B
DQ15
UB#
A3
A4
CS1#
DQ0
C
DQ13 DQ14
A5
A6
DQ1
DQ2
D
Vss
DQ12
A17
A7
DQ3
Vcc
E
Vcc
DQ11
NC
A16
DQ4
Vss
F
DQ10
DQ9
A14
A15
DQ6
DQ5
G
DQ8
NC
A12
A13
WE#
DQ7
H
A18
A8
A9
A10
A11
NC
48-pin f-BGA (TOP VIEW)
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 2 of 15
R1LV0816ABG –5SI, 7SI
Pin Description
Pin name
Vcc
Vss
A0 to A18
DQ0 to DQ15
CS1#
CS2
WE#
OE#
LB#
UB#
NC
Function
Power supply
Ground
Address input
Data input/output
Chip select 1
Chip select 2
Write enable
Output enable
Lower byte enable
Upper byte enable
Non connection
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 3 of 15
R1LV0816ABG –5SI, 7SI
Block Diagram
A0
A1
ADDRESS
ROW
MEMORY ARRAY
BUFFER
DECODER
512k-word x16-bit
DQ0
DQ1
A18
DQ
BUFFER
DQ7
DATA
SENSE / WRITE AMPLIFIER
SELECTOR
DQ8
COLUMN DECODER
DQ
DQ9
BUFFER
CLOCK
DQ15
GENERATOR
CS2
CS1#
UPPER or
LB#
UB#
WE#
OE#
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 4 of 15
LOWER BYTE
CONTROL
Vcc
Vss
R1LV0816ABG –5SI, 7SI
Operation Table
CS1#
CS2
LB#
UB#
WE#
OE#
DQ0~7
DQ8~15
Operation
H
X
X
X
X
X
High-Z
High-Z
Stand-by
X
L
X
X
X
X
High-Z
High-Z
Stand-by
X
X
H
H
X
X
High-Z
High-Z
Stand-by
L
H
L
H
L
X
Din
High-Z
Write in lower byte
L
H
L
H
H
L
Dout
High-Z
Read in lower byte
L
H
L
H
H
H
High-Z
High-Z
Output disable
L
H
H
L
L
X
High-Z
Din
Write in upper byte
L
H
H
L
H
L
High-Z
Dout
Read in upper byte
L
H
H
L
H
H
High-Z
High-Z
Output disable
L
H
L
L
L
X
Din
Din
Word write
L
H
L
L
H
L
Dout
Dout
Word read
L
H
L
L
H
H
High-Z
High-Z
Output disable
Note 1. H: VIH L:VIL
X: VIH or VIL
Absolute Maximum Ratings
Parameter
Power supply voltage relative to Vss
Terminal voltage on any pin relative to Vss
Power dissipation
Operation temperature
Storage temperature range
Storage temperature range under bias
Note 1. -3.0V in case of AC (Pulse width ≤30ns)
2. Maximum voltage is +4.6V
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 5 of 15
Symbol
Value
unit
Vcc
VT
PT
Topr
Tstg
Tbias
-0.5 to +4.6
-0.5*1 to Vcc+0.3*2
0.7
-40 to +85
-65 to 150
-40 to +85
V
V
W
°C
°C
°C
R1LV0816ABG –5SI, 7SI
Recommend Operating Conditions
Parameter
Supply voltage
Input high voltage
Input low voltage
Ambient temperature range
Symbol
Min.
Typ.
Max.
Unit
Test conditions
Vcc
Vss
2.4
0
2.0
2.2
-0.2
-0.2
-40
3.0
0
-
3.6
0
Vcc+0.2
Vcc+0.2
0.4
0.6
+85
V
V
V
V
V
V
°C
Vcc=2.4V to 2.7V
Vcc=2.7V to 3.6V
Vcc=2.4V to 2.7V
Vcc=2.7V to 3.6V
-
VIH
VIL
Ta
Note
1
1
Note 1. -3.0V in case of AC (Pulse width ≤30ns)
DC Characteristics
Parameter
Input leakage current
Output leakage current
Average operating current
Standby current
Standby current
Symbol
Min.
Typ.
Max.
Unit
| ILI |
-
-
1
A
Test conditions
| ILO |
-
-
1
A
ICC1
-
20*1
35
mA
ICC2
-
2*1
5
mA
ISB
-
0.1*1
0.3
mA
CS2 =VIL
-
1.2*1
4
A
~+25°C
-
3*2
6
A
~+40°C
-
-
15
A
~+70°C
-
-
20
A
~+85°C
VOH
2.4
-
-
V
VOH2
2.0
-
-
V
VOL
-
-
0.4
V
IOL = 2mA
Vcc≥2.7V
VOL2
-
-
0.4
V
IOL = 0.1mA
Vin = Vss to Vcc
CS1# =VIH or CS2 =VIL or
OE# =VIH or WE# =VIL or
LB# = UB# =VIH, VI/O =Vss to Vcc
Min. cycle, duty =100%, II/O = 0mA
CS1# =VIL, CS2 =VIH, Others = VIH/VIL
Cycle =1 s, duty =100%, II/O = 0mA
CS1# ≤ 0.2V, CS2 ≥ VCC-0.2V,
VIH ≥ VCC-0.2V, VIL ≤ 0.2V
ISB1
Output high voltage
Output low voltage
Vin ≥ 0V
(1) 0V ≤ CS2 ≤ 0.2V or
(2) CS1# ≥ VCC-0.2V,
CS2 ≥ VCC-0.2V or
(3) LB# = UB# ≥ VCC-0.2V,
CS1# ≤ 0.2V,
CS2 ≥ VCC-0.2V
IOH = -1mA
Vcc≥2.7V
IOH = -0.1mA
Note 1.Typical parameter indicates the value for the center of distribution at 3.0V(Ta=+25°C), and not 100% tested.
2.Typical parameter indicates the value for the center of distribution at 3.0V(Ta=+40°C), and not 100% tested.
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 6 of 15
R1LV0816ABG –5SI, 7SI
Capacitance
(Ta =25°C, f =1MHz)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Test conditions
Note
10
10
pF
pF
Vin =0V
V I/O =0V
1
1
Input capacitance
C in
Input / output capacitance
C I/O
Note 1.Typical parameter is sampled and not 100% tested.
AC Characteristics
Test Conditions (Vcc = 2.4V ~ 3.6V, Ta = -40 ~ +85°C)
Input pulse levels: VIL = 0.4V, VIH = 2.4V (Vcc = 2.7V ~ 3.6 V)
VIL = 0.4V, VIH = 2.2V (Vcc = 2.4V ~ 2.7 V)
Input rise and fall times: 5ns
Input and output timing reference level: 1.4V
Output load: See figures (Including scope and jig)
1.4V
RL = 500 ohm
DQ
CL = 30 pF
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 7 of 15
R1LV0816ABG –5SI, 7SI
Read cycle
Parameter
Read cycle time
Address access time
Chip select access time
Output enable to output valid
Output hold from address change
LB#, UB# access time
Chip select to output in low-Z
LB#, UB# enable to low-Z
Output enable to output in low-Z
Chip deselect to output in high-Z
LB#, UB# disable to high-Z
Output disable to output in high-Z
Symbol
R1LV0816ABG-7SI
Unit
Note
Min.
55
-
Max.
55
55
55
Min.
70
-
Max.
70
70
70
ns
ns
ns
ns
tCLZ1
tCLZ2
10
10
10
30
55
-
10
10
10
35
70
-
ns
ns
ns
ns
ns
2,3
2,3
tBLZ
tOLZ
tCHZ1
tCHZ2
5
5
0
0
20
20
5
5
0
0
25
25
ns
ns
ns
ns
2,3
2,3
1,2,3
1,2,3
tBHZ
tOHZ
0
0
20
20
0
0
25
25
ns
ns
1,2,3
1,2,3
tRC
tAA
tACS1
tACS2
tOE
tOH
tBA
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 8 of 15
R1LV0816ABG-5SI
(Note 0)
R1LV0816ABG –5SI, 7SI
Write Cycle
Parameter
Write cycle time
Address valid to end of write
Chip select to end of write
Write pulse width
LB#, UB# valid to end of write
Address setup time
Write recovery time
Data to write time overlap
Data hold from write time
Output enable from end of write
Output disable to output in high-Z
Write to output in high-Z
Symbol
tWC
tAW
tCW
tWP
tBW
tAS
tWR
tDW
tDH
tOW
tOHZ
tWHZ
R1LV0816ABG-5SI
(Note 0)
Min.
55
50
50
40
50
0
0
25
0
5
0
0
Max.
20
20
R1LV0816ABG-7SI
Min.
70
65
65
55
65
0
0
35
0
5
0
0
Max.
25
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
5
4
6
7
2
1,2
1,2
Note 0. If Vcc is 2.4-2.7V, parameters of R1LV0816ABG-7SI (70ns) are applied.
1. tCHZ, tOHZ, tWHZ and tBHZ are defined as the time at which the outputs achieve the open circuit conditions
and are not referred to output voltage levels.
2. Typical parameter is sampled and not 100% tested.
3. At any given temperature and voltage condition, tHZ max is less than tLZ min both for given device and
from device to device.
4. A write occurs during the overlap of a low CS1#, a high CS2, a low WE# and a low LB# or low UB#.
A write begins at the latest transitions among CS1# going low, CS2 going high, WE# going low and LB#
going low or UB# going low.
A write ends at the earliest transitions among CS1# going high, CS2 going low, WE# going high and LB#
going high or UB# going high. tWP is measured from the beginning of write to the end of write.
5. tCW is measured from the later of CS1# going low or CS2 going high to the end of write.
6. tAS is measured the address valid to the beginning of write.
7. tWR is measured from the earliest of CS1# or WE# going high or CS2 going low to the end of write cycle
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 9 of 15
Timing Waveforms
Read Cycle
tRC
A0~18
tOH
tAA
tBA
LB#,UB#
tBLZ
tBHZ
tACS1
CS1#
tCLZ1
CS2
tCHZ1
tACS2
tCLZ2
WE#
tCHZ2
VIH
WE# = “H” level
VIL
tOE
OE#
tOLZ
tOHZ
High impedance
DQ0~15
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 10 of 15
Valid Data
R1LV0816ABG –5SI, 7SI
Write Cycle (1) (WE# CLOCK)
tWC
A0~18
tOH
tBW
LB#,UB#
tCW
CS1#
tCW
CS2
tAW
tAS
tWP
tWR
WE#
OE#
tWHZ
tOLZ
tOHZ
DQ0~15
tOW
Valid Data
tDW
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 11 of 15
tDH
R1LV0816ABG –5SI, 7SI
Write Cycle (2) (CS1#, CS2 CLOCK)
tWC
A0~18
tAW
tBW
LB#,UB#
tAS
tCW
tWR
tAS
tCW
tWR
CS1#
CS2
tWP
WE#
OE#
OE# = “H” level
VIH
VIL
tDW
DQ0~15
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 12 of 15
Valid Data
R1LV0816ABG –5SI, 7SI
Write Cycle (3) (LB#, UB# CLOCK)
tWC
A0~18
tAW
tAS
tBW
tWR
LB#,UB#
tCW
CS1#
tCW
CS2
tWP
WE#
OE#
OE# = “H” level
VIH
VIL
tDW
DQ0~15
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 13 of 15
tDH
Valid Data
R1LV0816ABG –5SI, 7SI
Data Retention Characteristics
Parameter
VCC for data retention
Data retention current
Chip select to data retention time
Operation recovery time
Symbol
VDR
Min.
Typ.
Max.
Test conditions*3
Unit
1.5
-
3.6
V
Vin ≥ 0V
(1) 0V ≤ CS2 ≤ 0.2V or
(2) CS1# ≥ VCC-0.2V,
CS2 ≥ VCC-0.2V or
(3) LB# = UB# ≥ VCC-0.2V,
CS1# ≤ 0.2V,
CS2 ≥ VCC-0.2V
-
1.2*1
4
A
~+25°C
-
3*2
6
A
~+40°C
-
-
15
A
~+70°C
-
-
20
A
~+85°C
0
5
-
-
ns
ms
ICCDR
tCDR
tR
Vcc=3.0V, Vin ≥ 0V
(1) 0V ≤ CS2 ≤ 0.2V or
(2) CS1# ≥ VCC-0.2V,
CS2 ≥ VCC-0.2V or
(3) LB# = UB# ≥ VCC-0.2V,
CS1# ≤ 0.2V,
CS2 ≥ VCC-0.2V
See retention waveform.
Note 1.Typical parameter indicates the value for the center of distribution at 3.0V(Ta=+25°C), and not 100% tested.
2.Typical parameter indicates the value for the center of distribution at 3.0V(Ta=+40°C), and not 100% tested.
3.CS2 controls address buffer, WE# buffer, CS1# Buffer, OE# buffer, LB#, UB# buffer and Din buffer.
If CS2 controls data retention mode, Vin levels (address, WE#, OE#, LB#, UB#, DQ) can be in the high
impedance state. If CS1# controls data retention mode, CS2 must be CS2 ≥ VCC-0.2V or 0V ≤ CS2 ≤ 0.2V .
The other inputs levels (address, WE#, OE#, CS1#, LB#, UB#, DQ) can be in the high impedance state.
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 14 of 15
R1LV0816ABG –5SI, 7SI
Data Retention Timing Waveforms
(1) CS1# controlled
Vcc
tCDR
2.4V
2.4V
tR
VDR
2.0V
2.0V
CS1# ≥ Vcc - 0.2V
CS1#
(2) CS2 controlled
Vcc
tCDR
CS2
2.4V
2.4V
tR
VDR
0.4V
0.4V
0V ≤ CS2 ≤ 0.2V
(3) LB#, UB# controlled
Vcc
tCDR
2.0V
LB#, UB#
REJ03C0393-0100 Rev.1.00 2009.12.08
Page 15 of 15
2.4V
2.4V
VDR
LB#, UB# ≥ Vcc - 0.2V
tR
2.0V
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Notes:
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but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples.
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Notice
1.
2.
3.
4.
5.
6.
7.
All information included in this document is current as of the date this document is issued. Such information, however, is
subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please
confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to
additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website.
Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights
of third parties by or arising from the use of Renesas Electronics products or technical information described in this document.
No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights
of Renesas Electronics or others.
You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part.
Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of
semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software,
and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by
you or third parties arising from the use of these circuits, software, or information.
When exporting the products or technology described in this document, you should comply with the applicable export control
laws and regulations and follow the procedures required by such laws and regulations. You should not use Renesas
Electronics products or the technology described in this document for any purpose relating to military applications or use by
the military, including but not limited to the development of weapons of mass destruction. Renesas Electronics products and
technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited
under any applicable domestic or foreign laws or regulations.
Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics
does not warrant that such information is error free. Renesas Electronics assumes no liability whatsoever for any damages
incurred by you resulting from errors in or omissions from the information included herein.
Renesas Electronics products are classified according to the following three quality grades: “Standard”, “High Quality”, and
“Specific”. The recommended applications for each Renesas Electronics product depends on the product’s quality grade, as
indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular
application. You may not use any Renesas Electronics product for any application categorized as “Specific” without the prior
written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for
which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way
liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an
application categorized as “Specific” or for which the product is not intended where you have failed to obtain the prior written
consent of Renesas Electronics. The quality grade of each Renesas Electronics product is “Standard” unless otherwise
expressly specified in a Renesas Electronics data sheets or data books, etc.
“Standard”:
8.
9.
10.
11.
12.
Computers; office equipment; communications equipment; test and measurement equipment; audio and visual
equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots.
“High Quality”: Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anticrime systems; safety equipment; and medical equipment not specifically designed for life support.
“Specific”:
Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or
systems for life support (e.g. artificial life support devices or systems), surgical implantations, or healthcare
intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life.
You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics,
especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation
characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or
damages arising out of the use of Renesas Electronics products beyond such specified ranges.
Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have
specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further,
Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to
guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a
Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire
control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because
the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system
manufactured by you.
Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental
compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable
laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS
Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with
applicable laws and regulations.
This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas
Electronics.
Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this
document or Renesas Electronics products, or if you have any other inquiries.
(Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majorityowned subsidiaries.
(Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.