HD74LV1GT126A Bus Buffer Gate with 3–state Output / CMOS Logic Level Shifter REJ03D0124-0900 Rev.9.00 Mar 21, 2008 Description The HD74LV1GT126A has a bus buffer gate with 3–state output in a 5 pin package. Output is disabled when the associated output enable (OE) input is low. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the minimum value of the resistor is determined by the current sourcing capability of the driver. The input protection circuitry on this device allows over voltage tolerance on the input, allowing the device to be used as a logic–level translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high-voltage power supply. Low voltage and highspeed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features • The basic gate function is lined up as Renesas uni logic series. • Supplied on emboss taping for high-speed automatic mounting. • TTL compatible input level. Supply voltage range : 3.0 to 5.5 V Operating temperature range : –40 to +85°C • Logic-level translate function 3.0 V CMOS logic → 5.0 V CMOS logic (@VCC = 5.0 V) 1.8 V or 2.5 V CMOS logic → 3.3 V CMOS logic (@VCC = 3.3 V) • All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V, Output : Z) • Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V) • All the logical input has hysteresis voltage for the slow transition. • Ordering Information Part Name Package Type HD74LV1GT126ACME CMPAK–5 pin HD74LV1GT126AVSE VSON–5 pin Note: Package Code (Previous Code) PTSP0005ZC-A (CMPAK-5V) PUSN0005KA-A (TNP-5DV) Please consult the sales office for the above package availability. REJ03D0124-0900 Rev.9.00, Mar 21, 2008 Page 1 of 7 Package Abbreviation Taping Abbreviation (Quantity) CM E (3000 pcs/reel) VS E (3000 pcs/reel) HD74LV1GT126A Outline and Article Indication • HD74LV1GT126A Index band Marking T C = Control code CMPAK–5 • HD74LV1GT126A Marking T C = Control code VSON–5 Function Table Inputs OE H H L H : High level L : Low level X : Immaterial Z : High impedance REJ03D0124-0900 Rev.9.00, Mar 21, 2008 Page 2 of 7 A H L X Output Y H L Z HD74LV1GT126A Pin Arrangement OE 1 A 2 GND 3 5 VCC 4 Y (Top view) Absolute Maximum Ratings Item Supply voltage range Symbol VCC Ratings –0.5 to 7.0 Unit V Input voltage range *1 VI V Output voltage range *1, 2 VO Input clamp current Output clamp current Continuous output current IIK IOK IO –0.5 to 7.0 –0.5 to VCC + 0.5 –0.5 to 7.0 –20 ±50 ±25 mA mA mA ICC or IGND ±50 mA PT 200 mW Tstg –65 to 150 °C Continuous current through VCC or GND Maximum power dissipation *3 at Ta = 25°C (in still air) Storage temperature Notes: V Test Conditions Output : H or L VCC : OFF or Output : Z VI < 0 VO < 0 or VO > VCC VO = 0 to VCC The absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The maximum package power dissipation was calculated using a junction temperature of 150°C. Recommended Operating Conditions Item Supply voltage range Input voltage range Symbol VCC VI Output voltage range VO IOH Output current IOL Input transition rise or fall rate ∆t / ∆v Operating free-air temperature Ta Note: Min 3.0 0 0 0 — — — — 0 0 –40 Unused or floating inputs must be held high or low. REJ03D0124-0900 Rev.9.00, Mar 21, 2008 Page 3 of 7 Max 5.5 5.5 VCC 5.5 6 12 –6 –12 100 20 85 Unit V V V mA mA ns / V °C Conditions Output : Z VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V HD74LV1GT126A Electrical Characteristic • Ta = –40 to 85°C Item Symbol VOH VCC (V) * 3.0 to 3.6 4.5 to 5.5 3.0 to 3.6 4.5 to 5.5 3.3 5.0 Min to Max 3.0 Min 1.5 2.0 — — — — VCC–0.1 2.48 Typ — — — — 0.10 0.15 — — Max — — 0.6 0.8 — — — — VOL 4.5 Min to Max 3.0 3.8 — — — — — — 0.1 0.44 Input current IIN 4.5 0 to 5.5 — — — — 0.55 ±1 µA IOH = –50 µA IOH = –6 mA IOH = –12 mA IOL = 50 µA IOL = 6 mA IOL = 12 mA VIN = 5.5 V or GND Off state output current IOZ Min to Max — ±5 — µA VO = 5.5 V or GND Quiescent supply current ICC 5.5 — — 10 µA VIN = VCC or GND, IO = 0 ∆ICC 5.5 — — 1.5 mA IOFF CIN 0 5.0 — — — 3.0 5 — µA pF VIH Input voltage VIL Hysteresis voltage VH Output voltage Output leakage current Input capacitance Note: Unit Test condition V VT+ – VT– V V One input VIN = 3.4 V, other input VCC or GND VIN or VO = 0 to 5.5 V VIN = VCC or GND For conditions shown as Min or Max, use the appropriate values under recommended operating conditions. Switching Characteristics • VCC = 3.3 ± 0.3 V Item Symbol Ta = 25°C Typ 5.0 6.5 Max 9.0 11.5 Min 1.0 1.0 Max 10.5 13.0 Ta = –40 to 85°C Propagation delay time tPLH tPHL Min — — Enable time tZH tZL — — 5.0 6.5 9.0 11.5 1.0 1.0 Disable time tHZ tLZ — — 4.5 6.0 10.0 13.5 1.0 1.0 Max 5.5 7.5 Min 1.0 1.0 Max 6.5 8.5 Unit Test Conditions FROM (Input) TO (Output) ns CL = 15 pF CL = 50 pF A Y 10.5 13.0 ns CL = 15 pF CL = 50 pF OE Y 11.5 15.0 ns CL = 15 pF CL = 50 pF OE Y FROM (Input) TO (Output) • VCC = 5.0 ± 0.5 V Propagation delay time tPLH tPHL Min — — Ta = 25°C Typ 3.5 4.6 Enable time tZH tZL — — 3.6 4.6 5.1 7.1 1.0 1.0 Disable time tHZ tLZ — — 3.3 4.3 6.8 8.8 1.0 1.0 Item Symbol REJ03D0124-0900 Rev.9.00, Mar 21, 2008 Page 4 of 7 Ta = –40 to 85°C Unit Test Conditions ns CL = 15 pF CL = 50 pF A Y 6.0 8.0 ns CL = 15 pF CL = 50 pF OE Y 8.0 10.0 ns CL = 15 pF CL = 50 pF OE Y HD74LV1GT126A Operating Characteristics • CL = 50 pF Item Power dissipation capacitance Symbol VCC (V) CPD 5.0 Min Ta = 25°C Typ Max — 11.5 — Unit pF Test Conditions f = 10 MHz Test Circuit VCC Pulse Generator Z OUT = 50 Ω See Function Table Input VCC Output 1 k Ω S1 CL = 15 or 50 pF TEST t PLH / t PHL t ZH/ t HZ t ZL / t LZ Note: 1. C L includes probe and jig capacitance. REJ03D0124-0900 Rev.9.00, Mar 21, 2008 Page 5 of 7 OPEN See under table GND *1 S1 OPEN GND VCC HD74LV1GT126A Waveforms • Waveforms – 1 tf tr 90 % Vref Input A VI 90 % Vref 10 % 10 % GND t PHL t PLH VOH Output Y 50% 50% VOL • Waveforms – 2 tf tr 90 % Vref Input OE VI 90 % Vref 10 % 10 % t LZ t ZL GND VCC 50% Waveform – A VOL + 0.3 V t ZH Waveform – B t HZ VOH – 0.3 V 50% VOL VOH GND INPUTS VCC (V) VI 3.3±0.3 5.0±0.5 Vref tr / tf 2.5 V ≤ 3.0 ns 50% ≤ 3.0 ns 1.5 V 3V Notes: 1. Input waveform : PRR ≤ 1 MHz, Zo = 50 Ω. 2. Waveform – A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform – B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement. REJ03D0124-0900 Rev.9.00, Mar 21, 2008 Page 6 of 7 HD74LV1GT126A Package Dimensions JEITA Package Code RENESAS Code SC-88A Previous Code PTSP0005ZC-A MASS[Typ.] CMPAK-5 / CMPAK-5V D 0.006g A e Q c E HE LP L A A x M L1 S Reference Symbol A3 b A A A1 A2 A3 b b1 c c1 D E e e A2 A A1 y S S e1 HE L L1 LP x y b b1 l1 c1 c b2 A-A Section JEITA Package Code P-USON5-1.2x1.6-0.50 Pattern of terminal position areas RENESAS Code PUSN0005KA-A Previous Code TNP-5D/TNP-5DV Dimension in Millimeters Min 0.8 0 0.8 0.15 0.1 1.8 1.15 1.8 0.3 0.1 0.2 Nom 0.9 0.25 0.22 0.2 0.13 0.11 2.0 1.25 0.65 2.1 b2 e1 1.5 l1 Q 0.25 Max 1.1 0.1 1.0 0.3 0.15 2.2 1.35 2.4 0.7 0.5 0.6 0.05 0.05 0.35 0.9 MASS[Typ.] 0.002g D L1 1.0 ±0.1 4 ( 0.1 ) HE E ( 0.1 ) 5 1 3 A c e b REJ03D0124-0900 Rev.9.00, Mar 21, 2008 Page 7 of 7 Reference Dimension in Millimeters Symbol D E A A1 A2 b b1 e Lp x y ZD c c1 HE L1 Min Nom Max 1.55 1.6 1.65 1.1 1.2 1.3 0.6 0.15 0.2 0.3 0.5 0.07 0.12 0.22 1.55 1.6 0.2 1.65 Sales Strategic Planning Div. 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