HD74HC76 Dual J-K Flip-Flops (with Preset and Clear) REJ03D0551-0200 (Previous ADE-205-423) Rev.2.00 Oct 06, 2005 Description Each flip-flop has independent J, K, preset, clear, and clock inputs and Q and Q outputs. This device is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock and accomplished by a low logic level on the corresponding input. Features • • • • • • High Speed Operation: tpd (Clock to Q) = 21 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C) Ordering Information Part Name HD74HC76P Package Code (Previous Code) PRDP0016AE-B (DP-16FV) Package Type DILP-16 pin Package Abbreviation P — PRSP0016DH-B FP (FP-16DAV) Note: Please consult the sales office for the above package availability. HD74HC76FPEL Taping Abbreviation (Quantity) EL (2,000 pcs/reel) SOP-16 pin (JEITA) Function Table Inputs Outputs Preset Clear Clock J K Q Q L H X X X H L H L X X X L L L X X X H H H H L L H H L H L H H H H L H L H H H H Toggle H H L X X No change H H H X X No change H H X X No change *1 *1 H No change H: High level L: Low level X: Irrelevant Note: 1. Q and Q will remain High as long as Preset and Clear are Low, but Q and Q are unpredictable, if Preset and Clear go High simultaneously. Rev.2.00, Oct 06, 2005 page 1 of 6 HD74HC76 Pin Arrangement 16 1K 1CK 1 J CK K 1PR 2 PR 1CLR 3 Q 15 1Q CLR 14 1Q Q 13 GND 1J 4 12 2K VCC 5 K CK J 2CK 6 CLR 2PR 7 Q 11 2Q PR 10 2Q Q 9 2J 2CLR 8 (Top view) Logic Diagram (1/2) PR Q CLR J # CK CK K # CK CK CK # CK # CK CK Q CK # CK CK Absolute Maximum Ratings Item Supply voltage range Symbol VCC Ratings –0.5 to 7.0 Unit V Input / Output voltage Input / Output diode current Vin, Vout IIK, IOK –0.5 to VCC +0.5 ±20 V mA Output current VCC, GND current IO ICC or IGND ±25 ±50 mA mA PT Tstg 500 –65 to +150 mW °C Power dissipation Storage temperature Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Rev.2.00, Oct 06, 2005 page 2 of 6 HD74HC76 Recommended Operating Conditions Symbol Ratings Unit Supply voltage Input / Output voltage Item VCC VIN, VOUT 2 to 6 0 to VCC V V Operating temperature Ta –40 to 85 0 to 1000 °C 0 to 500 0 to 400 ns Input rise / fall time Note: *1 tr , tf Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Electrical Characteristics Ta = 25°C Item Input voltage Symbol VCC (V) VIH VIL Output voltage VOH VOL Ta = –40 to+85°C 2.0 Min 1.5 Typ — Max — Min 1.5 Max — 4.5 6.0 3.15 4.2 — — — — 3.15 4.2 — — 2.0 4.5 — — — — 0.5 1.35 — — 0.5 1.35 6.0 2.0 — 1.9 — 2.0 1.8 — — 1.9 1.8 — 4.5 6.0 4.4 5.9 4.5 6.0 — — 4.4 5.9 — — 4.5 6.0 4.18 5.68 — — — — 4.13 5.63 — — 2.0 4.5 — — 0.0 0.0 0.1 0.1 — — 0.1 0.1 6.0 4.5 — — 0.0 — 0.1 0.26 — — 0.1 0.33 Unit Test Conditions V V V Vin = VIH or VIL IOH = –20 µA IOH = –4 mA IOH = –5.2 mA V Vin = VIH or VIL IOL = 20 µA IOL = 4 mA Input current Iin 6.0 6.0 — — — — 0.26 ±0.1 — — 0.33 ±1.0 IOL = 5.2 mA µA Vin = VCC or GND Quiescent supply current ICC 6.0 — — 2.0 — 20 µA Vin = VCC or GND, Iout = 0 µA Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Item Maximum clock frequency Symbol VCC (V) fmax Propagation delay tPLHt, tPHL time Min Ta = 25°C Ta = –40 to +85°C Unit Typ Max Min Max 2.0 4.5 — — — — 6 30 — — 5 24 6.0 2.0 — — — — 35 150 — — 28 190 4.5 6.0 — — 21 — 30 26 — — 38 33 2.0 4.5 — — — 17 140 28 — — 175 35 6.0 2.0 — — — — 24 140 — — 30 175 4.5 6.0 — — 19 — 28 24 — — 35 30 Rev.2.00, Oct 06, 2005 page 3 of 6 Test Conditions MHz ns Clock to Q or Q ns Clear to Q or Q ns Preset to Q or Q HD74HC76 Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25°C Item Pulse width Symbol VCC (V) tw Setup time tsu Hold time th Removal time trem Output rise/fall time tTLH, tTHL Input capacitance Cin Ta = –40 to +85°C 2.0 Min 80 Typ — Max — Min 100 Max — 4.5 6.0 16 14 6 — — — 20 17 — — 2.0 4.5 100 20 — 4 — — 125 25 — — 6.0 2.0 17 0 — — — — 21 0 — — 4.5 6.0 0 0 –3 — — — 0 0 — — 2.0 4.5 100 20 — –2 — — 125 25 — — 6.0 2.0 17 — — — — 75 21 — — 95 4.5 6.0 — — 5 — 15 13 — — 19 16 — — 5 10 — 10 Unit Test Conditions ns Preset, Clear, Clock ns J or K to Clock ns Clock to J or K ns Preset or Clear to Clock ns pF Test Circuit VCC VCC Pulse generator Zout = 50 Ω Input Pulse generator Zout = 50 Ω See Function Table Output Input Preset Clock Q CL = 50 pF J K Clear Output Q Note: C L includes the probe and jig capacitance. Rev.2.00, Oct 06, 2005 page 4 of 6 CL = 50 pF HD74HC76 Waveforms • Waveform − 1 tr tf t w (L) VCC 90 % Clock 50 % 10 % 50 % 50 % 50 % 10 % t w (H) 0V t TLH t THL VOH 90 % 50 % 90 % 50 % 10 % Q 10 % t PLH t PHL t PHL t PLH 90 % Q 50 % 10 % 50 % 10 % VOL VOH VOL t TLH t THL • Waveform − 2 tf Clear tr VCC 90 % 50 % 10 % 90 % 50 % 10 % 0V t w(clear) tf tr 90 % 50 % 90 % 50 % Preset 10 % t w(preset) t PHL 0V t PLH 90 % 50 % 10 % Q t THL t PLH VOH 50 % VOL t PHL VOH 90 % Q 50 % 10 % VCC 50 % VOL t TLH Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns 2. The output are measured one at a time with one transition per measurement. Rev.2.00, Oct 06, 2005 page 5 of 6 HD74HC76 Package Dimensions JEITA Package Code P-DIP16-6.3x19.2-2.54 RENESAS Code PRDP0016AE-B Previous Code DP-16FV MASS[Typ.] 1.05g D 9 E 16 1 8 b3 0.89 Z A1 A Reference Symbol L e Nom θ c e1 D 19.2 E 6.3 JEITA Package Code P-SOP16-5.5x10.06-1.27 RENESAS Code PRSP0016DH-B *1 Previous Code FP-16DAV 7.4 A1 0.51 b p 0.40 b 3 0.48 0.56 1.30 c 0.19 θ 0° e 2.29 0.25 0.31 2.54 2.79 15° 1.12 L 2.54 MASS[Typ.] 0.24g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. D F 16 20.32 5.06 Z ( Ni/Pd/Au plating ) Max 7.62 1 A bp e Dimension in Millimeters Min 9 c HE *2 E bp Index mark Reference Symbol Terminal cross section ( Ni/Pd/Au plating ) 1 Z *3 bp Nom D 10.06 E 5.50 Max 10.5 A2 8 e Dimension in Millimeters Min x A1 M 0.00 0.10 0.20 0.34 0.40 0.46 0.15 0.20 0.25 7.80 8.00 2.20 A L1 bp b1 c A c A1 θ y L Detail F 1 θ 0° HE 7.50 1.27 e x 0.12 y 0.15 Z 0.80 0.50 L L Rev.2.00, Oct 06, 2005 page 6 of 6 8° 1 0.70 1.15 0.90 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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