HD74HC390 Dual Decade Counters REJ03D0624-0200 (Previous ADE-205-503) Rev.2.00 Mar 30, 2006 Description The HD74HC390 incorporate dual decade counters, each composed of a divide-by-two and a divide-by-five counter. The divide-by-two and divide-by-five counters can be cascaded to form dual decade, dual bi-quinary, or various combinations up to a single divide-by-100 counter. The HD74HC390 is incremented on the high to low transition (negative edge) of the clock input, and each has an independent clear input. When clear is set high all four bits of each counter are set to a low level. This enables count truncation and allows the implementation of divide-by-N counter configurations. Features • High Speed Operation: tpd (Clock A to QA) = 11 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) • Ordering Information Part Name HD74HC390P Package Code (Previous Code) Package Type PRDP0016AE-B (DP-16FV) DILP-16 pin Package Abbreviation P PRSP0016DH-B FP (FP-16DAV) Note: Please consult the sales office for the above package availability. HD74HC390FPEL SOP-16 pin (JEITA) Taping Abbreviation (Quantity) — EL (2,000 pcs/reel) Function Table Clock Note: A B Clear Operation X X X H L Clear ÷2 and ÷5 Increment ÷2 L Increment ÷5 X 1. H; High level, L; Low level, X; Irrelevant, Z; High impedance Rev.2.00 Mar 30, 2006 page 1 of 6 HD74HC390 Pin Arrangement 1 16 VCC 1Clear 2 15 2A 1QA Output 3 CLR 1QA 1A 1B 4 1B CLR 2QA 2A 1QB 5 1QB 2B 12 2B 1QC 6 1QC 2QB 11 2QB 1QD 7 1QD 2QC 10 2QC GND 8 14 2Clear 13 2QD 9 2QA Output Outputs Outputs 1A 2QD (Top view) Logic Diagram Clear A CK D Q CK R Q A B CK D Q CK R Q B CK D Q CK R Q C CK D Q CK R Q D Rev.2.00 Mar 30, 2006 page 2 of 6 HD74HC390 Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage range Input / Output voltage VCC VIN, VOUT –0.5 to 7.0 –0.5 to VCC +0.5 V V IIK, IOK IOUT ±20 ±25 mA mA ICC or IGND PT ±50 500 mA mW Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Tstg –65 to +150 °C Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Recommended Operating Conditions Item Supply voltage Symbol VCC Ratings 2 to 6 Unit V Input / Output voltage Operating temperature VIN, VOUT Ta 0 to VCC –40 to 85 V °C tr , tf 0 to 1000 0 to 500 Input rise / fall time Note: *1 ns 0 to 400 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Electrical Characteristics Item Input voltage Symbol VCC (V) VIH VIL Output voltage VOH VOL Input current Quiescent supply current Iin ICC Min Ta = 25°C Typ Max Ta = –40 to+85°C Unit Min Max 2.0 4.5 1.5 3.15 — — — — 1.5 3.15 — — 6.0 2.0 4.2 — — — — 0.5 4.2 — — 0.5 4.5 6.0 — — — — 1.35 1.8 — — 1.35 1.8 2.0 4.5 1.9 4.4 2.0 4.5 — — 1.9 4.4 — — 6.0 4.5 5.9 4.18 6.0 — — — 5.9 4.13 — — 6.0 2.0 5.68 — — 0.0 — 0.1 5.63 — — 0.1 4.5 6.0 — — 0.0 0.0 0.1 0.1 — — 0.1 0.1 4.5 6.0 — — — — 0.26 0.26 — — 0.33 0.33 6.0 6.0 — — — — ±0.1 4.0 — — ±1.0 40 Rev.2.00 Mar 30, 2006 page 3 of 6 Test Conditions V V V Vin = VIH or VIL IOH = –20 µA IOH = –4 mA V IOH = –5.2 mA Vin = VIH or VIL IOL = 20 µA IOH = 4 mA IOH = 5.2 mA µA Vin = VCC or GND µA Vin = VCC or GND, Iout = 0 µA HD74HC390 Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25°C Item Symbol VCC (V) Ta = –40 to +85°C 2.0 Min — Typ — Max 5 Min — Max 4 4.5 6.0 — — — — 27 32 — — 21 25 2.0 4.5 — — — 11 120 24 — — 150 30 6.0 2.0 — — — — 20 290 — — 26 365 4.5 6.0 — — 32 — 58 49 — — 73 62 2.0 4.5 — — — 16 130 26 — — 165 33 6.0 2.0 — — — — 22 185 — — 28 230 4.5 6.0 — — 20 — 37 31 — — 46 39 tPLH tPHL 2.0 4.5 — — — 15 130 26 — — 165 33 tPHL 6.0 2.0 — — — — 22 165 — — 28 205 4.5 6.0 — — 14 — 33 28 — — 41 35 2.0 4.5 80 16 — 8 — — 100 20 — — 6.0 2.0 14 25 — — — — 17 31 — — 4.5 6.0 5 4 1 — — — 6 5 — — Maximum clock frequency fmax Propagation delay time tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Pulse width tw Removal time th Output rise/fall time tTLH tTHL 2.0 4.5 — — — 5 75 15 — — 95 19 Input capacitance Cin 6.0 — — — — 5 13 10 — — 16 10 Unit Test Conditions MHz ns Clock A to QA ns Clock A to QC (QA connected to Clock B) ns Clock B to QB ns Clock B to QC ns Clock B to QD ns Clear to QA, QB, QC, QD ns ns ns pF Test Circuit VCC VCC Input Pulse Generator Zout = 50 Ω Input Pulse Generator Zout = 50 Ω See Function Table Output A QA B QB QC Clear Output Output Output CL = 50 pF CL = 50 pF CL = 50 pF QD CL = 50 pF Note : 1. CL includes probe and jig capacitance. Rev.2.00 Mar 30, 2006 page 4 of 6 HD74HC390 Waveforms • Waveform – 1 tr tf VCC Clock 50% 50% tw 50% 50% 0V tw tPHL (Measure at tn+2) tPLH (Measure at tn+1) 90% 50% 10% QA 90% 50% 10% tTHL tPHL (Measure at tn+4) 90% 50% 10% tTHL tPHL (Measure at tn+8) VOH VOL tTLH tPLH (Measure at tn+4) 90% 90% 50% 10% 50% 10% QC VOL tTLH tPLH (Measure at tn+2) 90% 50% 10% QB VOH VOH VOL tTHL tTLH tPHL (Measure at tn+10) tPLH (Measure at tn+8) 90% 90% 50% 10% QD tTHL 50% 10% VOH VOL tTLH Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns 2. tn is bit time with all outputs at low. • Waveform – 2 tr tf VCC 90 % 50 % 50 % Clear 10 % 10 % t w(clear) 0V t PHL VOH 90% QA to QD 50 % 10% VOL tTHL Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns 2. The output are measured one at a time with one transition per measurement. Rev.2.00 Mar 30, 2006 page 5 of 6 HD74HC390 Package Dimensions JEITA Package Code P-DIP16-6.3x19.2-2.54 RENESAS Code PRDP0016AE-B Previous Code DP-16FV MASS[Typ.] 1.05g D 9 E 16 1 8 b3 0.89 A1 A Z L Reference Symbol θ bp e e1 D E A A1 bp b3 c θ e Z L c e1 ( Ni/Pd/Au plating ) JEITA Package Code P-SOP16-5.5x10.06-1.27 RENESAS Code PRSP0016DH-B *1 Previous Code FP-16DAV Dimension in Millimeters Min Nom Max 7.62 19.2 20.32 6.3 7.4 5.06 0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0° 15° 2.29 2.54 2.79 1.12 2.54 MASS[Typ.] 0.24g D F 16 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. 9 c HE *2 E bp Index mark Terminal cross section ( Ni/Pd/Au plating ) 1 Z 8 e *3 bp x Reference Symbol M A L1 A1 θ y L Detail F Rev.2.00 Mar 30, 2006 page 6 of 6 D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Dimension in Millimeters Min Nom Max 10.06 10.5 5.50 0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0° 8° 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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