HAT2080R Silicon N Channel MOS FET High Speed Power Switching REJ03G1180-0200 (Previous: ADE-208-1229) Rev.2.00 Sep 07, 2005 Features • Low on-resistance • Low drive current • High density mounting Outline RENESAS Package code: PRSP0008DD-D (Package name: SOP-8 <FP-8DAV> ) 5 6 7 8 D D D D 65 87 1, 2, 3 4 5, 6, 7, 8 4 G 12 34 S S S 1 2 3 Rev.2.00 Sep 07, 2005 page 1 of 3 Source Gate Drain HAT2080R Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body to drain diode reverse drain current Symbol VDSS Value 250 Unit V VGSS ID ±30 1.7 V A 13.6 1.7 A A 2.5 150 W °C ID (pulse) IDR Note 1 Note 2 Channel dissipation Channel temperature Pch Tch °C Storage temperature Tstg –55 to +150 Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Symbol V (BR) DSS Min 250 Typ — Max — Unit V IGSS IDSS — — — — ±0.1 1 µA µA VGS = ±30 V, VDS = 0 VDS = 250 V, VGS = 0 VGS (off) RDS (on) 3.0 — — 0.65 4.0 0.85 V Ω ID = 1 mA, VDS = 10 V Note 3 ID = 0.85 A, VGS = 10 V Forward transfer admittance Input capacitance |yfs| Ciss 1.2 — 2.0 300 — — S pF Output capacitance Reverse transfer capacitance Coss Crss — — 42 11 — — pF pF ID = 0.85 A, VDS = 10 V VDS = 25 V VGS = 0 f = 1 MHz Turn-on delay time Rise time td (on) tr — — 18 10 — — ns ns Turn-off delay time Fall time td (off) tf — — 47 15 — — ns ns Total gate charge Gate to source charge Qg Qgs — — 11 1.5 — — nC nC Gate to drain charge Body to drain diode forward voltage Qgd VDF — — 5 0.8 — 1.2 nC V trr — 80 — ns Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Body to drain diode reverse recovery time Note: 3. Pulse test Rev.2.00 Sep 07, 2005 page 2 of 3 Test Conditions ID = 10 mA, VGS = 0 Note 3 VDD = 125 V, ID = 0.85 A VGS = 10 V RL = 147 Ω Rg = 10 Ω VDD = 200 V VGS = 10 V ID = 1.7 A IF = 1.7 A, VGS = 0 IF = 1.7 A, VGS = 0 diF/dt = 100 A/µs Note 3 HAT2080R Package Dimensions JEITA Package Code RENESAS Code P-SOP8-3.95 × 4.9-1.27 PRSP0008DD-D Package Name FP-8DAV 0.085g F *1 D MASS[Typ.] bp 1 c *2 E Index mark HE 5 8 4 Z Terminal cross section (Ni/Pd/Au plating) *3 bp x M NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. e Reference Symbol L1 Dimension in Millimeters Min Nom Max D 4.90 5.3 E 3.95 A2 A1 0.10 0.14 0.25 0.34 0.40 0.46 0.15 0.20 0.25 1.75 A A bp A1 b1 c L c1 0° y HE Detail F 5.80 e 8° 6.10 6.20 1.27 x 0.25 y 0.1 Z 0.75 L L1 0.40 0.60 1.27 1.08 Ordering Information Part Name Quantity Shipping Container HAT2080R-EL-E 2500 pcs Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.2.00 Sep 07, 2005 page 3 of 3 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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