HAT2140H Silicon N Channel Power MOS FET Power Switching REJ03G1192-0400 (Previous: ADE-208-1581B) Rev.4.00 Sep 07, 2005 Features • • • • Capable of 7 V gate drive Low drive current High density mounting Low on-resistance RDS (on) = 12.5 mΩ typ. (at VGS = 10 V) Outline RENESAS Package code: PTZZ0005DA-A (Package name: LFPAK) 5 D 5 4 G 12 1, 2, 3 4 5 34 S S S 1 2 3 Rev.4.00 Sep 07, 2005 page 1 of 3 Source Gate Drain HAT2140H Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Symbol VDSS Value 100 Unit V VGSS ID ±20 25 V A 100 25 A A ID (pulse) IDR Note 1 Note 3 Avalanche current Avalanche energy IAP Note 3 EAR 25 62.5 A mJ Channel dissipation Channel temperature Pch Tch Note 2 30 150 W °C –55 to +150 °C Storage temperature Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Tc = 25 °C 3. Value at Tch = 25°C, Rg ≥ 50 Ω Tstg Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit V (BR) DSS V (BR) GSS 100 ±20 — — — — V V ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 IGSS IDSS — — — — ±10 1 µA µA VGS = ±16 V, VDS = 0 VDS = 100 V, VGS = 0 Gate to source cutoff voltage Static drain to source on state resistance VGS (off) RDS (on) 2.0 — — 12.5 3.5 16.0 V mΩ VDS = 10 V, ID = 1 mA Note 4 ID = 12.5 A, VGS = 10 V Forward transfer admittance RDS (on) |yfs| — 27 13.5 45 18.0 — mΩ S ID = 12.5 A, VGS = 7 V Note 4 ID = 12.5 A, VDS = 10 V Input capacitance Output capacitance Ciss Coss — — 6500 480 — — pF pF Reverse transfer capacitance Total gate charge Crss Qg — — 210 105 — — pF nC VDS = 10 V VGS = 0 f = 1 MHz Gate to source charge Gate to drain charge Qgs Qgd — — 20 22 — — nC nC Turn-on delay time Rise time td (on) tr — — 25 24 — — ns ns Turn-off delay time Fall time td (off) tf — — 100 12 — — ns ns Body-drain diode forward voltage Body-drain diode reverse recovery time VDF trr — — 0.83 55 1.08 — V ns Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Note: 4. Pulse test Rev.4.00 Sep 07, 2005 page 2 of 3 Test Conditions Note 4 VDD = 50 V VGS = 10 V ID = 25 A VGS = 10 V, ID = 12.5 A VDD ≅ 30 V RL = 2.4 Ω Rg = 4.7 Ω IF = 25 A, VGS = 0 IF = 25 A, VGS = 0 diF/dt = 100 A/µs Note 4 HAT2140H Package Dimensions JEITA Package Code RENESAS Code SC-100 PTZZ0005DA-A Package Name MASS[Typ.] LFPAK Unit: mm 0.080g 4.9 5.3 Max 4.0 ± 0.2 +0.05 4.2 6.1 –0.3 +0.1 3.95 5 4 0° – 8° +0.25 +0.05 0.20 –0.03 0.6 –0.20 1.3 Max 1 1.1 Max +0.03 0.07 –0.04 3.3 1.0 0.25 –0.03 0.75 Max 0.10 1.27 0.40 ± 0.06 0.25 M (Ni/Pd/Au plating) Ordering Information Part Name Quantity Shipping Container HAT2140H-EL-E 2500 pcs Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.4.00 Sep 07, 2005 page 3 of 3 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. 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