General Description

Preliminary Datasheet
LPA2162
Filterless 2x7W Class- D Stereo Audio Amplifier
With PWM/PFM mode boost convertor
General Description
Features
The LPA2162 is a 2×7W, class-D audio amplifier with
and PCB area.









With high performance external N-MOS and diode,the

external MOS step up convertor integrated. It offers low
THD+N, allowing it to achieve high-quality Power Supply
sound reproduction. The new filterless architecture
allows the device to drive the speaker directly requiring
no low-pass output filters, thus to save the system cost
LPA2162 can provide up to 7.5V stable DC voltage for
amplifier so that it can display 2×7W output at 10% THD

with a 4 Ω load. When it provides 5V DC voltage, it can

provide 2×3W output at 10% THD with a 4 Ω load. The
Integrated PWM/PFM boost convertor
Low start up voltage with 1V
Shut-down current:<5uA
Output voltage Up to 7.5V/3A
Internal Compensation
Duty cycle:13%-85%
Output voltage up to 7.5V
Soft start delay: 2.2mS
270KHz fixed frequency switching for amplifier and
500KHz for step up convertor
2×3W Output at 10% THD with a 4 Ω Load and 5V
PVDD for amplifier
2×5W Output at 1% THD with a 4 Ω Load and 7.5V
PVDD for amplifier
2×6.5W Output at 10% THD with a 4 Ω Load and
7.5V PVDD for amplifier
efficiency of LPA2162 is much better than that of

Filterless, Low Quiescent Current and Low EMI
class-AB cousins with the same numbers of external


Amplifier Efficiency up to 85%
Free LC filter digital modulation, direct-drive
speakers

Short Circuit Protection

Thermal Shutdown

Few External Components to Save the Space and
components. The LPA2162 is available in ETSSOP-20.
Order Information
LPA2162 □ □
□
cost
F: Pb-Free

Pb-Free Package
Package Type
ETSSOP-20
Marking Information
Applications


Portable Bluetooth Speaker
Cellular and Smart mobile phone

Square Speaker
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Device
Marking
Package
Shipping
LPA2162
LPS
ETSSOP-20
3K/REEL
LPA2162
YWX
Y: Y is year code. W: W is week code. X: X is series number.
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Page 1 of 11
Preliminary Datasheet
LPA2162
Typical Application Circuit
Ci
Ri
Ci
Ri
1
20
AGND
PVDDR
2
19
INR
OUTR+
3
18
EXT
PGNDR
4
17
VDD
OUTR-
5
16
FB
OUTL-
6
15
CE
PGNDL
7
14
GND
OUTL+
8
13
VREF
PVDDL
9
12
INL
MUTE
10
11
VDD
SD
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May.-2013
LPA2162
DIE 2
DIE 1
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Preliminary Datasheet
LPA2162
Functional Pin Description
P in
PI N N o.
SD
1
Shutdown pin
PVDDR
2
Right Power VDD
OUTR+
3
Right positive output
PGNDR
4
Right GND
OUTR-
5
Right negative output
OUTL-
6
Left negative output
PGNDL
7
Left power ground
OUTL+
8
Left positive output
PVDDL
9
Left power VDD
MUTE
10
Mute control input (active low)
VDDA
11
Amplifier power supply
INL
12
Left Signal input
VREF
13
Reference voltage pin
GND
14
Ground
CE
15
Chip enable
FB
16
Feedback pin
VDD
17
Power supply
EXT
18
Connect to Gate of external MOS
INR
19
Right Signal input
GNDA
20
Amplifier ground
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Preliminary Datasheet
LPA2162
Absolute Maximum Ratings
Input voltage ------------------------------------------------------------------------------------------ -0.3V to VDD+0.3V
Lead Temperature (Soldering, 5 sec.) ----------------------------------------------------------------------------300°C
Storage Temperature Range ------------------------------------------------------------------------- −65°C to 150°C
Operation Junction Temperature Range ------------------------------------------------------------−40°C to 125°C
Operation Ambient Temperature Range---------------------------------------------------------------−40°C to 85°C
Maximum Junction Temperature Range------------------------------------------------------------------------- 150°C
Recommended Operating Conditions
Supply Input Voltage range------------------------------------------------------------------------------------ 2.7V to 7.5V
Operation Ambient Temperature Range------------------------------------------------------------------−40°C to 85°C
Operation Junction Temperature Range ----------------------------------------------------------------−40°C to 125°C
Thermal Information
Parameter
Symbol
Package
Maximum
Unit
Thermal resistance (junction to ambient
θJA
ETSSOP20
110
℃/W
Thermal resistance (junction to case)
θJA
ETSSOP20
23
℃/W
Electrical Characteristics For Amplifier
(VDD = 7V, GAIN = 24dB, RL=8Ω,TA = 25° C, unless otherwise specified)
Parameter
Symbol
Supply power
VIN
Output power
PO
Total harmonic distortion plus
noise
THD+N
Gain
GV
Power supply ripple rejection
PSRR
LPA2162–00
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Test Conditions
THD+N=10%,
f=1KHz,RL=4Ω
THD+N=10%,
f=1KHz,RL=8Ω
VDD=5.0V,PO=0.
5W,RL=8Ω
VDD=3.6V,PO=0.
5W,RL=8Ω
VDD=5.0V,PO=1
W,RL=4Ω
VDD=5.0V,PO=1
W,RL=4Ω
VDD=7.0V,INPUT
ac-grounded with
CIN=0.47uF
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Min
Typ
Max
Units
2.7
--
7.5
V
VDD=7.5V
VDD=6.5V
6.5
5
7
VDD=5.0V
3
VDD=7.5V
4
W
0.25
f=1KHz
%
0.21
0.25
f=1KHz
%
0.21
f=100HZ
24
dB
-79
dB
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Page 4 of 11
Preliminary Datasheet
f=1KHz
crosstalk
CS
VDD=7V,VORMS
=1V,GV=20dB
f=1KHz
Signal-to-noise ratio
SNR
VDD=7V,VORMS
=1V,GV=20dB
f=1KHz
Output noise
VN
VDD=7.0V,INPUT
ac-grounded with
CIN=0.47uF
Dynamic range
DYN
Eifficency
η
IQ
Quiescen
t current
LPA2162
-78
dB
-95
dB
80
A-weighing
100
No
A-weighing
150
VDD=7.0V,THD=1
%
f=1KHz
90
RL=8Ω,THD=10%
f=1KHz
85
RL=4Ω,THD=10%
VDD=7.5V
VDD=7V
VDD=5.0V
f=1KHz
82
16
11
8
No load
1
μV
dB
%
80
75
70
mA
Electrical Characteristics For Step Up Convertor
(Vin=3.6V,Vout=5V,Cin=100uF,Cout=22uF//100uF,L1=4.7uH)
Parameter
Conditions
Supply Voltage
Output Voltage Range
Supply Current(Shutdown)
VEN=VOUT=0V,VSW=5V
Supply Current
VFB=0.7V
Feedback Voltage
Boost of LPA2162
Min
Typ
Units
Max
2.7
5.5
V
3
7.5
V
1.2
5
uA
150
uA
1.25
1.3
V
Feedback Input Current
VFB=1.2V
50
nA
Switching Frequency
FREQ=VCC
500
KHz
90
%
Maximum Duty Cycle
85
EN Input Low Voltage
0.4
EN Input High Voltage
1.4
EXT pin driver current
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1
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Page 5 of 11
Preliminary Datasheet
LPA2162
Typical Operating Characteristic
ud o
ec s o
+30
+20
d
B
r
A
+10
+0
B
r
-10
B
-20
-30
20
50
100
200
500
1k
2k
5k
10k
Hz
Frequency response characteristic
10
1
0.1
%
0.01
0.001
0.0001
20
2.018k
4.016k
6.014k
8.012k
10.01k 12.008k 14.006k 16.004k 18.002k 20k
Hz
THD+N vs FREQUENCY with 3W OUTPUT
10
1
0.1
%
0.01
0.001
0.0001
20
2.018k
4.016k
6.014k
8.012k
10.01k 12.008k 14.006k 16.004k 18.002k 20k
Hz
THD+N vs FREQUENCY with 4W OUTPUT
10
1
0.1
%
0.01
0.001
0.0001
20
2.018k
4.016k
6.014k
8.012k
10.01k 12.008k 14.006k 16.004k 18.002k 20k
Hz
THD+N vs FREQUENCY with 5W OUTPUT
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20k
Preliminary Datasheet
LPA2162
targeting to different types of noise on the power
Applications Information
supply leads. For higher frequency transients, spikes,
Maximum Gain
or
The LPA2162 has two internal amplifier stages. The
equivalent-series-
first stage's gain is externally configurable, while the
capacitor, typically 1.0μF, works best, placing it as
second stage's is internally fixed. The closed-loop
close as possible to the device V DD terminal. For
gain of the first stage is set by selecting the ratio of
filtering lower- frequency noise signals, a large
Rf to Ri while the second stage's gain is fixed at
capacitor
2x.The output of amplifier 1 serves as the input to
recommended, placing it near the audio power
amplifier 2, thus the two amplifiers produce signals
amplifier.
identical in magnitude, but different in phase by 180°.
Input Capacitor (C i)
Consequently, the differential gain for the IC is
Ci for boost. Large input capacitors are both
A VD=20*log [2*(R f/Ri)]
expensive and space hungry for portable designs.
T h e LPA2162 sets maximum Rf= 510 k Ω±10% .
Clearly, a certain sized capacitor is needed to couple
Mute Operation
in low frequencies without severe attenuation. But in
The MUTE pin is an input for controlling the output
many cases the speakers used in portable systems,
state of the LPA2162. A logic low on this pin disables
whether internal or external, have little ability to
the outputs, and a logic high on this pin enables the
reproduce signals below 100Hz to 150Hz. In the
outputs. This pin may be used as a quick disable or
typical application, an input capacitor Ci is required
enable of the outputs without a volume fade.
to allow the amplifier to bias the input signal to the
Quiescent
electrical
proper dc level for optimum operation. Thus, using a
characteristic table. The MUTE pin can be left
large input capacitor may not increase actual system
floating due to the internal pull-up.
performance. In this case, input capacitor (C i) and
Shutdown operation
input resistance (R i) of the amplifier form a
In order to reduce power consumption while not in
high-pass filter with the corner frequency determined
use, the LPA2162 contains shutdown circuitry to turn
by equation below,
current
is
listed
in
the
off the amplifier's bias circuitry. This shutdown
feature turns the amplifier off when logic low is
applied to the SHDN pin. By switching the SHDN pin
connected to GND, the LPA2162 supply current draw
will be minimized in idle mode. The SHDN pin can be
left floating due to the internal pull-up.
The LPA2162 is a high performance CMOS audio
amplifier that requires adequate power supply
decoupling to ensure the output THD and PSRR a
low as possible. Power supply decoupling affects low
response.
Optimum
decoupling
is
achieved by using two capacitors of different types
LPA2162–00
May.-2013
hash
of
on
the
line,
resistance
20μF
fC =
(ceramic)
a
good
(ESR)
or
low
ceramic
greater
is
1
2πRiCi
Analog Reference Bypass Capacitor (C BYP)
In addition to system cost and size, click and pop
performance is affected by the size of the input
coupling capacitor, Ci. A larger input coupling
capacitor requires more charge to reach its quiescent
Power supply decoupling
frequency
digital
DC voltage (nominally 1/2 V DD). This charge comes
from the internal circuit via the feedback and is apt to
create pops upon device enable. Thus, by minimizing
the capacitor size based on necessary low frequency
response, turn-on pops can be minimized.
The Analog Reference Bypass Capacitor (CBYP) is
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Preliminary Datasheet
LPA2162
the most critical capacitor and serves several
important functions. During start-up or recovery from
shutdown mode, C BYP determines the rate at which
the amplifier starts up. The second function is to
reduce noise caused by the power supply coupling
into the output drive signal. This noise is from the
internal analog reference to the amplifier, which
appears as degraded PSRR and THD+N. The
LPA2162 incorporates circuitry designed to detect
low supply voltage. When the supply voltage drops to
2.7V or below, the LPA2162 outputs are disabled,
and the device comes out of this state and starts to
normal function when VDD≥2.7V.
Under voltage lock-out (UVLO)
Most applications require ferrite bead filter as shown
in above picture. The ferrite filter reduces EMI of
Short Circuit Protection (SCP)
The LPA2162 has short circuit protection circuitry on
the outputs to prevent damage to the device when
output-to-output or output-to-GND short occurs.
When a short circuit is detected on the outputs, the
outputs are disabled immediately. If the short was
removed, the device activates again.
around 1 MHz and higher. When selecting a ferrite
bead, choose once with high impedance at high
frequencies, and low impedance at low frequencies.
DC voltage setting
The output voltage of boost convertor is programmed
by feedback resistance and feedback voltage:
Over Temperature Protection
Thermal protection on the LPA2162 prevents the
device
from
damage
when
the
internal
die
temperature exceeds 140℃. There is a 15 degree
VOUT = VFB (
tolerance on this trip point from device to device.
R1
+ 1)
R2
Once the die temperature exceeds the thermal set
point, the device outputs are disabled. This is not a
latched fault. The thermal fault is cleared once the
temperature of the die is reduced by 30℃. This large
hysteresis will prevent motor boating sound well and
the device begins normal operation at this point
without external system intervention.
How to reduce EMI
A simple solution is to put an additional capacitor
1000uF at power supply terminal for power line.
The traces from amplifier to speakers should design
as short as we can.
VFB=1.25V
External N-channel MOS
If we want a 7.5V and 2.5Aoutput for amplifier, a 20V,
6.5A MOS with low Ohm at turn on condition is
required.
Lower
Ohm
and
faster
the
MOS
performance,the higher efficiency with circuit.
Inductor Selection
For a better efficiency in high switching frequency
converter, the inductor selection has to use a proper
core material such as ferrite core to reduce the core
loss and choose low ESR wire to reduce copper loss.
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Preliminary Datasheet
LPA2162
The most important point is to prevent the core
saturated when handling the maximum peak current.
PCB Layout notices
Using a shielded inductor can minimize radiated
1, In the path of the input signal plus a 103-to-ground
noise in sensitive applications. The maximum peak
high-frequency filter capacitor.
inductor current is the maximum input current plus
2, The power and ground and filter capacitor and
the half of inductor ripple current. The calculated
bypass capacitors as close to the chip's pins,
peak current has to be smaller than the current
remember not to put the capacitor on the back of the
limitation in the electrical characteristics. A typical
board, through tiny holes through the jumper even
setting of the inductor ripple current is 20% to 40% of
over.
the maximum input current. If the selection is 40%,
3, Power, ground, and a large current signal line to
the maximum peak inductor current is:
go to try to rough, if you want to add vias, the number
of through-holes must be at least 6.
4, AGND and AVDD should be put independently,
high-power signals to avoid interference.
5, If you want to pursue as large as the effect of
The minimum inductance value is derived from the
following equation:
power, a large selection of speakers or sound
chamber with low resistance (such as 3.6Ω)
speakers, or added to improve the supply voltage
boost circuit.
Depending on the application, the recommended
inductor value is between 2.2μH to 10μH.
6, Sensitive attention to shielding the signal line, it is
best to use a differential signal. Try not to interfere
with the sensitive line through the signal line.
7, The position on the board under the amplifier chip
must be added vents and large areas of exposed
copper and tin to enhance heat dissipation.
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Preliminary Datasheet
LPA2162
PCB Layout
TOP VIEW
BOTTOM VIEW
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Preliminary
Datasheet
LPA2162
Packaging Information
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Page 11 of 11